IRF IRAUDAMP6 User manual

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IRAUDAMP6 REV 1 .0
IRAUDAMP6
250W/8Ω x 2 Channel Class D Audio Power Am lifier
Using the IRS20957S and IRF6785
By
Jun Hon a, Jorge Cerezo an Liwei Zheng
CAUTION:
International Rectifier suggests the following guidelines for safe o eration and handling of
IRAUDAMP6 Demo board;
• Always wear safety glasses whenever o erating Demo Board
• Avoid hysical contact with ex osed metal surfaces when o erating Demo Board
• Turn off Demo Board when lacing or removing measurement robes

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IRAUDAMP6 REV 1 .0
TABLE OF CONTENTS PAGE
INTRODUCTION............................................................................................................................................... 3
SPECIFICATIONS ............................................................................................................................................ 3
CONNECTION SETUP ..................................................................................................................................... 5
CONNECTOR DESCRIPTION ......................................................................................................................... 6
TEST PROCEDURES....................................................................................................................................... 6
PERFORMANCE AND TEST GRAPHS .......................................................................................................... 7
IRAUDAMP6 OVERVIEW .............................................................................................................................. 12
FUNCTIONAL DESCRIPTIONS..................................................................................................................... 13
CLASS D OPERATION..................................................................................................................................... 13
POWER SUPPLIES.......................................................................................................................................... 13
BUS PUMPING ............................................................................................................................................... 14
HOUSE KEEPING POWER SUPPLY................................................................................................................... 14
INPUT............................................................................................................................................................ 15
OUTPUT ........................................................................................................................................................ 15
LOAD IMPEDANCE .......................................................................................................................................... 15
GAIN SETTING / VOLUME CONTROL ................................................................................................................ 16
EFFICIENCY................................................................................................................................................... 16
OUTPUT FILTER DESIGN AND PREAMPLIFIER................................................................................................... 17
SELF-OSCILLATING PWM MODULATOR .......................................................................................................... 17
ADJUSTMENTS OF SELF-OSCILLATING FREQUENCY......................................................................................... 18
SWITCHES AND INDICATORS ........................................................................................................................... 18
STARTUP AND SHUTDOWN ............................................................................................................................. 18
CLICK AND POP NOISE REDUCTION ............................................................................................................... 19
STARTUP AND SHUTDOWN SEQUENCING ........................................................................................................ 20
SELECTABLE DEAD-TIME................................................................................................................................ 23
LEVEL SHIFTERS ........................................................................................................................................... 23
PROTECTION SYSTEM OVERVIEW ................................................................................................................... 24
Over-Current Protection (OCP)............................................................................................................... 24
Over-Voltage Protection (OVP)............................................................................................................... 26
Under-Voltage Protection (UVP) ............................................................................................................. 26
Speaker DC-Voltage Protection (DCP)................................................................................................... 27
O set Null (DC O set) Adjustment ......................................................................................................... 27
Over-Temperature Protection (OTP) ...................................................................................................... 27
Thermal Considerations .......................................................................................................................... 27
Thermal Inter ace Material’s Pressure Control ....................................................................................... 28
AMP6 Thermal pad pressure control calculation .................................................................................... 30
Short Circuit Protection Response.......................................................................................................... 31
IRAUDAMP6 FABRICATION MATERIALS................................................................................................... 37
IRAUDAMP6 PCB SPECIFICATIONS........................................................................................................... 42
REVISION CHANGES DESCRIPTIONS........................................................................................................ 46

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IRAUDAMP6 REV 1 .0
Introduction
The IRAUDAMP6 reference esign is a two-channel, 250W/ch (8Ω) loa half-bri ge Class D au io power
amplifier. This reference esign emonstrates how to use the IRS20957S Class D au io controller an gate
river IC, implement protection circuits, an esign an optimum PCB layout using the IRF6785 DirectFET
MOSFETs. This reference esign oes not require increasing the size of the heatsink or require fan cooling
for normal operation (one-eighth of continuous rate power).The reference esign provi es all the require
housekeeping power supplies for ease of use. The two-channel esign is scalable for power an the number
of channels.
A lications
• AV receivers
• Home theater systems
• Mini component stereos
• Powere speakers
• Sub-woofers
• Musical Instrument amplifiers
Features
Output Power: 250W x 2 channels (8Ω loa ),
Resi ual Noise: 90µV, IHF-A weighte , AES-17 filter
Distortion: 0.005% THD+N @ 125W, 8Ω
Efficiency: 96% @ 250W, 8Ω, single-channel riven, Class D stage
Multiple Protection Features: Over-current protection (OCP), high si e an low si e
Over-voltage protection (OVP),
Un er-voltage protection (UVP), high si e an low si e
DC-protection (DCP),
Over-temperature protection (OTP)
PWM Mo ulator: Self-oscillating half-bri ge topology with optional clock synchronization
S ecifications
General Test Conditions (unless otherwise noted) Notes / Conditions
Supply Voltages ±73.5V
Loa Impe ance 8-4Ω
Self-Oscillating Frequency 400kHz No input signal, A justable
Gain Setting 33 B 1Vrms input yiel s rate power
Electrical Data Ty ical Notes / Conditions
IR Devices Use IRS20957S Au io Controller an Gate-Driver,
IRF6785 DirectFET MOSFETs
Mo ulator Self-oscillating, secon or er sigma- elta mo ulation, analog input
Power Supply Range ± 38V to ±75V Bipolar power supply
Output Power CH1-2: (1% THD+N) 320W 1kHz
Output Power CH1-2: (10% THD+N) 410W 1kHz

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IRAUDAMP6 REV 1 .0
Rate Loa Impe ance 8-4Ω Resistive loa
I ling Supply Current ±85mA No input signal
Total I le Power Consumption 11.9W No input signal
Channel Efficiency 96% Single-channel riven,
250W, Class D stage
.
Audio Performance
* Before
Demodula
tor
Class D
Out ut
Notes / Conditions
THD+N, 1W
THD+N, 10W
THD+N, 60W
THD+N, 100W
THD+N, 200W
0.008%
0.003%
0.0015%
0.002%
0.009%
0.008%
0.004%
0.002%
0.004%
0.009%
1kHz, Single-channel riven
Dynamic Range 117 B 113 B A-weighte , AES-17 filter,
Single-channel operation
Resi ual Noise, 22Hz - 20kHzAES17 70µV
110µV
Self-oscillating – 400kHz
Damping Factor 2000 906 1kHz, relative to 8Ω loa
Channel Separation 92 B
90 B
72 B
92 B
80 B
62 B
100Hz
1kHz
10kHz
Frequency Response : 20Hz-20kHz
: 20Hz-35kHz
N/A ±0.25 B
±1 B 1W, 8Ω Loa
Thermal Performance Ty ical Notes / Conditions
I ling T
C
=30°C
T
PCB
=36°C
No signal input, T
A
=25°C
2ch x 31.25W (1/8 rate power) T
C
=54°C
T
PCB
=65°C
Continuous, T
A
=25°C
2ch x 250W (Rate power) T
C
=80°C
T
PCB
=106°C
At OTP shut own @ 150 sec,
T
A
=25°C
Physical S ecifications
Dimensions 7.76”(L) x 5.86”(W) x 2.2”(H)
192 mm (L) x 149mm (W) x56mm(H)
Weight 0.54kgm

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IRAUDAMP6 REV 1 .0
Connection Setu
Fig 1 Ty ical Test Setu
Volume
J7 J9
J1 J5
J3
R100
S1
S2
CH1 Out ut CH2 Out ut
CH1
In ut
CH2
In ut
G
Protection
Normal
S3
73.5V,8A DC supply
8~4 Ohm 8~4 Ohm
73.5V,8A DC supply
J6
Au io Signal Generator
J8
250W,Non-in uctive Resistors

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IRAUDAMP6 REV 1 .0
Connector Descri tion
CH1 IN J7 Analog input for CH1
CH2 IN J9 Analog input for CH2
POWER J3 Positive an negative supply (+B / -B)
CH1 OUT J1 Output for CH1
CH2 OUT J5 Output for CH2
EXT CLK J6 External clock sync
DCP OUT J8 DC protection relay output
Test Procedures
Test Setu :
1. Connect 8Ω-250 W ummy loa s to output connectors (J1 an J5 as shown on Fig 1) an
parallel it with input of Au io Precision analyzer (AP).
2. Connect the Au io Signal Generator to J7 an J9 for CH1 an CH2 respectively (AP).
3. Set up the ual power supply with voltages of ±73.5V;set current limit to 8A.
4. TURN OFF the ual power supply before connecting to ON of the unit un er test (UUT).
5. Set switch S1 to mi le position (self oscillating).
6. Set volume level knob R130 fully counter-clockwise (minimum volume).
7. Connect the ual power supply to J3. as shown on Fig 1
Power u :
8. Turn ON the ual power supply. The ±B supplies must be applie an remove at the
same time.
9. Re LED (Protection) shoul turn on almost imme iately an turn off after about 3s.
10. Green LED (Normal) then turns on after re LED is extinguishe an shoul stay on.
11. Quiescent current for the positive supply shoul be 84mA ±10mA at +73.5V.
12. Quiescent current for the negative supply shoul be 80mA ±10mA at –73.5V.
13. Push S3 switch(Trip an Reset push-buttom)to restart the sequence of LEDs
in icators,which shoul be the same as note above in steps 9-10.
Switching Frequency test
14. Monitor switching waveform at VS1/J4(pin9-12)of CH1 an VS2/J3(pin1-4)CH2 on
Daughter Boar using an Oscilloscope.
15. For IRAUDAMP6, the self-oscillating switching frequency is pre-calibrate to 400 KHz. To
mo ify the IRAUDAMP6 frequency, change the values of potentiometers R49 an R74 for
CH1 an CH2 respectively.

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IRAUDAMP6 REV 1 .0
Functionality Audio Tests:
16. Apply 1V RMS at 1kHz sinusoi al signal from the Au io Signal Generator.
17. Turn control volume up (R130 clock-wise) to obtain an output rea ing of 250Watts.
18. For all subsequent tests as shown on the Au io Precision graphs below (Fig 2- Fig7), the
measurements are taken across J1 an J5 with an AES-17 Filter. Observe that a 1 V
RMS
input generates an output voltage of 44.7 V
RMS
.
19. Sweep the au io signal voltage from 15 mV
RMS
to 1 V
RMS
.
20. Monitor the output signals at J1/J5 with an oscilloscope. The waveform must be a non
istorte sinusoi al signal.
Test Setu using Audio Precision (A ):
21. Use an unbalance -floating signal from the generator outputs.
22. Use balance inputs taken across output terminals, J1 an J5.
23. Connect Ap frame groun to GND at terminal J7/J9.
24. Select the AES-17 filter(pull- own menu) for all the testing except frequency response.
25. Sweep the input signal voltage from 15 mV
RMS
to 1 V
RMS
.
26. Run Ap test programs for all subsequent tests as shown in Fig 2- Fig 7below.
Performance and test gra hs
C o lo rS w e e p T ra c e L in e S t y l e T h i c k D a t a A x i s C o m m e n t
1 1 B l u e S o li 2 A n l r . T H D + N R a t io L e ft C H 2
1 3 R e S o li 2 A n l r . T H D + N R a t io L e ft C H 1
0.001
1 0
0.002
0.005
0 . 0 1
0 . 0 2
0 . 0 5
0 . 1
0 . 2
0 . 5
1
2
5
%
1 0 0 m 1 k2 0 0 m 5 0 0 m 1 2 5 1 0 2 0 5 0 1 0 0 2 0 0 5 0 0
W
±B Su ly = ±73.5V, 8 Ω Resistive Load
Fig 2 IRAUDAMP6, THD+N versus Power, Stereo, 8 Ω

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IRAUDAMP6 REV 1 .0
8 ohm loa
4 ohm loa
Fig 3 IRAUDAMP6, Frequency res onse

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IRAUDAMP6 REV 1 .0
.
ColorSweep Trace Line Style Thick Data Axis Comment
1 1 Re Soli 2 Anlr.THD+N Ratio Left 125W L
1 2 Blue Soli 2 Anlr.THD+N Ratio Left 125W R
2 1 Magenta Soli 2 Anlr.THD+N Ratio Left 25W L
2 2 Green Soli 1 Anlr.THD+N Ratio Left 25W R
0.0001
100
0.001
0.01
0.1
1
10
%
20 20k50 100 200 500 1k 2k 5k 10k
Hz
Fig 4 THD+N Ratio vs. Frequency

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IRAUDAMP6 REV 1 .0
ColorSweep Trace Line Style Thick Data Axis Comment
1 1 Magenta Soli 1 Fft.Ch.1 Ampl Left
1 2 Blue Soli 1 Fft.Ch.2 Ampl Left
-100
+0
-80
-60
-40
-20
B
V
10 20k20 50 100 200 500 1k 2k 5k 10k
Hz
Fig 5, 1V out ut Frequency S ectrum
ColorSweep Trace Line Style Thick Data Axis Comment
1 1 Re Soli 1 Fft.Ch.1 Ampl Left
1 2 Blue Soli 1 Fft.Ch.2 Ampl Left
-140
+20
-120
-100
-80
-60
-40
-20
+0
B
V
10 20k20 50 100 200 500 1k 2k 5k 10k
Hz
No signal, Self Oscillator @ 400kHz
Fig 6, IRAUDAMP6 Noise Floor

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IRAUDAMP6 REV 1 .0
.
Fig 7, Channel se aration vs. frequency
.

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IRAUDAMP6 REV 1 .0
IRAUDAMP6 Overview
The IRAUDAMP6 features a 2CH self-oscillating type PWM mo ulator for the lowest component
count, highest performance an robust esign. This topology represents an analog version of a
secon -or er sigma- elta mo ulation having a Class D switching stage insi e the loop. The
benefit of the sigma- elta mo ulation, in comparison to the carrier-signal base mo ulation, is that
all the error in the au ible frequency range is shifte to the inau ible upper-frequency range by
nature of its operation. Also, sigma- elta mo ulation allows a esigner to apply a sufficient
amount of error correction.
The IRAUDAMP6 self-oscillating topology consists of following essential functional blocks.
• Front-en integrator
• PWM comparator
• Level shifters
• Gate rivers an MOSFETs
• Output LPF
IRF6785
Direct
-
FET
Fee back
GND
LPF
+B
-B
Σ
IRS20957S
Gate Driver
U1 U1
Daughter-boar
Integrator
Fig 8, Sim lified Block Diagram of Class D Am lifier

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IRAUDAMP6 REV 1 .0
Functional Descri tions
Class D O eration
Referring to CH1 as an example, the op-amp U6 forms a front-en secon -or er integrator with
C38, C42 & R50 + R49P. This integrator receives a rectangular fee back waveform from the
Class D switching stage an outputs a qua ratic oscillatory waveform as a carrier signal. To
create the mo ulate PWM signal, the input signal shifts the average value of this qua ratic
waveform (through gain relationship between R40,AR154 an R38 + R39) so that the uty varies
accor ing to the instantaneous value of the analog input signal. The IRS20957 input comparator
processes the signal to create the require PWM signal. This PWM signal is internally level-shifte
own to the negative supply rail where this signal is split into two signals, with opposite polarity
an a e ea time, for high-si e an low-si e MOSFET gate signals, respectively. The
IRS20957 rives two IRF6785 DirectFET MOSFETs in the power stage to provi e the amplifie
PWM waveform. The amplifie analog output is re-create by emo ulating the amplifie PWM.
This is one by means of the LC low-pass filter (LPF) forme by L4 an C34, which filters out the
Class D switching carrier signal.
Power Su lies
The IRAUDAMP6 has all the necessary housekeeping power supplies onboar an only requires
a pair of symmetric power supplies ranging from ±38 V to ±82 V (+B, GND, -B) for operation. The
internally-generate housekeeping power supplies inclu e a ±5 V supply for analog signal
processing (preamp, etc.), while a +12 V supply (V
CC
), reference to –B, is inclu e to supply the
Class D gate- river stage.
For the externally-applie power, a regulate power supply is preferable for performance
measurements, but not always necessary. The bus capacitors, C45 ~ C48 on the motherboar ,
along with high-frequency bypass-caps C19 ~ C26 on aughter boar , a ress the high-frequency
ripple current that result from switching action. In esigns involving unregulate power supplies,
the esigner shoul place a set of bus capacitors, having enough capacitance to han le the au io-
ripple current, externally. Overall regulation an output voltage ripple for the power supply esign
are not critical when using the IRAUDAMP6 Class D amplifier as the power supply rejection ratio
(PSRR) of the IRAUDAMP6 is excellent (Fig 9).

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IRAUDAMP6 REV 1 .0
Fig 9, Am 6 Power Su ly Rejection Ratio (PSRR)
Bus Pum ing
Since the IRAUDAMP6 is a half-bri ge configuration, bus pumping oes occur. Un er normal
operation uring the first half of the cycle, energy flows from one supply through the loa an into
the other supply, thus causing a voltage imbalance by pumping up the bus voltage of the receiving
power supply. In the secon half of the cycle, this con ition is opposite, resulting in bus pumping
of the other supply.
These con itions worsen bus pumping:
– Lower frequencies (bus-pumping uration is longer per half cycle)
– Higher power output voltage an /or lower loa impe ance (more energy transfers between
supplies)
– Smaller bus capacitors (the same energy will cause a larger voltage increase)
The IRAUDAMP6 has protection features that will shut own the switching operation if the bus
voltage becomes too high (>82 V) or too low (<36 V). One of the easiest countermeasures is to
rive both of the channels out of phase so that one channel consumes the energy flow from the
other an oes not return it to the power supply. Bus voltage etection is only one on the –B
supply as the effect of the bus pumping on the supplies is assume to be symmetrical in amplitu e
(although opposite in phase).
House Kee ing Power Su ly
The internally-generate housekeeping power supplies inclu e ±5V for analog signal processing,
an +12V supply (V
CC
) referre to the negative supply rail -B for DirectFET gate rive. The gate
river section of the IRS20957 uses VCC to rive gates of the DirectFETs. V
CC
is reference to –
B (negative power supply). D6, R4 an C15 form a bootstrap floating supply for the HO gate
river.

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IRAUDAMP6 REV 1 .0
In ut
A proper input signal is an analog signal ranging from 20Hz to 20kHz with up to 3 V
RMS
amplitu e
with a source impe ance of no more than 600 Ω. Input signal with frequencies from 30kHz to
60kHz may cause LC resonance in the output LPF, causing a large reactive current flowing
through the switching stage, an the LC resonance can activate OCP.
The IRAUDAMP6 has an RC network calle a Zobel network (R45 an C36) to amp the
resonance an prevent peaking frequency response with light loa ing impe ance. (Fig 10), but is
not thermally rate to han le continuous supersonic frequencies. These supersonic input
frequencies therefore shoul be avoi e . Separate mono RCA connectors provi e input to each of
the two channels. Although both channels share a common groun , it is necessary to connect
each channel separately to limit noise an crosstalk between channels.
Out ut
Both outputs for the IRAUDAMP6 are single-en e an therefore have terminals labele (+) an (-
) with the (-) terminal connecte to power groun . Each channel is optimize for a 8 Ω speaker
loa for a maximum output power of 250 W.
Load Im edance
Each channel is optimize for a 8 Ω speaker loa in half bri ge.
Fig 10 Out ut Low Pass Filter and Zobel Network

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IRAUDAMP6 REV 1 .0
Gain Setting / Volume Control
The IRAUDAMP6 has an internal volume control (potentiometer R130 labele , “VOLUME”) for
gain a justment. Gain settings for both channels are tracke an controlle by the volume control
IC (U_2) setting the gain from the microcontroller IC (U_3). The total gain is a pro uct of the
power-stage gain, which is constant (+33 B), an the input-stage gain that is irectly-controlle
by the volume a justment. The volume range is about 100 B with minimum volume setting to
mute the system with an overall gain of less than -60 B. For best performance in testing, the
internal volume control shoul be set to 1 Vrms input will result in rate output power (250 W into
8 Ω).
Efficiency
Fig 11 shows efficiency characteristics of the IRAUDAMP6. The high efficiency is achieve by
following major factors:
1) Low con uction loss ue to the DirectFETs offering low R
DS(ON)
2) Low switching loss ue to the DirectFETs offering low input capacitance for fast rise an
fall times
Secure ea -time provi e by the IRS20957, avoi ing cross-con uction
0%
10%
20%
30%
40%
50%
60%
70%
80%
90%
100%
0 50 100 150 200 250 300 350 400
Out ut Power(W)
Efficiency (%)
Class D Efficiency
Fig 11, IRAUDAMP6 8 ohms load Stereo, ±B su ly = ±73.5V

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IRAUDAMP6 REV 1 .0
Out ut Filter Design and Pream lifier
The au io performance of the IRAUDAMP6 epen s on a number of ifferent factors. The section
entitle , “Typical Performance” presents performance measurements base on the overall system,
inclu ing the preamp an output filter. While the preamp an output filter are not part of the Class
D power stage, they have a significant effect on the overall performance.
Output filter
The amplifie PWM output is reconstructe back to an analog signal by the output LC LPF.
Demo ulation LC low-pass filter (LPF) forme by L4 an C34, filters out the Class D switching
carrier signal leaving the au io output at the speaker loa . A single stage output filter can be use
with switching frequencies of 400 kHz an greater; a esign with a lower switching frequency may
require an a itional stage of LPF.
Since the output filter is not inclu e in the control loop of the IRAUDAMP6, the reference esign
cannot compensate for performance eterioration ue to the output filter. Therefore, it is important
to un erstan what characteristics are preferable when esigning the output filter:
1) The DC resistance of the in uctor shoul be minimal an be within 20 m_Ohm or less.
2) The linearity of the output in uctor an capacitor shoul be high with respect to loa
current an voltage.
Preamplifier
The preamp allows partial gain of the input signal, an in the IRAUDAMP6, controls the volume.
The preamp itself will a istortion an noise to the input signal, resulting in a gain through the
Class D output stage an appearing at the output. Even a few micro-volts of noise can a
significantly to the output noise of the overall amplifier. In fact, the output noise from the preamp
contributes more than half of the overall noise to the system.
It is possible to evaluate the performance without the preamp an volume control, by moving
resistors R154an R155 to R157 an R156, respectively. This effectively bypasses the preamp
an connects the RCA inputs irectly to the Class D power stage input. Improving the selection of
preamp an /or output filter, will improve the overall system performance to approach that of the
stan -alone Class D power stage.
Self-Oscillating PWM Modulator
The IRAUDAMP6 Class D au io power amplifier features a self-oscillating type PWM mo ulator
for the lowest component count an robust esign. This topology represents an analog version of
a secon -or er sigma- elta mo ulation having a Class D switching stage insi e the loop. The
benefit of the sigma- elta mo ulation, in comparison to the carrier-signal base mo ulation, is that
all the error in the au ible frequency range is shifte to the inau ible upper-frequency range by
nature of its operation. Also, sigma- elta mo ulation allows a esigner to apply a sufficient
amount of correction.
The self-oscillating frequency is etermine by the total elay time insi e the control loop of the
system. The elay of the logic circuits, the IRS20957 gate- river propagation elay, the IRF6785
switching spee , the time-constant of front-en integrator (e.g. R50 + R49, C38 an C42 for CH1)

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IRAUDAMP6 REV 1 .0
an variations in the supply voltages are critical factors of the self-oscillating frequency. Un er
normal con itions, the switching-frequency is aroun 400 kHz with no au io input signal an a +/-
73.5 V supply.
Adjustments of Self-Oscillating Frequency
The PWM switching frequency in this type of self-oscillating switching scheme greatly impacts the
au io performance, both in absolute frequency an frequency relative to the other channels. In
absolute terms, at higher frequencies, istortion ue to switching-time becomes significant, while
at lower frequencies, the ban wi th of the amplifier suffers. In relative terms, interference between
channels is most significant if the relative frequency ifference is within the au ible range.
Normally when a justing the self-oscillating frequency of the ifferent channels, it is best to either
match the frequencies accurately, or have them separate by at least 25 kHz.
Potentiometers for a justing self-oscillating frequency
R49 Switching frequency for CH1*
R74 Switching frequency for CH2*
*A justments have to be one at an i ling con ition with no signal input.
Switches and Indicators
There are two ifferent in icators on the reference esign:
– A Re LED, signifying a fault / shut own con ition when lit.
– A green LED on the motherboar , signifying con itions are normal an no fault con ition is
present.
There are three switches on the reference esign:
– Switch S1 is an oscillator selector. This three-position switch is selectable for internal self-
oscillator (mi le position – “SELF”), or either internal (“INT”) or external (“EXT”) clock
synchronization.
– Switch S2 is an internal clock-sync phase ifference selector. This feature allows the esigner
to mo ify the clock-sync phase separation in or er to avoi synchronize switching noise
interference. With S2 is set to OFF, the sync-clock phase ifference value is 180°.With S2 is
set to INT, the clock-sync phase is set by potentiometer R100. With S2 is set to STG, one
channel’s clock is qua rature-lagging
– Switch S3 is a trip an reset push-button. Pushing this button has the same effect of a fault
con ition. The circuit will restart about three secon s after the shut own button is release .
Startu and Shutdown
One of the most important aspects of any au io amplifier is the startup an shut own proce ures.
Typically, transients occurring uring these intervals can result in au ible pop- or click-noise on the
output speaker. Tra itionally, these transients have been kept away from the speaker through the
use of a series relay that connects the speaker to the au io amplifier only after the startup
transients have passe an isconnects the speaker prior to shutting own the amplifier. It is
interesting to note that the au ible noise of the relay opening an closing is not consi ere “click
noise”, although in some cases, it can be lou er than the click noise of non-relay-base solutions.

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IRAUDAMP6 REV 1 .0
The IRAUDAMP6 oes not use any series relay to isconnect the speaker from the au ible
transient noise, but rather a shunt-base click noise re uction circuit that yiel s au ible noise
levels that are far less that those generate by the relays they replace. This results in a more
reliable, superior performance system.
For the startup an shut own proce ures, the activation (an eactivation) of the click-noise
re uction circuit, the Class D power stage an the au io input (mute) controls have to be
sequence correctly to achieve the require click noise re uction. The overall startup sequencing,
shut own sequencing an shunt circuit operation are escribe below.
Click and POP Noise Reduction
To re uce the turn-on an turn-off click noise, a low impe ance shunting circuit is use to
minimize the voltage across the speaker uring transients. For this purpose, the shunting circuit
must inclu e the following characteristics:
1) An impe ance significantly lower than that of the speaker being shunte . In this case, the
shunt impe ance is ~100 mΩ, compare to the normal 8 Ω speaker impe ance.
2) When eactivate , the shunting circuit must be able to block voltage in both irections ue
to the bi- irectional nature of the au io output.
3) The shunt circuit requires some form of OCP. If one of the Class D output MOSFETs fails,
or is con ucting when the speaker mute (SP MUTE) is activate , the shunting circuit will
effectively try to short one of the two supplies (+/-B).
The implemente click-noise re uction circuit is shown in Figure 12. Before startup or shut own of
the Class D power stage, the click-noise re uction circuit is activate through the SP MUTE
control signal. With SP MUTE signal high, the speaker output is shorte through the back-to-back
MOSFETs (U5 for Channel 1) with an equivalent on resistance of about 100 mΩ. The two
transistors (U7 for Channel 1) are for the OCP circuit.
+B
-B
Speaker Mute
Fig 12, Class D Out ut Stage with Click-Noise Reduction Circuit
Over Current
Protection
Click noise
re uction circuit
Transient
current paths

www.irf.com Page 20 of 46
IRAUDAMP6 REV 1 .0
Startu and Shutdown Sequencing
The IRAUDAMP6 sequencing is achieve through the charging an ischarging of the CStart
capacitor C66. This, couple to the charging an ischarging of the voltage of CSD (C11 on
aughter boar for CH1) of the IRS20957, is all that is require for complete sequencing. The
conceptual startup an shut own timing iagrams are show in Figure 13.
Fig 13, Conce tual Startu Sequencing of Power Su lies and Audio Section Timing
V
CC
-B
+B
+5 V
-5 V
CStart
CSD
UVP@-20 V
CSD= 2/3V
DD
CStart Ref2 CStart Ref1
Au io MUTE
SP MUTE
CHx_O
Class D startup
Time
Music startup