Kenwood FleetSync KDS-100 User manual

© 2001-8 PRINTED IN JAPAN
B51-8591-00 (N)1411
MOBILE DATA TERMINAL
KDS-100
SERVICE MANUAL
CONTENTS
OPERATING FEATURES .......................... 2
INSTALLATION ......................................... 2
REALIGNMENT ......................................... 3
ADJUSTMENT .......................................... 5
CIRCUIT DESCRIPTION ............................ 6
DESCRIPTION OF COMPONENTS .......... 9
SEMICONDUCTOR DATA ...................... 10
PARTS LIST ............................................. 11
EXPLODED VIEW.................................... 15
PACKING ................................................. 16
PC BOARD VIEWS
DISPLAY UNIT (X54-3350-20) ............ 17
SCHEMATIC DIAGRAM .......................... 23
BLOCK DIAGRAM ................................... 27
LEVEL DIAGRAM .................................... 29
TERMINAL FUNCTION ........................... 30
SPECIFICATIONS .................................... 31
Panel assy
(A62-0979-03)
Key top
(K29-9135-02)
LCD assy
(B38-0856-05)
Bracket
(J29-0689-03)

2
KDS-100
Display
Messages appear on this 240 x 64 dot LCD.
LED Indicator (default settings)
Lights red while “talking” to the mobile unit. Lights
green while “listening” to the mobile unit. Flashes orange
when a message is waiting.
MENU key
Press to enter the Menu mode, in order to select your
desired menu.
Keys 1 ~ 5
Press these function keys to perform the functions de-
scribed in the status bar on the display, directly above the
keys.
SEL (Select) key
Press to select the displayed item.
▲key
Press to scroll up the display.
▼key
Press to scroll down the display.
1
345
6
7
2
TK-780/880/980/981 Series (TK-
*
80 Series)
■Installing the KCT-34 in the Transceiver
1. Remove the upper cover from the transceiver.
2. Lift the DC cord bushing ( 1) from the chassis.
3. Remove the pad as shown in the Figure 1 ( 2).
4. Insert the KCT-34 cable ( 3) into the chassis ( 4). The
wire harness band ( 5) must be inside the chassis.
5. Replace the DC cord bushing ( 6).
6. Connect the KCT-34 to the TX-RX unit (A/2) as shown in
Figure 2 ( 7).
Fig. 1
1
2
D
C
B
A
1
3
13
15
KDS-100 or
through KCT-36
extension cable.
KCT-34
CN1
CN2
CN4
CN3
A
B
C
D
3
4
6
7
5
Fig. 2
Connector Wire Color Pin No.
A-1 Brown 4
A-2 NC –
A-3 NC –
A-4 Orange 5
A-5 Gray 10
A-6 NC –
A-7 Yellow 6
A-8 Blue 8
OPERATING FEATURES / INSTALLATION
Front panel
1
2
3
4
5
6
7
Connector Wire Color Pin No.
B-1 NC –
B-2 White 11
B-3 Green 7
C-1 Purple 9
C-2 Light blue 14
C-3 Light green 15
D-1 NC –
D-2 Black 3
D-3 Red 1

3
KDS-100
INSTALLATION / REALIGNMENT
TK-760G/762G/860G/862G/768G/868G Series
(TK-
*
60G Series)
■Installing the KCT-35 in the Transceiver
1. Remove the upper cover from the transceiver.
2. Lift the DC cord bushing ( 1) from the chassis.
3. Remove the pad as shown in the Figure 3 (
2
).
4. Insert the KCT-35 cable ( 3) into the chassis ( 4). The
wire harness band ( 5) must be inside the chassis.
5. Replace the DC cord bushing ( 6).
6. Connect the KCT-35 to the TX-RX unit (A/2) as shown in
Figure 4 ( 7).
Fig. 3
1
2
Fig. 4
A
B
C
3
4
6
7
5
KDS-100 or
through KCT-36
extension cable.
KCT-35
1
13
15
3
CN5
A
B
C
CN4
CN3
Transceiver Setting
When the KDS-100 (Mobile Data Terminal) is connected
to a transceiver, the transceiver functions must be set. The
transceiver FPU is used to make this setting.
For a connection method, see Figure 1.
■TK-*80 Series Setting Method
1. Setting with KPG-49D (K and M markets FPU)
1) Select “Optional Features” from the “Edit” menu and
set COM1 (Internal Port) “[None]” to “[Data]”.
2) Select “FleetSync” from “Edit” and set functions to
“Yes/No” as follows:
Status Message Stack ................... [No]
Short Message Stack ..................... [No]
Caller ID Stack................................ [No]
Status Message Serial Output....... [Yes]
Short Message Serial Output ........ [Yes]
3) Enter an ID.
Fleet (Own): A three-digit number between 100 and 300
can be entered in [ ].
ID (Own): A four-digit number between 1000 and 4999
can be entered in [ ].
2. Setting with KPG-60D (E markets FPU)
1) Select “Extended Function” from the “Edit” menu and
set COM1 “ None ” to “ Data ”.
2) Select “Digital Message System” from “Edit” and set
the checkboxes as follows:
• Uncheck items.
Status Message Stack
Short Message Stack
Selcall ID Stack
• Check items (✓).
Status Message Serial Output
Short Message Serial Output
3) Enter an ID.
Fleet (Own): A three-digit number between 100 and 300
can be entered in .
ID (Own): A four-digit number between 1000 and 4999
can be entered in .
✓
✓
Connector Wire Color Pin No.
A-1 Brown 4
A-2 Green 7
A-3 NC –
A-4 Orange 5
A-5 NC –
A-6 NC –
A-7 Yellow 6
A-8 Blue 8
Connector Wire Color Pin No.
B-1 Gray 10
B-2 White 11
B-3 Purple 9
C-1 NC –
C-2 Black 3
C-3 Red 1

4
KDS-100
■TK-*60G Series Setting Method
Use the KPG-56D as the FPU.
1) Select “Key assignment” from “Edit” on the menu bar,
and set “FootSwitch” to “[None]”.
2) Select “Optional Features” from “Edit” and change
“ACC Hook/DTC” from “[ACC Hook]” to “[DTC]”.
3) Enter an ID with the FPU (KPG-71D) by connecting a
transceiver with the KDS-100.
For a connection method, see Figure 1.
REALIGNMENT
Fig. 1
IBM-PC
Transceiver
KDS-100
KPG-49D or KPG-60D : TK-*80
KPG-56D : TK-*60G
IBM-PC
Transceiver
KDS-100
KPG-71D : KDS-100
KPG-46
KPG-46

5
KDS-100
DI input level Adjustment Codec IC (IC20)
(mVrms) digit input level (mVp-p)
50 129
100 64
200 33
300 21
400 16
500 13
600 11 1000
700 9
800 8
900 7
1000 6
1100 6
1200 6
Conversion table
ADJUSTMENT
DI input VS DIGIT
DIGIT
DI input level (mVrms)
50 200 400 600 800 1000 1200
129
64
33
21
16 13 11 987666
0
10
20
30
40
50
60
70
80
90
100
110
120
130
140
KDS-100 “Test Mode” Setting Method
Connect the KDS-100 to a PC and enable KDS-100 “Test
Mode” with the FPU (KPG-71D).
1) Select “Optional Features” from the KPD-71D “Edit”
menu.
2) Check the ” Test” box for “COM/Mode”.
When this state is written into the KDS-100, the Test
Mode operation is enabled.
MSK Modulation Adjustment
Adjust deviation as follows: Wide: 3kHz and Narrow:
1.5kHz.
TK-*80 series
For information on the adjustment method, see the Ser-
vice Manual for the TK-*80 series.
TK-*60G series
1) Connect a transceiver and a PC to the KDS-100, and se-
lect “Test Mode” from “Program” on the FPU (KPG-71D)
menu.
2) Adjust the “Output Level” DIGIT value on the “MSK”
screen.
3) When you click on “OK” on the PC screen, the adjust-
ment value is written into the KDS-100 memory.
MSK Detection Input Level Adjustment
(Same as for the TK-
*
80 series and TK-
*
60G series)
Set the input voltage at pin 2 of the CODEC IC (IC20) of
the KDS-100 to 1000mVp-p.
1) Modulate SSG with a modulation frequency 1200Hz (or
1000Hz) (Wide: 3kHz, Narrow: 1.5kHz) and input it to the
transceiver.
2) Measure the KDS-100 DI voltage (DI: CN5 pin 3, trans-
ceiver detection output voltage) with a VTVM.
3) Set the “Input Level” DIGIT value according to the fol-
lowing conversion table on the “MSK” screen in “Test
Mode” so that the measured voltage (mVrms) is the
CODEC IC input voltage (1000mV).
4) When you click on “OK” on the PC screen, the adjust-
ment value is written into the KDS-100 memory.


6
KDS-100
1. Power Supply Circuit
The KDS-100 power supply circuit uses a dedicated regu-
lator IC for each circuit application so that the circuits do not
interfere with each other. (Figure 1)
4. Key Backlight, TX/RX LED Control Circuit
The KDS-100 front operation key backlight and TX/RX sta-
tus indicator LED is turned ON or OFF with the shift register
(IC24) controlled by the CPU (IC6). (Figure 4)
IC36 IC32
IC33
IC31
IC26
1.8V
IC30
3.3V
3.3V
IC27
IC28
8V 5V
5V
5V
5V
IC35
5V
DSP CORE
CPU, DIGITAL
DSP I/O
ANALOG
ANALOG
to CN15
to CN16
SB
2. LCD Backlight Intensity Adjustment Circuit
The intensity of the backlight of the KDS-100 LCD assem-
bly is adjusted by controlling the Q7 base voltage with the D/
A converter (IC17) and changing the Q8 collector voltage.
(Figure 2)
R236
Q7
Q8
R175
8V
R174R244
TH2
R235
R234
R171
IC17
D/A converter
ch1 out 2
3. Audio Amplifier Circuit
The KDS-100 audio amplifier (IC34) amplifies the beep
signal generated by the microcomputer to the level for out-
putting to a speaker.
The audio amplifier power supply is turned ON or OFF
according to the timing that sounds a beep with a shift regis-
ter (IC24) controlled by the CPU (IC6). The volume is con-
trolled according to the DC voltage of the D/A converter
(IC17) controlled by the CPU. (Figure 3)
5V
Q10
R190
R191
12
3
10
IC24
Shift register
Q6
ch2 out
ch3 out
IC17
D/A converter
Beep IC34
Vin(1)
Vin(2)
Vc1
Vc2
R193
R195
INT. SP
EXT. SP
Vp
5
4
6
2
8
5. Digital Control Circuit
Overview
The KDS-100 control circuit consists of a CPU (IC6) and a
DSP (IC23).
The DSP functions as a MSK modem.
Figure 5 is a block diagram of a digital control circuit.
D31
R182
R181
R179
R176
D32
D28
D29
D30
Q6
D27
5V
8V
Q9
6
7
11
RX Q0
TX Q1
KEY Q5
IC24
Shift register
IC6
CPU
IC23
DSP
Address
data bus
Fig. 1
Fig. 2
Fig. 3
Fig. 5
Fig. 4
CIRCUIT DESCRIPTION

7
KDS-100
Address control circuit
The CPU operates in the single-chip mode using an inter-
nal ROM and RAM.
It communicates with the DSP through an external data
bus.
Since the CPU operates on 5V and the DSP and flash
ROM (IC13) operate on 3V, the address data bus is con-
nected through a 5V-3V level conversion IC (IC11, 11, 36,
37). (Figure 6)
Data bus
Address bus
Address bus
IC11
5V→3V
IC10
5V←→3V
IC36
5V→3V
IC37
5V→3V
IC6
CPU
IC23
DPS
IC13
Flash
ROM
Data bus
Real-time clock
The message transmission/reception time is controlled
by the dedicated real-time clock IC (IC2).
When the power supply is OFF, it is backed up by an in-
ternal secondary lithium battery (BA1).
System reset, RAM, real-time clock backup
The power supply voltage monitor IC (IC1) monitors
power supply voltage (8V). If the voltage falls, the PFO port
goes “LOW” level, the CPU PFint (INT0) port also goes
“LOW” level, and the CPU stops. If the 5V power supply
voltage (for the CPU, S-RAM, and real-time clock IC) drops,
the backup power supply for the S-RAM (IC12) and real-time
clock IC (IC2) is switched to the secondary lithium battery
(BA1).
When the power supply restores to its normal voltage,
the IC1 PF0 port goes “H” level and the CPU PFint (INT0)
port also goes “H” level. In addition, the RESET signal from
IC1 is sent to the CPU RESET port to initialize and start the
CPU.
CEOUT is obtained by gating CEIN (S-RAM CE) with CEIN
(S-RAM CE) output. When the VCC is equal to or higher
than the threshold, CEOUT tracks CEIN (S-RAM CS1). If the
VCC is lower than the threshold, CEOUT goes “High”. (Fig-
ure 7)
Note:
The backup lithium battery (BA1) is fully charged from the
empty state when the KDS-100 is turned on for about
150 hours.
Reset &
watchdog
time base
Reset
generator
Watchdog
transition detector
Watchdog
timer
4.65V –
+
1.3V –
+
–
+
CEIN
VBATT
S-RAM
CS1
VCC
5V
OSC IN
OSC SEL
WATCHDOG
INPUT (WDI)
POWER FAIL
INPUT (PFI)
VOUT
CEOUT
LOW LINE
RESET
RESET
WATCHDOG
OUTPUT (WDO)
POWER FAIL
OUTPUT (PFO)
IC6 pin18
PFint (INT0)
IC6 pin10
RESET
R250
BA1
R32
R33
C242
R31
8V
BATT ON
Serial ports
The KDS-100 CPU has three serial ports. Two RS232C
level lines with two-channel RS232C driver (IC3) and two 5V
logic level serial control lines with two types of analog
switches (IC40, IC5) are controlled, selected and used.
Analog SW
IC6
PORT0 33
34
TX0
TX1
RX0
RX1
TX2
RX2
29
30
PORT1
PORT2
IC5
IC3
2
12
1
2
Y0
X0
Y1
X1
Y
X
15
14
TX0 or TX1
RX0 or RX1
RADIO
MIC
CN5
J1
COM1
CN1
12
11
13
IC40 (2/2)
Analog SW
IC40 (2/2)
Analog SW
RS232C Driver
10
8
ch1
ch2
56
28
27
14
12
7
9
COM2
CN2
Fig. 6
Fig. 7
Fig. 8
CIRCUIT DESCRIPTION

8
KDS-100
6. Transmit/Receive Signal Flow
Receive data signal
The transceiver detection output passes through CN5
No. 3 pin and amplifier (IC15), and its level is adjusted by the
D/A converter (IC17). The resulting signal is amplified by the
amplifier (IC22), goes to the CODEC (IC20), and is converted
to digital data.
This data is transferred serially from the CODEC to the
DSP (IC23) and operated by the DSP.
IC15
NJM2904M
AMP
SB
SBO
DI
GND
DO
PTT
DTC
SQ
TXS
AM
MM
ID
DISPOFF
TXD
RXD
MIC
DI
CN5 1
15
IC21
NJM2904M
AMP
SP
CN17
IC34
TDA7053AT
AUDIO AMP
Q10
2SB798
(DL,DK)
5V
AMP SW
1
2
+
–
DO
IC17
M62364FP
ELE-VOL
DI
MIC
DO
BUZZER
IC20
AK4550VT
CODEC
IC22
NJM2904M
AMP
IC14
NJM2904M
AMP
BUZZER
Q7
2SC4617
Q8
2SB1132
LED
DIMMER
IC23
TMS320VC5402PGE
IC19
TC74VHC4040FT
COUNTER
DSP
X2
12.288MHz
DSPCLK
EXT SP
CN18
1
2
+
–
Transmit data signal
The digital data processed by the DSP is transferred seri-
ally from the DSP to the CODEC, and converted to an analog
signal. It is amplified by the amplifier (IC14), its level is ad-
justed by the D/A converter (IC17), the signal passes
through the buffer amplifier (IC21), passes through CN5
No.5 pin, and is output to the transceiver as a transmit data
signal.
Fig. 9
CIRCUIT DESCRIPTION

9
KDS-100
Display Unit (X54-3350-20)
Ref. No. Use/Function Operation/Condition
Q1,2 Switching Logic Inverter
Q3 Switching Level converter RS232C→TTL
Q4 Switching Level converter
Q5 Switching Logic Inverter
Q6 Switching LED switch
Q7,8 DC amp LCD backlight adjustment
Q9 Switching LED switch, Keyboard backlight
Q10 Switching AF amp power supply SW
Q11,12 Switching
Q13~16 Switching Level converter 3V→5V
IC1 Reset IC Reset backup
IC2 Real time clock Time management
IC3 Level shift Level converter RS232C→TTL
IC4 Extended I/O Serial/parallel conversion
IC5 Multiplexer Serial port SW
IC6 CPU 16 bit
IC7 Analog SW Serial/parallel conversion
IC8,9 Buffer Extended I/O
IC10 Level converter 5V←→3V
IC11 Level converter 5V→3V
IC12 Memory 5V S-RAM
IC13 Memory 3.3V Flash ROM
IC14 Amplifier Output data
IC15 Amplifier Input data
IC16 Gate IC Logic inverter
IC17 D/A converter
IC19 Clock demultiplier For DSP
IC20 A/D,D/A CODEC
IC21,22 Amplifier Output data
IC23 DSP IC
Ref. No. Use/Function Operation/Condition
IC24 Shift register LED, Audio amp SW
IC25 Shift register KEY Scan
IC26 Regulator 1.8V
IC27,28 Regulator 3.3V
IC30 Regulator 5V (1A)
IC31 Regulator 5V (150mA)
IC32,33 Regulator 5V (15mA)
IC34 AF amp
IC35 Regulator 5V (1A)
IC36 Regulator 8V (1A)
IC37,38 Level converter 5V→3V
IC39 Gate IC IC10 direction
IC40 Analog SW Serial/parallel conversion
IC41 Buffer Reset signal
D1 Over current 0.75A
protection
D2 Zener diode Connection detector
D3 Backward voltage
protection
D4,5 Reverse current
protection
D6~17 Surge absorption
D18 Level converter
D19~24 Surge absorption
D27 LED TX/RX
D28~32 LED KEY backlight
D34~39 Surge absorption
D40 Reverse current
protection
DESCRIPTION OF COMPONENTS

10
KDS-100
CPU : 30620M8A-2M6GP (IC6)
Pin No. Pin Name I/O Function
1 IOA1 I/O Common I/O 1 (A1)
2 VRLD O Electrolic VR LD
3 KBCLKO O PC/AT keyboard clock
4 KBDATI I PC/AT keyboard data
5 KBDATO O PC/AT keyboard data
6 BYTE I 5V (5C)
7 CNVSS I GND
8 ACCDET I Accessory power detect
9 FRBSY I Flash ROM busy detect
10 RESET I Reset
11 XOUT O System clock
12 VSS - GND
13 XIN I System clock
14 VCC - 5V Power supply
15 NMI I NC
16 SRCLK1 I Swipe reader clock 1
17 SRCLK2 I Swipe reader clock 2
18 PFINT I Low voltage detect
19 KEYSTB O Serial-parallel IC3 STB
20 BUZZER O Buzzer output
21 IOB4 I/O Common I/O 8 (B4)
22 IOB3 I/O Common I/O 7 (B3)
23 IOA4 I/O Common I/O 6 (A4)
24 IOA3 I/O Common I/O 5 (A3)
25 RADOE O Serial-parallel IC2 OE
26 RADST O Serial-parallel IC2 ST
27 RXD2 I Common serial input 2
28 TXD2 O Common serial output 2
29 TXD1 O Common serial output 1 or
GPS receiver
30 RXD1 I Common serial input 1 + L34 or
GPS receiver
31 CLK O Common CLOCK
32 DATA O Common DATA
33 TXD0 O Radio data output
34 RXD0 I Radio data input
35 RADSQ I Radio squelch input
36 RADTXS I Radio TXS input
Pin No. Pin Name I/O Function
37 RDY I Not used
38 ALE O Not used
39 HOLD I Not used
40 HLDA O Not used
41 BLCK O Not used
42 RD O Read signal
43 BHE O Not used
44 WR O Write signal
45 DSPCS O DSP chip select
46 SRAMCE O S-RAM CE1
47 LCDCS O LCD ASSY CS
48 FROMCE - Flash ROM CE
49~59 A19~A9 - Address bus 19~9
60 VCC - Power supply
61 A8 - Address bus 8
62 VSS - GND
63~70 A7~A0 - Address bus 7~0
71 KBCLK I PC/AT keyboard CLOCK
72 DSPRINT I DSP TX interrupt
73 DSPTINT I DSP RX interrupt
74 DSPRST O DSP reset output
75 SRSEL I Swipe reader select
76 SRDAT1 I Swipe reader data 1
77 SRDAT2 I Swipe reader data 2
78 LEDLCK O Serial-parallel IC1 LCK
79~86 D7~D0 - Data bus 7~0
87~90 KEY3~KEY0 I Key input 3~0
91 LCDRST O LCD ASSY reset
92 TEMP I Temperature detect
93 RTCCE O RTC CE0
94 AVSS - Analog power supply (GND)
95 MICCM I MIC CM terminal input
96 VREF - Reference voltage
97 AVCC - Analog power supply (5C)
98 IOB2 I/O Common I/O 4 (B2)
99 IOB1 I/O Common I/O 3 (B1)
100 IOA2 I/O Common I/O 2 (A2)
SEMICONDUCTOR DATA