LG 37LH50YD User manual

LCD TV
SERVICE MANUAL
CAUTION
BEFORE SERVICING THE CHASSIS,
READ THE SAFETY PRECAUTIONS IN THIS MANUAL.
CHASSIS : LB91B
MODEL : 37LH50YD 37LH50YD-AA
North/Latin A erica http://aic.lgservice.co
Europe/Africa http://eic.lgservice.co
Asia/Oceania http://biz.lgservice.co
Internal Use Only
P/NO : MFL60020305 (0903-REV00) Printed in Korea

LGE Internal Use OnlyCopyright ©2009 LG Electronics. Inc. All right reserved.
Only for training and service p rposes
- 2 -
CONTENTS
CONTENTS .............................................................................................. 2
PRODUCT SAFETY ..................................................................................3
SPECIFICATION ........................................................................................6
ADJUSTMENT INSTRUCTION .................................................................9
BLOCK DIAGRAM...................................................................................13
EXPLODED VIEW .................................................................................. 14
SVC. S EET ...............................................................................................

LGE Internal Use OnlyCopyright ©2009 LG Electronics. Inc. All right reserved.
Only for training and service p rposes
- 3 -
SAFETY PRECAUTIONS
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by in the
Schematic Diagram and Exploded View.
It is essential that these special safety parts sho ld be replaced with the same components as recommended in this man al to prevent
Shock, Fire, or other Hazards.
Do not modify the original design witho t permission of man fact rer.
General Guidance
An isolation Transformer should always be used d ring the
servicing of a receiver whose chassis is not isolated from the AC
power line. Use a transformer of adeq ate power rating as this
protects the technician from accidents res lting in personal inj ry
from electrical shocks.
It will also protect the receiver and it's components from being
damaged by accidental shorts of the circ itry that may be
inadvertently introd ced d ring the service operation.
If any f se (or F sible Resistor) in this TV receiver is blown,
replace it with the specified.
When replacing a high wattage resistor (Oxide Metal Film Resistor,
over 1W), keep the resistor 10mm away from PCB.
Keep wires away from high voltage or high temperat re parts.
Before returning the receiver to the customer,
always perform an AC leakage current check on the exposed
metallic parts of the cabinet, s ch as antennas, terminals, etc., to
be s re the set is safe to operate witho t damage of electrical
shock.
Leakage Current Cold Check(Antenna Cold Check)
With the instr ment AC pl g removed from AC so rce, connect an
electrical j mper across the two AC pl g prongs. Place the AC
switch in the on position, connect one lead of ohm-meter to the AC
pl g prongs tied together and to ch other ohm-meter lead in t rn to
each exposed metallic parts s ch as antenna terminals, phone
jacks, etc.
If the exposed metallic part has a ret rn path to the chassis, the
meas red resistance sho ld be between 1MΩ and 5.2MΩ.
When the exposed metal has no ret rn path to the chassis the
reading m st be infinite.
An other abnormality exists that m st be corrected before the
receiver is ret rned to the c stomer.
Leakage Current ot Check (See below Fig re)
Pl g the AC cord directly into the AC o tlet.
Do not use a line Isolation Transformer during this check.
Connect 1.5K/10watt resistor in parallel with a 0.15 F capacitor
between a known good earth gro nd (Water Pipe, Cond it, etc.)
and the exposed metallic parts.
Meas re the AC voltage across the resistor sing AC voltmeter
with 1000 ohms/volt or more sensitivity.
Reverse pl g the AC cord into the AC o tlet and repeat AC voltage
meas rements for each exposed metallic part. Any voltage
meas red m st not exceed 0.75 volt RMS which is corresponds to
0.5mA.
In case any meas rement is o t of the limits specified, there is
possibility of shock hazard and the set m st be checked and
repaired before it is ret rned to the c stomer.
Leakage Current ot Check circuit
1.5 Kohm/10W
To Instr ment's
exposed
METALLIC PARTS
Good Earth Gro nd
s ch as WATER PIPE,
CONDUIT etc.
AC Volt-meter
When 25A is impressed between Earth and 2nd Gro nd
for 1 second, Resistance m st be less than 0.1
*Base on Adj stment standard
IMPORTANT SAFETY NOTICE
0.15 F
Ω

LGE Internal Use OnlyCopyright ©2009 LG Electronics. Inc. All right reserved.
Only for training and service p rposes
- 4 -
CAUTION: Before servicing receivers covered by this service
man al and its s pplements and addenda, read and follow the
SAFETY PRECAUTIONS on page 3 of this p blication.
NOTE: If nforeseen circ mstances create conflict between the
following servicing preca tions and any of the safety preca tions on
page 3 of this p blication, always follow the safety preca tions.
Remember: Safety First.
General Servicing Preca tions
1. Always npl g the receiver AC power cord from the AC power
so rce before;
a. Removing or reinstalling any component, circ it board
mod le or any other receiver assembly.
b. Disconnecting or reconnecting any receiver electrical pl g or
other electrical connection.
c. Connecting a test s bstit te in parallel with an electrolytic
capacitor in the receiver.
CAUTION: A wrong part s bstit tion or incorrect polarity
installation of electrolytic capacitors may res lt in an
explosion hazard.
2. Test high voltage only by meas ring it with an appropriate high
voltage meter or other voltage meas ring device (DVM,
FETVOM, etc) eq ipped with a s itable high voltage probe.
Do not test high voltage by "drawing an arc".
3. Do not spray chemicals on or near this receiver or any of its
assemblies.
4. Unless specified otherwise in this service man al, clean
electrical contacts only by applying the following mixt re to the
contacts with a pipe cleaner, cotton-tipped stick or comparable
non-abrasive applicator; 10% (by vol me) Acetone and 90% (by
vol me) isopropyl alcohol (90%-99% strength)
CAUTION: This is a flammable mixt re.
Unless specified otherwise in this service man al, l brication of
contacts in not req ired.
5. Do not defeat any pl g/socket B+ voltage interlocks with which
receivers covered by this service man al might be eq ipped.
6. Do not apply AC power to this instr ment and/or any of its
electrical assemblies nless all solid-state device heat sinks are
correctly installed.
7. Always connect the test receiver gro nd lead to the receiver
chassis gro nd before connecting the test receiver positive
lead.
Always remove the test receiver gro nd lead last.
8. Use with this receiver only the test fixtures s ecified in this
service manual.
CAUTION: Do not connect the test fixt re gro nd strap to any
heat sink in this receiver.
Electrostatically Sensitive (ES) Devices
Some semicond ctor (solid-state) devices can be damaged easily
by static electricity. S ch components commonly are called
Electrostatically Sensitive (ES) Devices. Examples of typical ES
devices are integrated circ its and some field-effect transistors and
semicond ctor "chip" components. The following techniq es
sho ld be sed to help red ce the incidence of component
damage ca sed by static by static electricity.
1. Immediately before handling any semicond ctor component or
semicond ctor-eq ipped assembly, drain off any electrostatic
charge on yo r body by to ching a known earth gro nd.
Alternatively, obtain and wear a commercially available
discharging wrist strap device, which sho ld be removed to
prevent potential shock reasons prior to applying power to the
nit nder test.
2. After removing an electrical assembly eq ipped with ES
devices, place the assembly on a cond ctive s rface s ch as
al min m foil, to prevent electrostatic charge b ild p or
expos re of the assembly.
3. Use only a gro nded-tip soldering iron to solder or nsolder ES
devices.
4. Use only an anti-static type solder removal device. Some solder
removal devices not classified as "anti-static" can generate
electrical charges s fficient to damage ES devices.
5. Do not se freon-propelled chemicals. These can generate
electrical charges s fficient to damage ES devices.
6. Do not remove a replacement ES device from its protective
package ntil immediately before yo are ready to install it.
(Most replacement ES devices are packaged with leads
electrically shorted together by cond ctive foam, al min m foil
or comparable cond ctive material).
7. Immediately before removing the protective material from the
leads of a replacement ES device, to ch the protective material
to the chassis or circ it assembly into which the device will be
installed.
CAUTION: Be s re no power is applied to the chassis or circ it,
and observe all other safety preca tions.
8. Minimize bodily motions when handling npackaged
replacement ES devices. (Otherwise harmless motion s ch as
the br shing together of yo r clothes fabric or the lifting of yo r
foot from a carpeted floor can generate static electricity
s fficient to damage an ES device.)
General Soldering G idelines
1. Use a gro nded-tip, low-wattage soldering iron and appropriate
tip size and shape that will maintain tip temperat re within the
range or 500°F to 600°F.
2. Use an appropriate ga ge of RMA resin-core solder composed
of 60 parts tin/40 parts lead.
3. Keep the soldering iron tip clean and well tinned.
4. Thoro ghly clean the s rfaces to be soldered. Use a mall wire-
bristle (0.5 inch, or 1.25cm) br sh with a metal handle.
Do not se freon-propelled spray-on cleaners.
5. Use the following nsoldering techniq e
a. Allow the soldering iron tip to reach normal temperat re.
(500°F to 600°F)
b. Heat the component lead ntil the solder melts.
c. Q ickly draw the melted solder with an anti-static, s ction-
type solder removal device or with solder braid.
CAUTION: Work q ickly to avoid overheating the circ it
board printed foil.
6. Use the following soldering techniq e.
a. Allow the soldering iron tip to reach a normal temperat re
(500°F to 600°F)
b. First, hold the soldering iron tip and solder the strand against
the component lead ntil the solder melts.
c. Q ickly move the soldering iron tip to the j nction of the
component lead and the printed circ it foil, and hold it there
only ntil the solder flows onto and aro nd both the
component lead and the foil.
CAUTION: Work q ickly to avoid overheating the circ it
board printed foil.
d. Closely inspect the solder area and remove any excess or
splashed solder with a small wire-bristle br sh.
SERVICING PRECAUTIONS

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Only for training and service p rposes
- 5 -
IC Remove/Replacement
Some chassis circ it boards have slotted holes (oblong) thro gh
which the IC leads are inserted and then bent flat against the
circ it foil. When holes are the slotted type, the following techniq e
sho ld be sed to remove and replace the IC. When working with
boards sing the familiar ro nd hole, se the standard techniq e
as o tlined in paragraphs 5 and 6 above.
Removal
1. Desolder and straighten each IC lead in one operation by gently
prying p on the lead with the soldering iron tip as the solder
melts.
2. Draw away the melted solder with an anti-static s ction-type
solder removal device (or with solder braid) before removing the
IC.
Re lacement
1. Caref lly insert the replacement IC in the circ it board.
2. Caref lly bend each IC lead against the circ it foil pad and
solder it.
3. Clean the soldered areas with a small wire-bristle br sh.
(It is not necessary to reapply acrylic coating to the areas).
"Small-Signal" Discrete Transistor
Removal/Replacement
1. Remove the defective transistor by clipping its leads as close as
possible to the component body.
2. Bend into a "U" shape the end of each of three leads remaining
on the circ it board.
3. Bend into a "U" shape the replacement transistor leads.
4. Connect the replacement transistor leads to the corresponding
leads extending from the circ it board and crimp the "U" with
long nose pliers to ins re metal to metal contact then solder
each connection.
Power Output, Transistor Device
Removal/Replacement
1. Heat and remove all solder from aro nd the transistor leads.
2. Remove the heat sink mo nting screw (if so eq ipped).
3. Caref lly remove the transistor from the heat sink of the circ it
board.
4. Insert new transistor in the circ it board.
5. Solder each transistor lead, and clip off excess lead.
6. Replace heat sink.
Diode Removal/Replacement
1. Remove defective diode by clipping its leads as close as
possible to diode body.
2. Bend the two remaining leads perpendic lar y to the circ it
board.
3. Observing diode polarity, wrap each lead of the new diode
aro nd the corresponding lead on the circ it board.
4. Sec rely crimp each connection and solder it.
5. Inspect (on the circ it board copper side) the solder joints of
the two "original" leads. If they are not shiny, reheat them and if
necessary, apply additional solder.
Fuse and Conventional Resistor
Removal/Replacement
1. Clip each f se or resistor lead at top of the circ it board hollow
stake.
2. Sec rely crimp the leads of replacement component aro nd
notch at stake top.
3. Solder the connections.
CAUTION: Maintain original spacing between the replaced
component and adjacent components and the circ it board to
prevent excessive component temperat res.
Circuit Board Foil Repair
Excessive heat applied to the copper foil of any printed circ it
board will weaken the adhesive that bonds the foil to the circ it
board ca sing the foil to separate from or "lift-off" the board. The
following g idelines and proced res sho ld be followed whenever
this condition is enco ntered.
At IC Connections
To repair a defective copper pattern at IC connections se the
following proced re to install a j mper wire on the copper pattern
side of the circ it board. (Use this techniq e only on IC
connections).
1. Caref lly remove the damaged copper pattern with a sharp
knife. (Remove only as m ch copper as absol tely necessary).
2. caref lly scratch away the solder resist and acrylic coating (if
sed) from the end of the remaining copper pattern.
3. Bend a small "U" in one end of a small ga ge j mper wire and
caref lly crimp it aro nd the IC pin. Solder the IC connection.
4. Ro te the j mper wire along the path of the o t-away copper
pattern and let it overlap the previo sly scraped end of the good
copper pattern. Solder the overlapped area and clip off any
excess j mper wire.
At Other Connections
Use the following techniq e to repair the defective copper pattern
at connections other than IC Pins. This techniq e involves the
installation of a j mper wire on the component side of the circ it
board.
1. Remove the defective copper pattern with a sharp knife.
Remove at least 1/4 inch of copper, to ens re that a hazardo s
condition will not exist if the j mper wire opens.
2. Trace along the copper pattern from both sides of the pattern
break and locate the nearest component that is directly
connected to the affected copper pattern.
3. Connect ins lated 20-ga ge j mper wire from the lead of the
nearest component on one side of the pattern break to the lead
of the nearest component on the other side.
Caref lly crimp and solder the connections.
CAUTION: Be s re the ins lated j mper wire is dressed so the
it does not to ch components or sharp edges.

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SPECIFICATION
NOTE : Specifications and others are subject to change without notice for improvement
.
4. Electrical specification
(1) Module General Specification
1. Application range
This specification is applied to the LCD TV used LB91B
chassis.
2. Requirement for Test
Each part is tested as below without special appointment.
1) Temperature : 25±5ºC (77±9ºF), CST : 40±5ºC
2) Relative Humidity : 65±10%
3) Power Voltage : Standard input voltage (100-240V@50/60Hz)
* Standard Voltage of each products is marked by models.
4) Specification and performance of each parts are followed
each drawing and specification by part number in
accordance with BOM.
5) The receiver must be operated for about 5 minutes prior to
the adjustment.
3. Test method
1) Performance: LGE TV test method followed
2) Demanded other specification
- Safety: IEC/EN60065
- EMI: EN55013
No Item Specification Remark
1 Screen Device 37” wide Color Display module LCD
2 Aspect Ratio 16:9
3 LCD Module 37” TFT LCD FHD 100Hz LGD(FHD/200Hz)
4 Operating Environment Temp.: 0 ~ 50°C 240h
Humidity : Ta=40°C, 90%RH, 240h
5 Storage Environment Temp.: -20 ~ 60°C 240h
6 Input Voltage AC100-240V~, 50/60Hz
7 Power Consumption Power on (Green) LCD(Module) + Backlight(Lamp)
Typ : 133.88 W
8 Module Size 760.0 (H) x 450.0 (V) x 48.0 (D) Wihtout inverter
9 Pixel Pitch 0.42675 (H) x 0.42675 (V)
10 Back Light EEFL
11 Display Colors 1.06Billion
12 Coating 3H, Semi-glare

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Only for training and service p rposes
5. Chroma& Brightness
5.1 Mod le optical specification
1) Optical characteristics are determined after the nit has been ‘ON’ and stable in a dark environment at 25±2°C
2) S rface l minance is the l minance val e at center 1-point across the LCD s rface 50cm from the s rface with all pixels
displaying white.
6. Component Video Input (Y, CB/PB, CR/PR)
No Specification Remark
Resol tion H-freq(kHz) V-freq(Hz)
1. 720x480 15.73 60.00 SDTV,DVD 480i
2. 720x480 15.63 59.94 SDTV,DVD 480i
3. 720x480 31.47 59.94 480p
4. 720x480 31.50 60.00 480p
5. 720x576 15.625 50.00 SDTV,DVD 625 Line
6. 720x576 31.25 50.00 HDTV 576p
7. 1280x720 45.00 50.00 HDTV 720p
8. 1280x720 44.96 59.94 HDTV 720p
9. 1280x720 45.00 60.00 HDTV 720p
10. 1920x1080 31.25 50.00 HDTV 1080i
11. 1920x1080 33.75 60.00 HDTV 1080i
12. 1920x1080 33.72 59.94 HDTV 1080i
13. 1920x1080 56.250 50 HDTV 1080p
14. 1920x1080 67.43/67.5 59.94/60 HDTV 1080p
No. Item Specification Min. Typ. Max. Remark
1. Viewing Angle<CR>10> Right/Left/Up/Down 89 CR > 10
2. L minance L minance (cd/m2) 400 500 PSM: Vivid, CSM: Cool
White (100IRE)
Variation - 1.3
3. Contrast Ratio CR 1000 1400 All white/ All black
4. CIE Color Coordinates White WX 0.279
WY Typ 0.292 Typ
RED Xr - 0.03 0.639 +0.03 PSM: Vivid, CSM: Cool
Yr 0.334 White (85IRE)
Green Xg 0.289
Yg 0.606
Bl e Xb 0.146
Yb 0.065

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No Specification Proposed Remark
Resol tion H-freq(kHz) V-freq(Hz) Pixel Clock(MHz)
1. 720*400 31.468 70.08 28.321 For only DOS mode
2. 640*480 31.469 59.94 25.17 VESA
Inp t 848*480 60Hz, 852*480 60Hz
-> 640*480 60Hz Display
3. 800*600 37.879 60.31 40.00 VESA
4. 1024*768 48.363 60.00 65.00 VESA(XGA)
5. 1280*768 47.78 59.87 79.5 WXGA
6. 1360*768 47.72 59.8 84.75 WXGA
7. 1280*1024 63.595 60.0 108.875 SXGA FHD model
8. 1920*1080 66.587 59.93 138.625 WUXGA FHD model
7. RGB (PC)
8. DMI Input (PC/DTV)
(1) DTV Mode
No Resol tion H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) Proposed Remark
1. 720*400 31.468 70.08 28.321 HDCP
2. 640*480 31.469 59.94 25.17 VESA HDCP
3. 800*600 37.879 60.31 40.00 VESA HDCP
4. 1024*768 48.363 60.00 65.00 VESA(XGA) HDCP
5. 1280*768 47.78 59.87 79.5 WXGA HDCP
6. 1360*768 47.72 59.8 84.75 WXGA HDCP
7. 1280*1024 63.595 60.0 108.875 SXGA HDCP
8. 1920*1080 67.5 60 148.5 WUXGA HDCP
(2) PC Mode
No Resol tion H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) Proposed Remark
1. 720*480 31.469 /31.5 59.94 /60 27.00/27.03 SDTV 480P
2. 720*576 31.25 50 54 SDTV 576P
3. 1280*720 37.500 50 74.25 HDTV 720P
4. 1280*720 44.96 /45 59.94 /60 74.17/74.25 HDTV 720P
5. 1920*1080 33.72 /33.75 59.94 /60 74.17/74.25 HDTV 1080I
6. 1920*1080 28.125 50.00 74.25 HDTV 1080I
7. 1920*1080 26.97 /27 23.97 /24 74.17/74.25 HDTV 1080P
8. 1920*1080 33.716 /33.75 29.976 /30.00 74.25 HDTV 1080P
9. 1920*1080 56.250 50 148.5 HDTV 1080P
10. 1920*1080 67.43 /67.5 59.94 /60 148.35/148.50 HDTV 1080P

LGE Internal Use OnlyCopyright ©2009 LG Electronics. Inc. All right reserved.
Only for training and service p rposes
- 9 -
ADJUSTMENT INSTRUCTION
1. Application Range
This specification sheet is applied to all of the LCD TV with
LB91B chassis.
2. Designation
1) The adj stment is according to the order which is
designated and which m st be followed, according to the
plan which can be changed only on agreeing.
2) Power Adj stment: Free Voltage
3) Magnetic Field Condition: Nil.
4) Inp t signal Unit: Prod ct Specification Standard
5) Reserve after operation: Above 5 Min tes (Heat R n)
Temperat re : at 25±5ºC
Relative h midity : 65±10%
Inp t voltage : 220V, 60Hz
6) Adj stment eq ipments: Color Analyzer (CA-210 or CA-
110), Pattern Generator(MSPG-925L or Eq ivalent), DDC
Adj stment Jig eq ipment, SVC remote controller
7) P sh The “IN STOP KEY” - For memory initialization.
3. Main PCB check process
* APC - After Man al-Insert, exec ting APC
* Boot file Download
(1) Exec te ISP program “Mstar ISP Utility” and then click
“Config” tab.
(2) Set as below, and then click “A to Detect” and check “OK”
message.
If “Error” is displayed, Check connection between
comp ter, jig, and set.
(3) Click “Read” tab, and then load download file (XXXX.bin)
by clicking “Read”.
(4) Click “Connect” tab. If “Can’t” is displayed, check
connection between comp ter, jig, and set.
(5) Click “A to” tab and set as below
(6) Click “R n”.
(7) After downloading, check “OK” message.
* USB DOWNLOAD(*.epk file download)
(1) P t the USB Stick to the USB socket.
(2) A tomatically detecting pdate file in USB Stick.
- If yo r downloaded program version in USB Stick is Low,
it didn’t work. B t yo r downloaded version is High, USB
data is a tomatically detecting
(3) Show the message “Copying files from memory”
filexxx.bin
(7) .........OK
(6)
(5)
(1)
Please Check the Speed : To se speed between
from 200KHz to 400KHz
(2)
filexxx.bin
(3) (4)
Case1 : Software version p
1. After downloading S/W by USB, TV set will reboot
a tomatically
2. P sh “In-stop” key
3. P sh “Power on” key
4. F nction inspection
5. After f nction inspection, P sh “I n-stop” key.
Case2 : F nction check at the assembly line
1. When TV set is entering on the assembly line, P sh
“In-stop” key at first.
2. P sh “Power on” key for t rning it on.
-> If yo p sh “Power on” key, TV set will recover
channel information by itself.
3. After f nction inspection, P sh “In-stop” key.

(4) Updating is staring.
(5) After pdating is complete, The TV will restart a tomatically.
(6) If TV t rns on, check yo r pdated version and Tool
option. (refer to the next page abo t tool option)
* If downloading version is higher than yo r TV have, TV
can lost all channel data. In this case, yo have to
channel recover. If all channel data is cleared, yo didn’t
have a DTV/ATV test on prod ction line.
* After downloading, have to adjust Tool Option again.
(1) Enter ‘EZ ADJUST’ mode by p shing ‘ADJ’ key.
(2) Select each ‘Tool Option(1~4)’ and p sh ‘OK’ or ‘G’ key.
(3) Correct the n mber. (Each model has their n mber.)
(4) Correction Tool option is complete.
3.1. ADC Process
• Inp t signal : Component 480i
• Signal eq ipment displays.
- Component 480I
MODEL: 209 in Pattern Generator(480i Mode)
PATTERN : 65 in Pattern Generator(MSPG-925 SERIES)
* Yo need not connecting RGB(D-s b) cable. Beca se
ADC in RGB PC mode ses TV internal pattern.
• After enter Service Mode by p shing “ADJ” key,
• Enter Internal ADC mode by p shing “G” key at “5. ADC
Calibration”
<Ca tion> Using ‘power on’ b tton of the Adj stment R/C , power
on TV.
* ADC Calibration Protocol (RS232)
Adj st Seq ence
• aa 00 00 [Enter Adj st Mode]
• xb 00 40 [Component1 Inp t (480i)]
• ad 00 10 [Adj st 480i Comp1]
• xb 00 60 [RGB Inp t (1024*768)]
• ad 00 10 [Adj st 1024*768 RGB]
• aa 00 90 End Adj st mode
* Req ired eq ipment : factory Service Remote control
3.2. Function Check
(1) Check display and so nd
- Check Inp t and Signal items. (cf. work instr ctions)
1) TV
2) AV 1/2
3) COMPONENT (480i)
4) RGB (PC : 1024 x 768 @ 60hz)
5) HDMI
6) PC A dio In
* Display and So nd check is exec ted by remote control.
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Only for training and service p rposes
Item CMD1 CMD2 Data0
Adj st A A 0 0 When transfer the ‘Mode In’,
‘Mode In’ Carry the command.
ADC Adj st A D 1 0 A tomatically adj stment
(The se of a internal pattern)
Adj stment pattern
ADC Calibration
ADC Comp 480i NG
ADC Comp 1080p NG
ADC RGB NG
Start Reset
EZ ADJUST
0. Tool Option1
1. Tool Option2
2. Tool Option3
3. Tool Option4
4. Co ntry Gro p
5. ADC Calibration
6. White Balance
7. Test Pattern
8. EDID D/L
9. S b B/C
- For New Zealand, Australia
Model
option 32LH50YD 37LH50YD 42LH50YD 47LH50YD 55LH50YD
Tool Option1 (16833) (25025) (33217) (45505)
Tool Option2 (3144) (3144) (3144) (3144)
Tool Option3 (52132) (52132) (52132) (52132)
Tool Option4 (4352) (4352) (4352) (4352)
Country Group AU AU AU AU AU
- For ingapore
Model
option 32LH50YD 37LH50YD 42LH50YD 47LH50YD 55LH50YD
Tool Option1 (16833) (25025) (33217) (45505)
Tool Option2 (3144) (3144) (3144) (3144)
Tool Option3 (51876) (51876) (51876) (51876)
Tool Option4 (4352) (4352) (4352) (4352)
Country Group G G G G G
(20929)
(3144)
(52132)
(4352)
(20929)
(3144)
(4352)
(51876)

4. Total Assembly line process
4.1. Adjustment Preparation
· W/B Eq ipment condition
CA210 : CH 9, Test signal : Inner pattern (85IRE)
· Above 5 min tes H/r n in the inner pattern. (“power on” key
of adj st remote control)
* Connecting picture of the measuring instrument
(On A tomatic control)
Inside PATTERN is sed when W/B is controlled. Connect to
a to controller or p sh Adj stment R/C POWER ON -> Enter
the mode of White-Balance, the pattern will come o t
* Auto-control interface and directions
1) Adj st in the place where the infl x of light like floodlight
aro nd is blocked. (ill mination is less than 10 x).
2) Adhere closely the Color Analyzer (CA210) to the mod le
less than 10cm distance, keep it with the s rface of the
Mod le and Color Analyzer’s Prove vertically.(80~100°).
3) Aging time
- After aging start, keep the power on (no s spension of
power s pply) and heat-r n over 15min tes.
- Using ‘no signal’ or ‘f ll white pattern’ or the others, check
the back light on.
• A to adj stment Map(RS-232C)
** Ca tion **
Color Temperat re : COOL, Medi m, Warm.
One of R Gain/G Gain/ B Gain sho ld be kept on 0xC0, and
adj st other two lower than C0.
(when R/G/B Gain are all C0, it is the FULL Dynamic Range
of Mod le)
* Manual W/B process using adjusts Remote control.
• After enter Service Mode by p shing “ADJ” key,
• Enter White Balance by p shing “G” key at “3.White Balance”.
- After all adj stments, press “IN START” key and compare
Tool option val e with its BOM, if it is correctly same then
npl g the AC cable.
If it is not same, then correct it same with BOM and npl g AC
cable.
For correct it to the model’s mod le from factory JIG model.
- P sh The “IN STOP KEY” after completing the f nction
inspection.
4.2. DDC EDID Write (RGB 128Byte )
• Connect D-s b Signal Cable to D-s b Jack.
• Write EDID Data to EEPROM(24C02) by sing DDC2B
protocol.
• Check whether written EDID data is correct or not.
* For SVC main Ass’y, EDID have to be downloaded to Insert
Process in advance.
4.3. DDC EDID Write ( DMI 256Byte)
• Connect HDMI Signal Cable to HDMI Jack.
• Write EDID Data to EEPROM(24C02) by sing DDC2B
protocol.
• Check whether written EDID data is correct or not.
* For SVC main Ass’y, EDID have to be downloaded to Insert
Process in advance.
- 11 - LGE Internal Use OnlyCopyright ©2009 LG Electronics. Inc. All right reserved.
Only for training and service p rposes
Cool 11,000k ºK X=0.276(±0.002)
Y=0.283(±0.002) <Test Signal>
Medi m 9,300k ºK X=0.285(±0.002) Inner pattern
Y=0.293(±0.002) (216gray,85IRE)
Warm 6,500k ºK X=0.313(±0.002)
Y=0.329(±0.002)
F ll White Pattern
COLOR
ANALYZER
TYPE: CA-210
RS-232C Comm nication
CA-210
RS-232C COMMAND MIN CENTER MAX
[CMD ID DATA] (DEFAULT)
Cool Mid Warm Cool Mid Warm
R Gain jg Ja jd 00 172 192 192 255
G Gain jh Jb je 00 172 192 192 255
B Gain ji Jc jf 00 192 192 172 255
R C t 64 64 64 128
G C t 64 64 64 128
B C t 64 64 64 128
Index Eq ipment -> Wireless nit Wireless nit -> Set
CMD1 CMD2 Set ID Data CMD1 CMD2 CMD3 CMD4
Start w b 0 00 1F 04 00 00
Gain start w b 0 10 1F 04 00 10
Gain End w b 0 1F 1F 04 00 1F
Offset Start w b 0 20 1F 04 00 20
Offset End w b 0 2F 1F 04 00 2F
End w b 0 FF 1F 04 00 FF
White Balance
Color Temp. Cool
R-Gain 172
G-Gain 172
B-Gain 192
R-C t 64
G-C t 64
B-C t 64
Test-Pattern ON
Reset To Set
EZ ADJUST
0. Tool Option1
1. Tool Option2
2. Tool Option3
3. Tool Option4
4. Co ntry Gro p
5. ADC Calibration
6. White Balance
7. Test Pattern
8. EDID D/L
9. S b B/C

4.4. EDID DATA
1) All Data : HEXA Val e
2) Changeable Data :
*: Serial No : Controlled / Data:01
**: Month : Controlled / Data:00
***:Year : Controlled
****:Check s m
- Auto Download
• After enter Service Mode by p shing “ADJ” key,
• Enter EDID D/L mode.
• Enter “START” by p shing “OK” key.
* EDID data and Model option download (RS232)
- Manual Download
* Ca tion
1) Use the proper signal cable for EDID Download
- Analog EDID : Pin3 exists
- Digital EDID : Pin3 exists
2) Nerver connect HDMI & D-s b Cable at the same time.
3) Use the proper cables below for EDID Writing.
4) Download HDMI1, HDMI2, HDMI3 separately beca se
each data is different.
(1) FHD RGB EDID data
(2) FHD HDMI EDID data
* Detail EDID Options are below
ⓐProd ct ID 0001
ⓑSerial No: Controlled on prod ction line.
ⓒMonth, Year: Controlled on prod ction line:
ex) Monthly : ‘09’ -> ‘09’
Year : ‘2006’ -> ‘10’
ⓓModel Name(Hex):
ⓔChecks m: Changeable by total EDID data.
ⓕVendor Specific(HDMI)
012 3 4 5 67 8 9 ABCDEF
00 00 FF FF FF FF FF FF 00 1E 6D ⓐⓑ
10 ⓒ01 03 68 73 41 78 0A CF 74 A3 57 4C B0 23
20 09 48 4C A1 08 00 81 80 61 40 45 40 31 40 01 01
30 01 01 01 01 01 01 02 3A 80 18 71 38 2D 40 58 2C
40 45 00 7E 8A 42 00 00 1E 01 1D 00 72 51 D0 1E 20
50 6E 28 55 00 7E 8A 42 00 00 1E 00 00 00 FD 00 3A
60 3E 1E 53 10 00 0A 20 20 20 20 20 20 ⓓ
70 ⓓ00 ⓔ
80 FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
90 FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
A0 FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
B0 FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
C0 FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
D0 FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
E0 FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
F0 FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
LGE Internal Use OnlyCopyright ©2009 LG Electronics. Inc. All right reserved.
Only for training and service p rposes
- 12 -
EZ ADJUST
0. Tool Option1
1. Tool Option2
2. Tool Option3
3. Tool Option4
4. Co ntry Gro p
5. ADC Calibration
6. White Balance
7. Test Pattern
8. EDID D/L
9. S b B/C
HDMI1 NG
HDMI2 NG
HDMI3 NG
RGB NG
Start Reset
EDID D/L
HDMI1 OK
HDMI2 OK
HDMI3 OK
RGB OK
Start Reset
EDID D/L
MODEL MODEL NAME(HEX)
all 00 00 00 FC 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20
INPUT MODEL NAME(HEX)
HDMI1 67030C001000B82D
HDMI2 67030C002000B82D
HDMI3 67030C003000B82D
HDMI4 67030C004000B82D
Item CMD1 CMD2 Data0
Download A A 0 0 When transfer the ‘Mode In’,
‘Mode In’ Carry the command.
Download A E 00 10 A tomatically Download
(The se of a internal pattern)
Item
Man fact rer ID
Version
Revision
Condition
GSM
Digital : 1
Digital : 3
Data(Hex)
1E6D
01
03
D-s b to D-s b DVI-D to HDMI or HDMI to HDMI
For HDMI EDIDFor Analog EDID
012 3 4 5 67 8 9 ABCDEF
00 00 FF FF FF FF FF FF 00 1E 6D ⓐⓑ
10 ⓒ01 03 80 73 41 78 0A CF 74 A3 57 4C B0 23
20 09 48 4C A1 08 00 81 80 61 40 45 40 31 40 01 01
30 01 01 01 01 01 01 02 3A 80 18 71 38 2D 40 58 2C
40 45 00 7E 8A 42 00 00 1E 01 1D 00 72 51 D0 1E 20
50 6E 28 55 00 7E 8A 42 00 00 1E 00 00 00 FD 00 3A
60 3E 1E 53 10 00 0A 20 20 20 20 20 20 ⓓ
70 ⓓ01 ⓔ
80 02 03 26 F1 4E 10 1F 84 13 05 14 03 02 12 20 21
90 22 15 01 26 15 07 50 09 57 07 ⓕ
A0 ⓕE3 05 03 01 01 1D 80 18 71 1C 16 20 58 2C
B0 25 00 7E 8A 42 00 00 9E 01 1D 00 80 51 D0 0C 20
C0 40 80 35 00 7E 8A 42 00 00 1E 02 3A 80 18 71 38
D0 2D 40 58 2C 45 00 7E 8A 42 00 00 1E 66 21 50 B0
E0 51 00 1B 30 40 70 36 00 7E 8A 42 00 00 1E 00 00
F0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 F9

LGE Internal Use OnlyCopyright ©2009 LG Electronics. Inc. All right reserved.
Only for training and service p rposes
- 13 -
BLOCK DIAGRAM
DDR2 (1Gbit)
Qimonda / Hynix
NAND Flash
(512Mbit)
Digita l A dio (Optic )
Digital AMP
NTP3100L
RS-232C (Ctrl./SVC)
I2S
DDR_Data[0:15], DQS, DM … Addr.[ ], ctrl. data
MAX3232
RS232 IC
Sat rn6
Sat rn6
Data [0 … 7]
DTV IF +/-
Compone nt 1
Y Pb Pr
A dio L/R
Addr[0…1], CS …
Phone (for RG B)
SPDI F
RX/TX RX/TX
T ner CVBS, SIF
TS_Serial In TS_clk, Sync, Val, Err TS_Parallel In[0-7]l
SCL, SDA_3.3V
CVBS
LCD Mod le
(120Hz)
MST7323
FRC IC
DDR2 256M
Qimonda/Hynix
LVDS
B ffer CE6355
Intel Demod.
CVBS Y Pb Pr RGB/H/V
EEPROM
Compone nt 2
AV 1 AV 2
RGB
A dio L/R
USB2.0
USB DP/DM
MIC2019
O.C. Protector
+5V+5V
Serial Flash
(2Mbit)
Serial Flash
(32Mbit)
SPI
EEPROM
(512K)
CM3212
Sensor
SCL, SDA_3.3V
SCL, SDA
HDMI 1
TDA9996
4x1
HDMI Switch
HDMI 2 HDMI 3 HDMI 4
5V_HDMI1, HPD1, DDC SCL/SDA, CLK, DATA 5V_HDMI2, HPD2, DDC SCL/SDA, CLK, DATA 5V_HDMI3, HPD3, DDC SCL/SDA, CLK, DATA 5V_HDMI4, HPD4, DDC SCL/SDA, CLK, DATA
CLK, DATA
SCL, SDA
XC5000
T ner
Side
Rear
DDR2 (512Mbit)
Qimonda / Hynix
DDR_Data[0:15], DQS, DM … Addr.[ ], ctrl. data
DDR2 256M
Qimonda/Hynix
Rear Side
A dio L/R A dio L/R A dio L/R A dio L/R
Side

- 14 - LGE Internal Use OnlyCopyright LG Electronics. Inc. All right reserved.
Only for training and service purposes
300
200
122 120
121
510
500
310
800
802
801
804
803
810
540
900
530
550
521
400
A2
A10
200T
200N
EXPLODED VIEW
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These
parts are identified by in the Schematic Diagram and EXPLODED VIEW.
It is essential that these special safety parts should be replaced with the same components as
recommended in this manual to prevent X-RADIATION, Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.
IMPORTANT SAFETY NOTICE

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
PCM_A[7]
PCM_A[6]
PCM_A[5]
PCM_A[4]
PCM_A[0]
PCM_A[1]
PCM_A[3]
PCM_A[2]
PCM_A[5]
PCM_A[3]
PCM_A[0]
PCM_A[6]
PCM_A[7]
PCM_A[4]
PCM_A[2]
PCM_A[1]
ISP_TXD
EEPROM_SDA 001:I20;001:Y14;006:AC25
IC102
HY27US08121B-TPCB
26 NC_17
27 NC_18
28 NC_19
29 I/O0
30 I/O1
31 I/O2
32 I/O3
33 NC_20
34 NC_21
35 NC_22
36 VSS_2
37 VCC_2
38 PRE
39 NC_23
40 NC_24
41 I/O4
42 I/O5
43 I/O6
44 I/O7
45 NC_25
46 NC_26
47 NC_27
48 NC_28
17
ALE
3
NC_3
6
NC_6
16
CLE
15
NC_10
14
NC_9
13
VSS_1
12
VCC_1
11
NC_8
10
NC_7
9
CE
8
RE
7
R/B
4
NC_4
5
NC_5
25 NC_16 24
NC_15
23
NC_14
2
NC_2
22
NC_13
21
NC_12
1
NC_1
20
NC_11
19
WP
18
WE
+3.3V
+3.3V +3.3V
SPI_DI
/PF_CE0
IC103
W25X32VSSIG
3
WP
2
DO
4
GND
1
CS
5DIO
6CLK
7HOLD
8VCC SPI_CS
+3.3V
+3.3V
+3.3V
MEMC_SDA
MEMC_SCL
Flash_WP_1
R184 22
R185 22
R248
1M
R224 0
AR102
22
AR103
22
/PF_CE0
001:C4 /PF_CE1
001:D6 /PF_OE
001:C4 /PF_WE
001:D7
PF_WP
001:A7
PF_ALE
001:D6
/F_RB
001:C3
AR100
22
AR101
22
/F_RB
/PF_OE
/PF_WE
/PF_CE1
PF_ALE
PF_WP
001:X13
PCM_A[0-7]
SPI_CS
SPI_CK
SPI_CK
SPI_DO
R100
0
SPI_DO
SPI_DI 001:G12
IR
005:C15
+3.3V_ST
EDID_WP 004:AB17;006:AK7;006:AN3;006:AN12;006:AN17
AMP_RST
007:K11
ERROR_OUT
008:M14
KEY2
005:G9
KEY1
005:G8
R217 100 USB_CTL 004:AL11
PWM0
C104
0.1uF
C106 0.1uF
C103
0.1uF
R203 33
R204 33
R126 1K
OPT
R104
10K
R105
10K
R129 3.9K
R221 33
R222 33
R223 33
R108
33
R120 4.7K
+3.3V
EEPROM_SDA
001:I20;001:M13;006:AC25
R123 1K
R125 1K
L102
EEPROM_SCL 001:I21;001:Y13;006:AC25
INV_CTL 008:M12
Flash_WP_1
PANEL_CTL
008:AE6
DBG_RX
POWER_ON/OFF1
USB_OCD 004:AO12
EEPROM_SCL
001:I21;001:M12;006:AC25
ISP_RXD
DSUB_DET
AV1_DET 004:L10
R102
0
X100
12MHz
POWER_DET
R1830
R244 100
R241 100
R232 100
R242 100
R234 100
R254 100
R252
10K
R226 0
R238 100
R246 100
SIDE_USB_DM004:AL13
R249
15K
OPT
R251
15K
OPT
SIDE_USB_DP004:AL14
R219 100 OPC_EN 009:AH20
PWM_DIM
008:M16;009:AH19
PWM0A_DIM
008:F11
PWM1
IC105
M24512-WMW6
3
E2
2
E1
4
VSS
1
E0
5SDA
6SCL
7WC
8VCC C100
0.1uF
R137
0
DBG_TX
DBG_RX R186 22
R187 22
LVDS_SEL
R250
4.7K
OPT
+3.3V
C105
10uF 6.3V
POWER_DET
LED_ON
L103
+5V_GENERAL
SDA_SUB/AMP
+3.3V
SCL_SUB/AMP
FE_TUNER_SDA
R127 1.2K
EEPROM_SDA
MEMC_SCL
EEPROM_SCL
R135 4.7K
R130 1.2K
MEMC_SDA
R136 4.7K
C111
20pF
50V
C112
20pF
50V
PCM_D[5]
PCM_D[6]
PCM_A[0-7]
001:M2
+3.3V
R159 1K
PWM1
R152 1K
OPT
PWM0
R160 1K
R151 1K
OPT
MODEL_OPT_2
R157
OPT
R149
+3.3V
MODEL_OPT_0
MODEL_OPT_3
MODEL_OPT_1
MODEL_OPT_4
R154
OPT
R147
OPT
MEMC_RESET R138 100
R140 0
R144
OPT
HDMI_SEL2
MODEL_OPT_4
001:Q20
MODEL_OPT_2
001:Q19
MODEL_OPT_0
001:Q18
COMP1_DET
COMP2_DET
AV2_DET
R181 100
OPT
R106
1K
OPT
R109 4.7K
R122 4.7K
5V_HDMI_2
5V_HDMI_1
5V_HDMI_4
PCM_A[11]
R169 0
PCM_D[6]
+3.3V
R168 0
R174 0
R107
10K
R124
10K
PCM_D[5]
R121
1K
PCM_A[11]
001:X8
R134 22
HDMI_SEL1
/FE_RESET
FE_TS_DATA_CLK 011:AG4
FE_TS_VAL 011:AH4
FE_TS_SYN 011:AI4
R176 0
OPT
FE_TS_SERIAL 011:AH4
FE_TUNER_SCL
+5V_GENERAL
R256 0
R255 0
/DEMOD_RESET R258 0
R110 0
R111 0
R119 0
R118 0
SB_MUTE R260 0
C107 15pF 50V
OPT
R163 0
R164 0
R166 0
DBG_TX
001:Y15;004:AF24
R243 100
R158
0
+5V_ST
R173 100
C102
10uF
6.3V
C101
4.7uF
10V
Q101
2SC3052
E
B
C
R165
0Q102
2SC3052
E
B
C
S6_Reset
R171
100
POWER_ON_DELAY
+3.3V_ST
R172
10K
+3.3V_ST
OPT
12
4 3
S6_Reset
Q1002
2SC3052
12V_DIP_DET
E
B
C
R114
1K
12V_DIP_DET
R142
0
R150
30K
OPT
+3.3V_ST
+24V
R131
10K
R132
OPT
POWER_DET
001:V19;001:AL11
+12V
R115
2.2K
12V_DIP_DET
+5V_GENERAL
R112
1K
12V_DIP_DET Q1001
2SC3052
12V_DIP_DET
E
B
C
R139
OPT
PWM1
PWM2
PWM2
R175 100
R177 0 HDMI_EQ_SEL
R178 100
C110
1uF
OPT
BIT_SEL 009:AH21
R182 100
R155 100
NTP_MUTE
007:X18
R117 2.2K R116 2.2K
MODEL_OPT_1
001:Q19
MODEL_OPT_3 001:Q20
IC104
MAX810RTR
1
GND
3
VCC 2RESET
IC101
NCP803SN293
1
GND
3VCC 2
RESET
FE_TUNER_SCL
FE_TUNER_SDA
SCL_SUB/AMP
SDA_SUB/AMP
R145
10K
OPT
R188 0
OPT
R189 100 HPD3
C109
4.7uF
OPT
R148
OPT
R146 R156
R143
OPT
R153
OPT
IC100
LGE3369A (Saturn6 Non RM)
HWRESET
D4
PCMD0/CI_D0
AC16
PCMD1/CI_D1
AA15
PCMD2/CI_D2
AA16
PCMD3/CI_D3
AC6
PCMD4/CI_D4
Y10
PCMD5/CI_D5
Y11
PCMD6/CI_D6
Y12
PCMD7/CI_D7
Y13
PCM_A0/CI_A0
AB16
PCM_A1/CI_A1
AC15
PCM_A2/CI_A2
AC14
PCM_A3/CI_A3
AB14
PCM_A4/CI_A4
AC12
PCM_A5/CI_A5
AB8
PCM_A6/CI_A6
AC13
PCM_A7/CI_A7
AA9
PCM_A8/CI_A8
AB5
PCM_A9/CI_A9
AA4
PCM_A10/CI_A10
V4
PCM_A11/CI_A11
Y4
PCM_A12/CI_A12
AB9
PCM_A13/CI_A13
AA7
PCM_A14/CI_A14
AD6
PCM_RST/CI_RST
AA14
PCM_CD/CI_CD
AB18
/PCM_OE
Y5
PCM_REG/CI_CLK
AB15
PCM_WAIT/CI_WACK
AA10
/PCM_IRQA
AC8
/PCM_WE
AC7
PCM_IOWR/CI_WR
AA5
PCM_IOR/CI_RD
W4
/PCM_CE
T4
/PF_CE0
AE6
/PF_CE1
AF6
/PF_OE
AA12
/PF_WE
AA11
PF_ALE
AC9
PF_AD15
Y14
F_RBZ
AB11
UART2_TX/SCKM
F8
UART2_RX/SDAM
D11
DDCR_DA
AB21
DDCR_CK
AC21
DDCA_CLK
J1
DDCA_DA
J2
UART_RX2
W5
UART_TX2
V5
PWM0
AB13
PWM1
AB12
PWM2
AD12
PWM3
AA13
SAR0
A4
SAR1
B4
SAR2
F4
SAR3
E4
IRIN
C4
GPIO44
AC11
GPIO96
D9
GPIO88
D10
GPIO90/I2S_OUT_MUTE
D7
GPIO91
E11
GPIO97
E8
GPIO98
E10
GPIO99
D6
GPIO103/I2S_OUT_SD3
D5
GPIO102
C5
XIN B3
XOUT A3
TESTPIN/GND E6
SPI_DI AE11
SPI_DO AF12
/SPI_CS AE12
SPI_CK AD11
USB_DP_1 B5
USB_DM_1 A5
USB_DM_2 AC10
USB_DP_2 AB10
GPIO_PM0/GPIO134 E5
GPIO_PM1/GPIO135 F5
GPIO_PM2/GPIO136 G5
GPIO_PM3/GPIO137 H5
GPIO_PM4/GPIO138 F6
GPIO_PM5/INT1/GPIO139 G6
GPIO_PM6/INT2/GPIO140 H6
GPIO131/LDE/SPI_WPn1 AC17
GPIO130/LCK AB17
GPIO132/LHSYNC/SPI_WPn AF11
GPIO60/PCM2_RESET/RX1 AA18
GPIO62/PCM2_CD_N/TX1 AA17
LHSYNC2/I2S_OUT_MUTE/RX1 E7
LVSYNC/GPIO133 AC18
GPIO79/LVSYNC2/TX1 C6
UART2_RX/GPIO84 F9
UART2_TX/GPIO85 F10
UART1_RX/GPIO86 A6
UART1_TX/GPIO87 B6
GPIO42/PCM2_CE_N AF5
GPIO43/PCM2_IRQA_N AF10
TS0_D0 AA8
TS0_D1 Y8
TS0_D2 Y9
TS0_D3 AB7
TS0_D4 AA6
TS0_D5 AB6
TS0_D6 U4
TS0_D7 AC5
TS0_SYNC AC4
TS0_VLD AD5
TS0_CLK AB4
TS1_D0 AB19
TS1_SYNC AA20
TS1_VLD AC19
TS1_CLK AA19
ET_TXD0 C10
ET_TXD1 B11
ET_TX_CLK A9
ET_RXD0 C11
ET_RXD1 C9
ET_TX_EN B10
ET_MDC A10
ET_MDIO B9
ET_COL A11
GPIO67 A7
GPIO68 B8
R179
10K
+3.3V_ST
R193 100
R194 100
R195 100
R191 100
R192 100
R190 100
R161
30K
1%
24V_POWER_DET
R162
6.2K
1%
12V_24V_DET
R167
4.7K
R170
10K
R162-*1
30K
1%
5V_DET
R133 100
R215 100
R216 100
+12V
R141
15K
1%
12V_POWER_DET
+5V_GENERAL
R196
15K
1%
5V_POWER_DET
R101
12K1%
12V_DIP_DET
R103
1.1K
12V_DIP_DET
R113
10K
12V_DIP_DET
R128
22
12V_DIP_DET
R180 100
EEPROM
Serial FLASH MEMORY
for BOOT
NAND FLASH MEMORY
1 11
MAIN_1
EAX60148002-0(LH50)
/PF_CE0
H : Serial Flash
L : NAND Flash
/PF_CE1
H : 16 bit
L : 8 bit
IC105: EAN43352801(ATMEL SHRINK)
2009.01.19
5V Tolerance
5V Tolerance
1878 WON
$0.62
$0.395
Interrupt for ISP Wake up in STB Mode
5V Tolerance
0IMMRMP008A(MICROCHIP)
I2C
MCU BOOT STRAP
10 : BOOT 51
11 : BOOT RISC
MODEL OPTION
LCD FRC OH
OPT_0
PDPL
OPT_1
FRC X
Serial Only
POWER DETECT
5V Tolerance
5V Tolerance
Active High
Active High
OPT_2 OPT_3
Blinking LED
Moving LED
FHD
HD
$0.067
$0.067
$8.966
$0.087
LH H H
Pull_up exist in FRC Block
Copyright ⓒ 2009 LG Electronics. Inc. All right reserved.
Only for training and servcie purposes
LGE Internal Use Only

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
MAIN_2
+3.3V_AVDD
+1.8V_DDR
+3.3V_S6
L209
BLM18PG121SN1D
+3.3V
+3.3V_S6
L206
BLM18PG121SN1D
+3.3V_S6
+3.3V_S6
L210
BLM18PG121SN1D
+3.3V_VDDP +3.3V +1.8V_DDR
+3.3V_AVDD_MPLL
+1.26V_VDDC
+1.26V_VDDC
+3.3V_VDDP
C281
0.1uF C2003 0.1uF
C297
0.1uF
C275
0.1uF C2001 0.1uF
C246
0.1uF C249 0.1uF
C243
0.1uF C289 0.1uF C2005 0.1uF
C252
0.1uF C2000 0.1uF
C2026
0.1uF
C250
0.1uF C276 0.1uF
C258
0.1uF
C244
0.1uF C265 0.1uF C2004 0.1uF
C241
0.1uF C247 0.1uF C253 0.1uF C259
0.1uF
C254
0.1uF C283 0.1uF C291
0.1uF
C242
0.1uF C245 0.1uF C248 0.1uF C251 0.1uF C296 0.1uF
C277
0.1uF
C266
0.1uF C2027 0.1uF
C293
0.1uF
C263
0.1uF
C267
0.1uF
C284
0.1uF
C279
0.1uF
C256
0.1uF
C262
0.1uF
C274
0.1uF
C273
0.1uF
C269
0.1uF
C260
0.1uF
C271
0.1uF
C286
0.1uF
C261
0.1uF C268 0.1uF C290 0.1uF
C219
0.1uF C282 0.1uF
C280
0.1uF C299 0.1uF
C295
0.1uF
C278
0.1uF
C220
0.1uF
C240
330uF
4V
OPT
C2010
330uF
4V
OPT
C294
0.1uF
C257
0.1uF C264 0.1uF
+3.3V_S6
C2029
0.1uF
C2030
0.1uF
C270
0.1uF C298 0.1uF C2002 10uF C2028 10uF
C2025
10uF
6.3V
SPDIF_OUT 004:T7
R2025 47
AV1_R_IN 004:N17
FE_SIF 011:G26
C218 0.047uF
5V_HDMI_3
R2008 100
MEMC_RXE4- 009:P27
MEMC_RXO4- 009:S27
HDMI_RX2-
C212 0.047uF
SCL_HDMI_SW
COMP1_R_IN 004:N21
R2019
470
R2030 22
R2024 47
C2007 2.2uF
DSUB_VSYNC
004:S20
DSUB_G
004:S22
AV2_L_IN 004:AM5
C222 0.047uF
HDMI_RX0+
D2+_HDMI4
R2005 100
MEMC_RXE3+ 009:P27
C205 0.047uF
R2015 47
AV1_CVBS_IN
004:N9
C208
1000pF50V
R2020 47
R2011 47
D0+_HDMI4
C238
22pF
OPT
C204 0.047uF
PC_L_IN 004:I26
R2016 47
C2008 2.2uF
COMP2_Pr_IN
004:W12
C216 0.047uF
C230 2.2uF
R2046 47
MEMC_RXEC- 009:Q27
C2014 2.2uF
C214 0.047uF
R2000
10K
C2009 2.2uF
C201 0.047uF
D0-_HDMI4
COMP1_Pb_IN
004:W12
MEMC_RXO3- 009:S27
C2012 2.2uF
HDMI_CLK+
R2033 390
1%
Check
MEMC_RXO2+ 009:T27
C2015 2.2uF
R2001
10K
COMP2_L_IN 004:N15
MEMC_RXE0+ 009:R27
MEMC_RXE3- 009:P27
C221 0.047uF
MS_LRCH 007:K17
R2047 47
PC_R_IN 004:I25
R2038 22
R2013 47
COMP2_R_IN 004:N19
MEMC_RXO4+ 009:S27
R2010 47
R2037 22
R2009 47
C225 10uF 6.3V
SDA_HDMI_SW
AUDIO_MASTER_CLK 007:K12
AV1_L_IN 004:N13
MEMC_RXE1- 009:R27
R2049
0
D1-_HDMI4
MEMC_RXO1- 009:T27
C239
22pF
OPT
C231 0.1uF
MEMC_RXEC+ 009:Q27
HDMI_CEC
006:AN24
R2002 0
C200 0.047uF
COMP2_Y_IN
004:W10
R2031 22
HDMI_CLK-
HPD4
MS_LRCK 007:K17
C236
22pF
OPT
DSUB_B
004:S21
C227 1uF
R2022 47
MEMC_RXE2+ 009:Q27
R2036 22
MEMC_RXO2- 009:T27
C215 0.047uF
HDMI_RX0-
COMP1_Pr_IN
004:W13
C233
0.1uF
DSUB_R
004:S24
HDMI_RX1-
R2039 22
C2011 2.2uF
D2-_HDMI4 C2006 2.2uF
MEMC_RXE0- 009:R27
C232 0.1uF
MEMC_RXO1+ 009:T27
MEMC_RXO0- 009:U27
CK-_HDMI4
R2014 47
FE_VMAIN
011:Q21
C217 0.047uF
C206 0.047uF
R2004 100
C2016 2.2uF
COMP1_L_IN 004:N16
MEMC_RXOC- 009:T27
MEMC_RXE2- 009:Q27
R2007 47
C235 0.1uF
HDMI_RX1+
C223 0.1uF
MS_SCK 007:K17
R2018 47
R2021 47
+3.3V_AVDD
AV2_R_IN 004:AM6
C237
22pF
OPT
C211 0.047uF
MEMC_RXE4+ 009:P27
C202 0.047uF
R284 0
HPD2
C213 0.047uF
R2003 0
C226 0.1uF
AV2_CVBS_IN
004:AM4
C228 4.7uF
CK+_HDMI4
C2013 2.2uF
DSUB_HSYNC
004:S20
R2026 100
COMP2_Pb_IN
004:W11
C229 2.2uF
HDMI_RX2+
MEMC_RXO0+ 009:U27
D1+_HDMI4
C207 0.047uF
R285 100
MEMC_RXE1+ 009:Q27
C234 0.1uF
R2017 47
C224 0.1uF
COMP1_Y_IN
004:W11
MEMC_RXO3+ 009:S27
R283 0
MEMC_RXOC+ 009:S27
R2012
470
C203
1000pF50V
R2023
470
C209
1000pF50V
DDC_SDA_4
DDC_SCL_4
C210
2.2uF
16V
HPD1 R201 100
LGE3369A (Saturn6 Non RM)
IC100
RXACKP
F1
RXACKN
F2
RXA0P
G2
RXA0N
G3
RXA1P
H3
RXA1N
G1
RXA2P
H1
RXA2N
H2
DDCD_A_DA
A1
DDCD_A_CK
B2
HOTPLUG_A
A2
RXBCKP
C3
RXBCKN
B1
RXB0P
C1
RXB0N
C2
RXB1P
D2
RXB1N
D3
RXB2P
E3
RXB2N
D1
DDCD_B_DA
E1
DDCD_B_CK
F3
HOTPLUG_B
E2
RXCCKP
AE8
RXCCKN
AD8
RXC0P
AD9
RXC0N
AF8
RXC1P
AF9
RXC1N
AE9
RXC2P
AE10
RXC2N
AD10
DDCD_C_DA
AE7
DDCD_C_CK
AF7
HOTPLUG_C
AD7
CEC
J3
HSYNC0/SC1_ID
N2
VSYNC0/SC1_FB
N1
RIN0P/SC1_R
P2
GIN0P/SC1_G
R3
BIN0P/SC1_B
R1
SOGIN0/SC1_CVBS
P3
RINM
P1
BINM
T3
GINM
R2
HSYNC1/DSUB_HSYNC
K3
VSYNC1/DSUB_VSYNC
K2
RIN1P/DSUB_R
L1
GIN1P/DSUB_G
L3
BIN1P/DSUB_B
K1
SOGIN1
L2
RIN2P/COMP_PR+
V1
GIN2P/COMP_Y+
V2
BIN2P/COMP_PB+
U1
SOGIN2
V3
VSYNC2
J5
CVBS1/SC1_CVBS
U3
CVBS2/SC2_CVBS
U2
CVBS3/SIDE_CVBS
T1
VCOM1
T2
CVBS4/S-VIDEO_Y
M1
CVBS6/S-VIDEO_C
M2
CVBS5
N3
CVBS7
M3
CVBS0/RF_CVBS
W1
VCOM0
Y3
CVBSOUT0/SC2_MNTOUT
Y2
CVBSOUT1
AA2
LVA0P AE16
LVA0M AD16
LVA1P AD15
LVA1M AF16
LVA2P AF15
LVA2M AE15
LVA3P AD13
LVA3M AF14
LVA4P AF13
LVA4M AE13
LVACKP AE14
LVACKM AD14
LVB0P AE20
LVB0M AD20
LVB1P AD19
LVB1M AF20
LVB2P AF19
LVB2M AE19
LVB3P AD17
LVB3M AF18
LVB4P AF17
LVB4M AE17
LVBCKP AE18
LVBCKM AD18
AUR0 AA3
AUL0 Y1
AUR1 AE1
AUL1 AF3
AUR2 AE3
AUL2 AE2
AUR3 AA1
AUL3 AB1
AUR4 AB2
AUL4 AC2
AUR5 AB3
AUL5 AC3
SIF0P W3
SIF0M W2
SPDIF_IN F11
SPDIF_OUT E9
AUOUTR0/HP_ROUT AF1
AUOUTL0/HP_LOUT AF2
AUOUTR1/SC1_ROUT AD3
AUOUTL1/SC1_LOUT AD1
AUOUTR2/SC2_ROUT AC1
AUOUTL2/SC2_LOUT AD2
I2S_OUT_MCK A8
I2S_OUT_WS B7
I2S_OUT_BCK C7
I2S_OUT_SD D8
I2S_IN_SD C8
VCLAMP K4
REFP H4
REFM J4
REXT G4
AUCOM AE5
AUVRM AE4
AUVRP AF4
AUVAG AD4
IC100
LGE3369A (Saturn6 Non RM)
VDDC_1 D16
VDDC_2 D17
VDDC_3 D18
VDDC_4 D19
VDDC_5 D20
VDDC_6 H18
VDDC_7 H19
VDDC_8 H20
VDDC_9 J20
VDDC_10 K20
VDDC_11 L20
VDDC_12 M20
VDDC_13 P7
VDDC_14 R7
VDDC_15 T7
VDDC_16 T22
VDDC_17 U7
VDDC_18 U20
VDDC_19 U22
VDDC_20 V7
VDDC_21 V22
VDDC_22 W11
VDDC_23 W12
VDDC_24 W19
VDDC_25 W20
VDDC_26 W22
VDDC_27 Y22
VDDP_1 H9
VDDP_2 H10
VDDP_3 H11
VDDP_4 H12
VDDP_5 N20
VDDP_6 P20
VDDP_7 W9
VDDP_8 W10
AVDD_AU W7
AVDD_DDR_1 G12
AVDD_DDR_2 G13
AVDD_DDR_3 H13
AVDD_DDR_4 H14
AVDD_DDR_5 H15
AVDD_DDR_6 H16
AVDD_DDR_7 W14
AVDD_DDR_8 W15
AVDD_DDR_9 W16
AVDD_DDR_10 W17
AVDD_DDR_11 W18
AVDD_MEMPLL_1 H17
AVDD_MEMPLL_2 T20
AVDD_MEMPLL_3 V20
AVDD_LPLL R20
AVDD_MPLL H7
AVDD_33_1 J7
AVDD_33_2 K7
AVDD_33_3 L7
AVDD_33_4 M7
AVDD_33_5 N7
AVDD_DM W8
AVDD_USB H8
GND_2
E16
GND_3
E17
GND_4
E18
GND_5
F7
GND_6
L9
GND_7
L10
GND_8
L11
GND_9
L12
GND_10
L13
GND_11
L14
GND_12
L15
GND_13
L16
GND_14
L17
GND_15
L18
GND_16
M9
GND_17
M10
GND_18
M11
GND_19
M12
GND_20
M13
GND_21
M14
GND_22
M15
GND_23
M16
GND_24
M17
GND_25
M18
GND_26
N4
GND_27
N9
GND_28
N10
GND_29
N11
GND_30
N12
GND_31
N13
GND_32
N14
GND_33
N15
GND_34
N16
GND_35
N17
GND_36
N18
GND_37
P4
GND_38
P9
GND_39
P10
GND_40
P11
GND_41
P12
GND_42
P13
GND_43
P14
GND_44
P15
GND_45
P16
GND_46
P17
GND_47
P18
GND_48
R4
GND_49
R9
GND_50
R10
GND_51
R11
GND_52
R12
GND_53
R13
GND_54
R14
GND_55
R15
GND_56
R16
GND_57
R17
GND_58
R18
GND_59
T5
GND_60
T9
GND_61
T10
GND_62
T11
GND_63
T12
GND_64
T13
GND_65
T14
GND_66
T15
GND_67
T16
GND_68
T17
GND_69
T18
GND_70
U5
GND_71
W13
GND_72
Y21
GND_73
AA23
R2035 100
R2034 100
EAX60148002-0(LH50)
2 11
MAIN_2
2009.01.19
VDDC : 970mA
VDDP : 102.3mA
AVDD_AU : 36.11mA
AVDD_MEMPLL : 23.77mA
AVDD_LPLL : 4.69mA
AVDD_33 : 281mA
AVDD_DM : 0.03mA
AVDD_OTG : 22.96mA
PI_080719
DSUB
HDMI
to Ursa
TV/MNT
COMP1
AUDIO IN
Close to IC
as close as possible
COMP2
rev 1
rev 0
rev 0
CVBS
AUDIO OUT
Close to IC
as close as possible
$8.966 $8.966
Copyright ⓒ 2009 LG Electronics. Inc. All right reserved.
Only for training and servcie purposes
LGE Internal Use Only

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
DDR2
ADDR2_A[10]
BDDR2_BA[1]
SDDR_A[7]
SDDR_D[15]
ADDR2_DQS0_P
SDDR_D[4] BDDR2_D[5]
ADDR2_D[10]
BDDR2_A[4] TDDR_D[7]
TDDR_A[4]
ADDR2_A[8]
/TDDR_RAS
SDDR_A[6]
ADDR2_DQS1_P
SDDR_D[2]
BDDR2_D[7]
ADDR2_D[13]
BDDR2_A[3]
TDDR_D[0]
TDDR_A[1]
ADDR2_A[9]
BDDR2_BA[0]
SDDR_A[5]
/ADDR2_WE
SDDR_D[6]
BDDR2_D[4]
ADDR2_D[15]
BDDR2_A[2]
TDDR_D[13]
ADDR2_A[4]
TDDR_DQS0_P
SDDR_A[4]
/ADDR2_CAS
SDDR_D[1]
SDDR_BA[2]
BDDR2_D[6]
ADDR2_D[14]
BDDR2_A[1]
TDDR_D[5]
ADDR2_A[6]
TDDR_DQS1_N
SDDR_A[3]
ADDR2_ODT
SDDR_D[5]
BDDR2_D[3]
ADDR2_D[9]
BDDR2_A[0]
TDDR_D[2]
ADDR2_A[7]
TDDR_BA[0]
SDDR_A[2]
TDDR_D[0-15]
ADDR2_D[0-15]
TDDR_BA[2]
/ADDR2_RAS
SDDR_D[3]
BDDR2_D[2]
ADDR2_D[6]
TDDR_D[0]
ADDR2_A[5]
TDDR_DQS1_P
SDDR_A[1]
BDDR2_D[2]
/BDDR2_WE
SDDR_DQS0_N
SDDR_D[4]
BDDR2_D[1]
ADDR2_D[1]
TDDR_D[12]
ADDR2_A[2]
/TDDR_WE
SDDR_A[0]
BDDR2_D[0]
/BDDR2_CAS
SDDR_DQS1_N
SDDR_D[9]
BDDR2_D[0]
ADDR2_D[3]
TDDR_D[13]
ADDR2_A[3]
TDDR_BA[1]
SDDR_A[9]
BDDR2_D[5]
/BDDR2_RAS
SDDR_DQM0_P
SDDR_D[1]
ADDR2_D[4]
TDDR_D[14]
TDDR_A[0-12]
ADDR2_A[1]
BDDR2_BA[2]
SDDR_A[10]
BDDR2_D[7]
BDDR2_CKE
SDDR_DQM1_P
SDDR_D[8]
ADDR2_D[12]
TDDR_D[10]
TDDR_A[1]
ADDR2_A[0]
/TDDR_CAS
SDDR_A[11]
BDDR2_D[6]
BDDR2_A[8]
SDDR_DQS0_P
SDDR_D[3]
SDDR_ODT
ADDR2_D[11]
TDDR_D[15]
TDDR_A[8]
BDDR2_DQM1_P
SDDR_A[12]
BDDR2_D[1]
BDDR2_A[11]
SDDR_DQS1_P
SDDR_D[8]
BDDR2_A[0-12]
ADDR2_D[13]
TDDR_D[11]
TDDR_A[5]
BDDR2_DQS1_N
BDDR2_D[3]
BDDR2_A[6]
/SDDR_WE
SDDR_D[10]
ADDR2_MCLK
ADDR2_D[11]
TDDR_D[12]
TDDR_A[2]
TDDR_DQM1_P
BDDR2_D[4]
BDDR2_A[4]
/SDDR_CAS
SDDR_D[12]
ADDR2_BA[1]
ADDR2_D[15]
TDDR_D[10]
TDDR_A[12]
BDDR2_D[15]
BDDR2_A[2]
/SDDR_RAS
SDDR_D[11]
ADDR2_BA[0]
ADDR2_D[10] TDDR_D[8]
TDDR_A[10]
/TDDR_MCLK
BDDR2_D[8]
BDDR2_A[0]
TDDR_A[7]
SDDR_D[10]
ADDR2_A[8]
ADDR2_D[14]
TDDR_D[3]
TDDR_A[3]
BDDR2_MCLK
BDDR2_D[0-15]
BDDR2_D[10]
BDDR2_A[12]
BDDR2_A[7]
TDDR_A[9]
ADDR2_A[11]
ADDR2_D[8]
SDDR_CK
TDDR_D[8]
TDDR_A[11]
ADDR2_A[0-12]
BDDR2_DQS0_P
SDDR_D[14]
BDDR2_D[13]
BDDR2_A[5]
ADDR2_A[5]
TDDR_A[6]
ADDR2_A[6]
ADDR2_D[9]
TDDR_D[1]
TDDR_A[4]
SDDR_D[13]
BDDR2_D[9]
BDDR2_A[10]
/SDDR_CK
SDDR_A[5]
TDDR_A[0]
ADDR2_A[4]
ADDR2_D[12]
TDDR_D[9]
SDDR_A[8]
TDDR_MCLK
SDDR_D[12]
BDDR2_D[14]
BDDR2_A[1]
ADDR2_CKE
SDDR_A[9]
TDDR_A[7]
ADDR2_A[2]
ADDR2_D[7]
TDDR_D[4]
SDDR_A[11]
TDDR_CKE
SDDR_D[0]
BDDR2_D[12]
BDDR2_A[3]
SDDR_CKE
TDDR_A[9]
ADDR2_A[0]
ADDR2_D[6]
TDDR_D[7]
SDDR_A[6]
BDDR2_DQS0_N
SDDR_D[2]
BDDR2_D[11]
BDDR2_A[9]
/ADDR2_MCLK
TDDR_A[8]
ADDR2_A[7]
ADDR2_D[4]
TDDR_D[3]
SDDR_A[4]
BDDR2_ODT
SDDR_D[5]
BDDR2_D[13]
BDDR2_A[12]
ADDR2_BA[2]
TDDR_A[0]
ADDR2_A[12]
ADDR2_D[5]
TDDR_D[11]
SDDR_A[2]
BDDR2_DQS1_P
SDDR_D[13]
BDDR2_D[9]
BDDR2_A[11]
SDDR_BA[1]
TDDR_A[10]
ADDR2_A[9]
ADDR2_D[2]
TDDR_D[5]
SDDR_A[0-12]
SDDR_A[0]
BDDR2_DQM0_P
SDDR_D[0]
BDDR2_D[11]
SDDR_D[0-15]
BDDR2_A[10]
SDDR_BA[0]
TDDR_A[2]
ADDR2_A[10]
ADDR2_D[3]
TDDR_D[1]
SDDR_A[3]
SDDR_A[7]
SDDR_D[7]
BDDR2_D[15]
ADDR2_D[0]
BDDR2_A[9]
TDDR_D[4]
TDDR_A[6]
ADDR2_A[1]
ADDR2_D[1]
TDDR_D[6]
SDDR_A[12]
ADDR2_DQS1_N
SDDR_D[9]
BDDR2_D[14]
ADDR2_D[2]
BDDR2_A[8]
TDDR_D[14]
TDDR_A[12]
ADDR2_A[3]
ADDR2_D[0]
TDDR_DQS0_N
TDDR_D[2]
SDDR_A[10]
ADDR2_DQS0_N
SDDR_D[6]
BDDR2_D[12]
ADDR2_D[7]
BDDR2_A[7]
TDDR_D[15]
TDDR_A[5]
ADDR2_A[12]
/BDDR2_MCLK
SDDR_A[1]
SDDR_D[11]
ADDR2_DQM0_P
SDDR_D[15] BDDR2_D[8]
ADDR2_D[5]
BDDR2_A[6]
TDDR_D[6]
TDDR_A[11]
ADDR2_A[11]
TDDR_DQM0_P
SDDR_A[8]
SDDR_D[7]
ADDR2_DQM1_P
SDDR_D[14]
BDDR2_D[10]
ADDR2_D[8]
BDDR2_A[5]
TDDR_D[9]
TDDR_A[3]
+1.8V_DDR +1.8V_DDR
C302
0.1uF
C319
0.1uF
C320
0.1uF
C307
0.1uF
C317
0.1uF
C310
0.1uF
C314
0.1uF
C304
0.1uF
C315
0.1uF
C305
0.1uF
C313
0.1uF
C312
0.1uF
C308
0.1uF
C306
0.1uF
C318
0.1uF
C316
0.1uF
C337
0.1uF
C340
0.1uF
C330
0.1uF
C334
0.1uF
C326
0.1uF
C323
0.1uF
C341
0.1uF
C339
0.1uF
C338
0.1uF
C332
0.1uF
C342
0.1uF
C327
0.1uF
C331
0.1uF
C328
0.1uF
C329 0.1uF C336
0.1uF
C325
0.1uF
C324
10uF
C303 10uF
R31156
AR307
56
R343 1K 1%
R341 56
C300 0.1uF
C309 0.1uF
R320 56
R31356
AR304
56
R349 4.7K
OPT
R30622
+1.8V_DDR
+1.8V_DDR
R327 56
R302 1K 1%
R31856
AR302
56
R330 22
AR312
56
R31056
R342 56
R335 56
+1.8V_DDR
R326 56
R322
1K 1%
R340 56
AR309
56
R30556
R30356
AR306
56
+1.8V_DDR
R346 4.7K
OPT
R319 56
R333 56
R345 1K 1%
R337 56
C311
0.1uF
AR300
56
C333
0.1uF
R331 22
AR303
56
AR311
56
R31656
R30456
R300 150
OPT
R351
0
OPT
R334 56
+1.8V_DDR
R30956
R31456
R336 56
R348 4.7K
OPT
R350
0
AR308
56
R332 56R30856
+1.8V_DDR
R321
1K 1%
R344 150
OPT
R339 56
C335
0.1uF
C301 0.1uF
R328 56
R31756
AR305
56
AR313
56
+1.8V_DDR
R30722
R301
1K 1%
R31256
R31556
AR310
56
AR301
56
R347 4.7K
OPT
R325 56
R338 56
+1.8V_DDR
+1.8V_DDR
R329 56
OPT
IC301-*1
HYB18TC512160B2F-2.5
Qimonda_512M_DDR
J2
VREF
J8
CK
H2 VSSQ2
B7
UDQS
N8
A4
P8
A8
L1
NC4
L2
BA0
R8
NC3
K7
RAS
F8 VSSQ3
F3
LDM
P3
A9
M3
A1
N3
A5
K8
CK
R3
NC5
L3
BA1
J7
VSSDL
L7
CAS
F2 VSSQ4
B3
UDM
M2
A10/AP
K2
CKE
R7
NC6
M7
A2
N7
A6
M8
A0
J1
VDDL
K3
WE
E8
LDQS
P7
A11
K9
ODT
A2
NC1
N2
A3
P2
A7
H8 VSSQ1
F7
LDQS
A8
UDQS
R2
A12
L8
CS
E2
NC2
E7 VSSQ5
D8 VSSQ6
D2 VSSQ7
A7 VSSQ8
B8 VSSQ9
B2 VSSQ10
P9 VSS1
N1 VSS2
J3 VSS3
E3 VSS4
A3 VSS5
G9 VDDQ1
G7 VDDQ2
G3 VDDQ3
G1 VDDQ4
E9 VDDQ5
C9 VDDQ6
C7 VDDQ7
C3 VDDQ8
C1 VDDQ9
A9 VDDQ10
R1 VDD1
M9 VDD2
J9 VDD3
E1 VDD4
A1 VDD5
B9 DQ15
B1 DQ14
D9 DQ13
D1 DQ12
D3 DQ11
D7 DQ10
C2 DQ9
C8 DQ8
F9 DQ7
F1 DQ6
H9 DQ5
H1 DQ4
H3 DQ3
H7 DQ2
G2 DQ1
G8 DQ0
IC300
HY5PS1G1631CFP-S6
Hynix_1G_DDR
J2 VREF
J8 CK
H2
VSSQ2
B7 UDQS
N8 A4
P8 A8
L1 BA2
L2 BA0
R8 NC3
K7 RAS
F8
VSSQ3
F3 LDM
P3 A9
M3 A1
N3 A5
K8 CK
R3 NC5
L3 BA1
J7 VSSDL
L7 CAS
F2
VSSQ4
B3 UDM
M2 A10/AP
K2 CKE
R7 NC6
M7 A2
N7 A6
M8 A0
J1 VDDL
K3 WE
E8 LDQS
P7 A11
K9 ODT
A2 NC1
N2 A3
P2 A7
H8
VSSQ1
F7 LDQS
A8 UDQS
R2 A12
L8 CS
E2 NC2
E7
VSSQ5 D8
VSSQ6 D2
VSSQ7 A7
VSSQ8 B8
VSSQ9 B2
VSSQ10
P9
VSS1 N1
VSS2 J3
VSS3 E3
VSS4 A3
VSS5
G9
VDDQ1 G7
VDDQ2 G3
VDDQ3 G1
VDDQ4 E9
VDDQ5 C9
VDDQ6 C7
VDDQ7 C3
VDDQ8 C1
VDDQ9 A9
VDDQ10
R1
VDD1 M9
VDD2 J9
VDD3 E1
VDD4 A1
VDD5
B9
DQ15 B1
DQ14 D9
DQ13 D1
DQ12 D3
DQ11 D7
DQ10 C2
DQ9 C8
DQ8 F9
DQ7 F1
DQ6 H9
DQ5 H1
DQ4 H3
DQ3 H7
DQ2 G2
DQ1 G8
DQ0
IC301
H5PS5162FFR-S6C
Hynix_512M_DDR
J2
VREF
J8
CK
H2 VSSQ2
B7
UDQS
N8
A4
P8
A8
L1
NC4
L2
BA0
R8
NC3
K7
RAS
F8 VSSQ3
F3
LDM
P3
A9
M3
A1
N3
A5
K8
CK
R3
NC5
L3
BA1
J7
VSSDL
L7
CAS
F2 VSSQ4
B3
UDM
M2
A10/AP
K2
CKE
R7
NC6
M7
A2
N7
A6
M8
A0
J1
VDDL
K3
WE
E8
LDQS
P7
A11
K9
ODT
A2
NC1
N2
A3
P2
A7
H8 VSSQ1
F7
LDQS
A8
UDQS
R2
A12
L8
CS
E2
NC2
E7 VSSQ5
D8 VSSQ6
D2 VSSQ7
A7 VSSQ8
B8 VSSQ9
B2 VSSQ10
P9 VSS1
N1 VSS2
J3 VSS3
E3 VSS4
A3 VSS5
G9 VDDQ1
G7 VDDQ2
G3 VDDQ3
G1 VDDQ4
E9 VDDQ5
C9 VDDQ6
C7 VDDQ7
C3 VDDQ8
C1 VDDQ9
A9 VDDQ10
R1 VDD1
M9 VDD2
J9 VDD3
E1 VDD4
A1 VDD5
B9 DQ15
B1 DQ14
D9 DQ13
D1 DQ12
D3 DQ11
D7 DQ10
C2 DQ9
C8 DQ8
F9 DQ7
F1 DQ6
H9 DQ5
H1 DQ4
H3 DQ3
H7 DQ2
G2 DQ1
G8 DQ0
IC300-*1
HYB18TC1G160C2F-2.5
Qimonda_1G_DDR
J2 VREF
J8 CK
H2
VSSQ2
B7 UDQS
N8 A4
P8 A8
L1 BA2
L2 BA0
R8 NC3
K7 RAS
F8
VSSQ3
F3 LDM
P3 A9
M3 A1
N3 A5
K8 CK
R3 NC4
L3 BA1
J7 VSSDL
L7 CAS
F2
VSSQ4
B3 UDM
M2 A10/AP
K2 CKE
R7 NC5
M7 A2
N7 A6
M8 A0
J1 VDDL
K3 WE
E8 LDQS
P7 A11
K9 ODT
A2 NC1
N2 A3
P2 A7
H8
VSSQ1
F7 LDQS
A8 UDQS
R2 A12
L8 CS
E2 NC2
E7
VSSQ5 D8
VSSQ6 D2
VSSQ7 A7
VSSQ8 B8
VSSQ9 B2
VSSQ10
P9
VSS1 N1
VSS2 J3
VSS3 E3
VSS4 A3
VSS5
G9
VDDQ1 G7
VDDQ2 G3
VDDQ3 G1
VDDQ4 E9
VDDQ5 C9
VDDQ6 C7
VDDQ7 C3
VDDQ8 C1
VDDQ9 A9
VDDQ10
R1
VDD1 M9
VDD2 J9
VDD3 E1
VDD4 A1
VDD5
B9
DQ15 B1
DQ14 D9
DQ13 D1
DQ12 D3
DQ11 D7
DQ10 C2
DQ9 C8
DQ8 F9
DQ7 F1
DQ6 H9
DQ5 H1
DQ4 H3
DQ3 H7
DQ2 G2
DQ1 G8
DQ0
IC100
LGE3369A (Saturn6 Non RM)
B_DDR2_A0 T26
B_DDR2_A1 AF26
B_DDR2_A2 T25
B_DDR2_A3 AF23
B_DDR2_A4 T24
B_DDR2_A5 AE23
B_DDR2_A6 R26
B_DDR2_A7 AD22
B_DDR2_A8 R25
B_DDR2_A9 AC22
B_DDR2_A10 AD23
B_DDR2_A11 R24
B_DDR2_A12 AE22
B_DDR2_BA0 AC23
B_DDR2_BA1 AC24
B_DDR2_BA2 AB22
B_DDR2_MCLK V25
/B_DDR2_MCLK V24
B_DDR2_CKE AB23
B_DDR2_ODT U26
/B_DDR2_RAS U25
/B_DDR2_CAS U24
/B_DDR2_WE AB24
B_DDR2_DQS0 AB26
B_DDR2_DQS1 AA26
B_DDR2_DQM0 AC25
B_DDR2_DQM1 AC26
B_DDR2_DQSB0 AB25
B_DDR2_DQSB1 AA25
B_DDR2_DQ0 W25
B_DDR2_DQ1 AE26
B_DDR2_DQ2 W24
B_DDR2_DQ3 AF24
B_DDR2_DQ4 AF25
B_DDR2_DQ5 V26
B_DDR2_DQ6 AE25
B_DDR2_DQ7 W26
B_DDR2_DQ8 Y26
B_DDR2_DQ9 AD25
B_DDR2_DQ10 Y25
B_DDR2_DQ11 AE24
B_DDR2_DQ12 AD26
B_DDR2_DQ13 Y24
B_DDR2_DQ14 AD24
B_DDR2_DQ15 AA24
A_MVREF
D15
A_DDR2_A0
C13
A_DDR2_A1
A22
A_DDR2_A2
B13
A_DDR2_A3
C22
A_DDR2_A4
A13
A_DDR2_A5
A23
A_DDR2_A6
C12
A_DDR2_A7
B23
A_DDR2_A8
B12
A_DDR2_A9
C23
A_DDR2_A10
B22
A_DDR2_A11
A12
A_DDR2_A12
A24
A_DDR2_BA0
C24
A_DDR2_BA1
B24
A_DDR2_BA2
D24
A_DDR2_MCLK
B14
/A_DDR2_MCLK
A14
A_DDR2_CKE
D23
A_DDR2_ODT
D14
/A_DDR2_RAS
D13
/A_DDR2_CAS
D12
/A_DDR2_WE
D22
A_DDR2_DQS0
B18
A_DDR2_DQS1
C17
A_DDR2_DQM0
C18
A_DDR2_DQM1
A19
A_DDR2_DQSB0
A18
A_DDR2_DQSB1
B17
A_DDR2_DQ0
B15
A_DDR2_DQ1
A21
A_DDR2_DQ2
A15
A_DDR2_DQ3
B21
A_DDR2_DQ4
C21
A_DDR2_DQ5
C14
A_DDR2_DQ6
C20
A_DDR2_DQ7
C15
A_DDR2_DQ8
C16
A_DDR2_DQ9
C19
A_DDR2_DQ10
B16
A_DDR2_DQ11
B20
A_DDR2_DQ12
A20
A_DDR2_DQ13
A16
A_DDR2_DQ14
B19
A_DDR2_DQ15
A17
DDR2 1.8V By CAP - Place these Caps near Memory
EAX60148002-0(LH50)
3 11
DDR2
2009.01.19
Close to DDR Power Pin Close to DDR Power Pin
$8.966
2013 WON
$1.79 1207 WON $0.97
Copyright ⓒ 2009 LG Electronics. Inc. All right reserved.
Only for training and servcie purposes
LGE Internal Use Only

Fiber Optic
USB DOWN STREAM
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
INTERFACE
C419 220pF 50V
JK407
KCN-DS-1-0088
1 2 3 4 5
6 7 8 9
10
IC401
MAX3232CDR
3C1- 2V+
4C2+ 1C1+
6V- 5C2-
7DOUT2
8RIN2
9
ROUT2
10
DIN2
11
DIN1
12
ROUT1
13
RIN1
14
DOUT1
15
GND
16
VCC
R464
100
C420 220pF 50V
R462
4.7K
DBG_TX
R470
0
IR_OUT
DBG_RX
+5V_ST
+5V_ST
JK401
PEJ024-01
6B T_TERMINAL2
8SHIELD_PLATE
7B B_TERMINAL2
5T_SPRING
4R_SPRING
7A B_TERMINAL1
6A T_TERMINAL1
3E_SPRING
C429
0.1uF
16V
R461
4.7K
R466 100
C413
0.1uF
16V
+5V_GENERAL +5V_GENERAL
JK403
JST1223-001
1
GND
2
VCC
3
VINPUT
4
FIX_POLE
SPDIF_OUT
002:X18
R451
1K
D434
30V
ADUC30S03010L_AMODIODE
OPT
D435
30V
ADUC30S03010L_AMODIODE
OPT
D423
OPT
ADMC5M03200L_AMODIODE
+5V_USB_SIDE
D429
5.6V
CDS3C05HDMI1
C421
10uF
10V
R463 180
C431 0.1uF
C430
10uF
10V
SIDE_USB_DM 001:AM8
USB_OCD
001:AI14
+3.3V
D428
5.6V
CDS3C05HDMI1
L401
BLM18PG121SN1D
SIDE_USB_DP 001:AM8
L400
BLM18PG121SN1D
120-ohm
OPT
R479
47
R472
4.7K
R478
10K
USB_CTL
001:AJ26
D432
5.6V
AMOTECH
C427
100pF
50V
R473
1K
JK404
PPJ218-01
5C [RD]CONTACT
2C [RD]U_CAN
4C [RD]O_SPRING
2B [WH]U_CAN
3B [WH]C_LUG
2A [YL]U_CAN
5A [YL]CONTACT
4A [YL]O_SPRING
AV2_DET
AV2_L_IN
C428
100pF
50V
+3.3V
C426
47pF
50V
R471
4.7K
D431
30V
AMOTECH R467
75
AV2_CVBS_IN
C425
0.1uF
16V
AV2_R_IN
D430
5.6V
AMOTECH
D433
5.6V
AMOTECH
R465
0
C402
0.1uF
16V
R433
75
D411
30V
AMOTECH
COMP1_Pr
004:U13
+3.3V
D413
5.6V
AMOTECH
R408
4.7K
R419
1K
COMP1_L_IN
002:R14
COMP2_DET
001:AA22
R430
75
C403
100pF
50V
AV1_R_IN
R439
12K
R426
10K
R409
4.7K
D415
5.6V
AMOTECH
D405
5.6V
AMOTECH
COMP2_Pb
004:U11
COMP2_L_IN
002:R16
R440
12K
D408
30V
AMOTECH
C408
1000pF
50V
R417
1K
+3.3V
COMP1_R_IN
002:R14
R414
470K
R428
10K
R431
75
D407
30V
AMOTECH
D402
30V
AMOTECH
R445
0
R421
0
AV1_DET
C407
1000pF
50V
D416
5.6V
AMOTECH
R436
12K
C405
1000pF
50V
R441
12K
R444
0
R416
470K
R410
4.7K
D412
5.6V
AMOTECH
COMP1_DET
001:AJ20
COMP1_Y
004:U11
D410
30V
AMOTECH
R432
75
D417
5.6V
AMOTECH
AV1_L_IN
R435
75
R434
75
R420
0
R427
10K
R424
10K
COMP2_Y
004:U10
R413
470K
R411
470K
C406
100pF
50V
R437
12K
R415
470K
R443
0
R429
75
R412
470K
R423
10K
COMP1_Pb
004:U12
R438
12K
+3.3V
C404
1000pF
50V
R442
0
COMP2_R_IN
002:R16
D404
30V
AMOTECH
COMP2_Pr
004:U12
AV1_CVBS_IN
R422
0
D403
5.6V
AMOTECH
D414
5.6V
AMOTECH
R418
1K
R425
10K
D406
30V
AMOTECH
C409
47pF
50V
D409
5.6V
AMOTECH
D426
5.6V
ADMC5M03200L_AMODIODE
OPT
JK405
KCN-DS-1-0089
1 2 3 4 5
6 7 8 9
10
11 12 13 14 15
16
DSUB_B
002:D19
DSUB_HSYNC
002:D18
D418
30V
EDID_WP
001:AJ20;006:AK7;006:AN3;006:AN12;006:AN17
C412
18pF
OPT
+5V_ST
R446
0
R449 75
R460
1K
C417
0.1uF
16V
R459
4.7K
JP423
R4470
ISP_RXD
DSUB_R
002:D19
R452
2.2K
IC400
CAT24C02WI-GT3
3
A2
2
A1
4
VSS
1
A0
5SDA
6SCL
7WP
8VCC
R453
2.2K
JP425
C416
18pF
50V
R450 75
R454
22
D425
ENKMC2838-T112
A1
C
A2
R458
100
D427
5.6V
ADMC5M03200L_AMODIODE
OPT
D422
30V
ADUC30S03010L_AMODIODE
D421
30V
ADUC30S03010L_AMODIODE
R448 75
DSUB_G
002:D19
R457
0
OPT
D424
5.6V
ADMC5M03200L_AMODIODE
OPT
JP424
C411
18pF
OPT
DSUB_DET
D419
30V
ADUC30S03010L_AMODIODE
ISP_TXD
D420
30V
ADUC30S03010L_AMODIODE
DSUB_VSYNC
002:D18
C414
0.1uF
16V
R456
22
C410
18pF
OPT
+3.3V
C415
18pF
50V
R455
10K
R482
12K
R484
0
R483
12K
R485
0
R480
10K
R481
10K
R468
470K
R469
470K
JK402
PPJ227-01
9N [GN]E-LUG .
5K [GN]O-SPRING-L
COMP2_Y
6K [GN]CONTACT-L .
4E [GN]O-SPRING-S
COMP1_Y
3E [GN]CONTACT-S .
9M [BL]E-LUG .
7J [BL]C-LUG-L
COMP2_Pb
8D [BL]C-LUG-S
COMP1_Pb
9L [YL]E-LUG .
4L [YL]O-SPRING-S
AV1_CVBS
3L [YL]CONTACT-S .
7H [RD]C-LUG-L
COMP2_Pr
8C [RD]C-LUG-S
COMP1_Pr
9G [WH]E-LUG .
8M [WH]C-LUG-S_1
AV1_L
7G [WH]C-LUG-L
COMP2_L
8B [WH]C-LUG-S_2
COMP1_L
9F [RD]E-LUG .
4N [RD]O-SPRING-S_1
AV1_R
3N [RD]CONTACT-S_1 .
5F [RD]O-SPRING-L
COMP2_R
6F [RD]CONTACT-L .
4A [RD]O-SPRING-S_2
COMP1_R
3A [RD]CONTACT-S_2 .
D401
5.6V
ADMC5M03200L_AMODIODE
OPT
C400 100pF
PC_R_IN 002:R16
D400
5.6V
ADMC5M03200L_AMODIODE
OPT
C401
100pF
50V
PC_L_IN 002:R16
R400 470K
R401 470K
JK406
KJA-UB-4-0004
1234
5
R486
15K
R489
15K
R490
10K
R487
10K
C432
470uF
16V
IR_OUT
IC402
MIC2019YM6
3ENABLE
2GND
4
FAULT
1VIN 6
VOUT
5
ILIMIT
C424
0.047uF
50V
R474
0
C433
100pF
50V
OPT
C423
0.33uF
50V
C422
0.33uF
50V
C418
0.33uF
50V
COMP1_Y_IN
002:D16
COMP2_Y_IN
002:D20
COMP2_Pb_IN
002:D20
COMP1_Pb_IN
002:D16
COMP1_Pr_IN
002:D16
COMP2_Pr_IN
002:D20
COMP2_Y
R402
0
R403
0
COMP1_Y
R404
0
COMP2_Pb
R405
0
COMP1_Pb
R406
0
COMP2_Pr
R407
0
COMP1_Pr
PC AUDIO
RS232C
EAX60148002-0(LH50)
4 11
INTERFACE
2009.01.19
SPDIF OPTIC JACK
$0.15
Side USB
Pin to Pin with
AV2(SIDE)
EAN43439401
Level Down: 470K -> 180K
Level Down: 470K -> 180K
Component1/2 and AV1(rear)
[ PC ]
(MIC2009)
$0.67965
$0.17
$0.175
$0.054
$0.18624
$0.152
$0.13643
$0.179
$0.1728
Copyright ⓒ 2009 LG Electronics. Inc. All right reserved.
Only for training and servcie purposes
LGE Internal Use Only

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
IR
LED_ON
R5006
0
C5001
0.1uF
D5003
5.6V
AMOTECH
D5004
5.6V
CDS3C05HDMI1
C5006
1000pF
50V
+3.3V_ST
R5010 0
D5005
5.6V
CDS3C05HDMI1
R5008 0
L5001
BLM18PG121SN1D
R5001
100
D5002
5.6V
AMOTECH
IR
SCL_SUB/AMP
L5005
BLM18PG121SN1D
+5V_ST
KEY1
R5004
4.7K
L5003
BLM18PG121SN1D
C5003
0.1uF
16V
P5001
12507WS-12L
1
SCL
2
SDA
3
GND
4
KEY1
5
KEY2
6
5V_ST
7
GND
8
WARM_ST
9
IR
10
GND
11
3.3V
12
PWR_ON
13
GND
R5002
100
L5002
BLM18PG121SN1D
R5005
0
C5004
100pF
50V
C5007
1000pF
50V
KEY2
D5001
5.6V
AMOTECH
SDA_SUB/AMP
C5002
0.1uF
C5005
0.1uF
16V
R5003
4.7K
C500
0.1uF
16V
R508
10K
R506
100
Q502
2SC3052
IR_OUT
EB
C
R503
10K
IR_OUT
IR_OUT
R505
47K
IR_OUT
R504
10K
IR_OUT
R50122
IR_OUT
+5V_ST
+5V_ST
Q501
2SC3052
IR_OUT EB
C
R502
10K
IR_OUT
R507
10K
+3.3V
MDS61887701
M1
SMD GASKET-JACK
MDS61887701
M2
SMD GASKET-MEMORY
MDS61887701
M3
SMD GASKET-LVDS
EAX60148002-0(LH50)
5 11
2009.01.19
close to wafer
IR & LED
Zener Diode is
$0.09801
Copyright ⓒ 2009 LG Electronics. Inc. All right reserved.
Only for training and servcie purposes
LGE Internal Use Only

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
HDMI
+5V_GENERAL
C612
0.1uF
R630
4.7K
R625
4.7K
EEPROM_SCL
EEPROM_SDA
IC601
CAT24WC08W-T
3
A2
2
A1
4
VSS
1
A0
5SDA
6SCL
7WP
8VCC
R638
0
C616
0.1uF
EDID_WP
R647 0
+5V_ST
R642 0
DDC_SCL_1
5V_HDMI_1
JP611
IC602
AT24C02BN-10SU-1.8
3
A2
2
A1
4
GND
1
A0
5SDA
6SCL
7WP
8VCC
C618
0.1uF
R646 0
R637
0
C615
0.1uF
R640 0
GND
5V_HDMI_2
EDID_WP
+5V_ST
DDC_SDA_2
DDC_SCL_3
D604
ENKMC2838-T112
A1
C
A2
R644 0
5V_HDMI_3
DDC_SCL_4
R636
0
+5V_ST
R645 0
R639
0
DDC_SDA_4
JP610
IC604
AT24C02BN-10SU-1.8
3
A2
2
A1
4
GND
1
A0
5SDA
6SCL
7WP
8VCC
D605
ENKMC2838-T112
A1
C
A2
EDID_WP
C617
0.1uF
DDC_SDA_3
R641 0
IC603
AT24C02BN-10SU-1.8
3
A2
2
A1
4
GND
1
A0
5SDA
6SCL
7WP
8VCC
DDC_SDA_1
EDID_WP
JP609
+5V_ST
IC605
AT24C02BN-10SU-1.8
3
A2
2
A1
4
GND
1
A0
5SDA
6SCL
7WP
8VCC
D606
ENKMC2838-T112
A1
C
A2
D603
ENKMC2838-T112
A1
C
A2
R643 0 DDC_SCL_2
JP608
C614
0.1uF
+3.3V_HDMI
L600
BLM18PG121SN1D
+3.3V
DDC_SDA_3
D0+_HDMI3
DDC_SCL_2
R611 0
D2+_HDMI2
R610 0
JP603
D2+_HDMI3
R608 0
JP604
CK+_HDMI3
D1+_HDMI1
D2+_HDMI1
R604 0
CK-_HDMI1
CK+_HDMI1
D0-_HDMI2
JP605
D2-_HDMI3
D2-_HDMI2
D0-_HDMI1
D1-_HDMI2
R605 0
GND
CEC_REMOTE
R606 0
DDC_SDA_2
CK-_HDMI3
D2-_HDMI1
5V_HDMI_2
GND
D1-_HDMI3
5V_HDMI_3
JP600
5V_HDMI_1
JP602
CK-_HDMI2
D0+_HDMI1
DDC_SDA_1
GND
R607 0
DDC_SCL_1
JP601
CEC_REMOTE
R609 0CEC_REMOTE
D1+_HDMI2
D1+_HDMI3
DDC_SCL_3
HPD3
D0+_HDMI2
D0-_HDMI3
R603 0
CK+_HDMI2
D1-_HDMI1
DDC_SDA_4
D1+_HDMI4
HPD4
5V_HDMI_4
R620 0
D2+_HDMI4
DDC_SCL_4
D0+_HDMI4
CK+_HDMI4
D1-_HDMI4
CEC_REMOTE
JP606
D2-_HDMI4
R622 0
R621 0
CK-_HDMI4
GND
JP607
JK603
EAG42463001
14
13
5D1_GND
20
JACK_GND
12
11
2D2_GND
19
18
10 CK+
4D1+
1D2+
17
9D0-
8D0_GND
3D2-
16
7D0+
6D1-
15
D0-_HDMI4
5V_HDMI_4
DDC_SDA_2
DDC_SCL_1
SDA_HDMI_SW
C608 0.1uF C607 0.1uF
D0+_HDMI3
CK+_HDMI1
D0-_HDMI1
CK+_HDMI2
CK-_HDMI1
DDC_SCL_3
C610 0.1uF
D0-_HDMI3
DDC_SDA_1
D1-_HDMI2
C606 0.1uF
D1+_HDMI1
CK-_HDMI2
DDC_SDA_3
R619 4.7K
D1+_HDMI2
R629
4.7K
D0-_HDMI2
D2-_HDMI1
D2+_HDMI2
C605 0.1uF
SCL_HDMI_SW
R628
4.7K
OPT
D1+_HDMI3
D2-_HDMI2
C611 0.1uF
D1-_HDMI3
C609 0.1uF
IC600
TMDS351PAGR
1
SDA3
2
SCL3
3
GND_1
4
B31
5
A31
6
VCC_1
7
B32
8
A32
9
GND_2
10
B33
11
A33
12
VCC_2
13
B34
14
A34
15
GND_3
16
VSADJ
17
Y4
18
Z4
19
VCC_3
20
Y3
21
Z3
22
GND_4
23
Y2
24
Z2
25
VCC_4
26
Y1
27
Z1
28
GND_5
29
SCL_SINK
30
SDA_SINK
31
HPD_SINK
32
S1
33 S2
34 EQ
35 HPD1
36 SDA1
37 SCL1
38 B11
39 A11
40 VCC_5
41 B12
42 A12
43 GND_6
44 B13
45 A13
46 VCC_6
47 B14
48 A14
49 VDD 50 HPD2 51 SDA2 52 SCL2 53 B21 54 A21 55 VCC_7 56 B22 57 A22 58 GND_7 59 B23 60 A23 61 VCC_8 62 B24 63 A24 64 HPD3
CK-_HDMI3 D1-_HDMI1
D2+_HDMI1
D0+_HDMI2
C604 0.1uF
DDC_SCL_2
D2-_HDMI3
D2+_HDMI3
D0+_HDMI1
C613 0.1uF
CK+_HDMI3
+3.3V_HDMI
+3.3V_HDMI
HDMI_RX2-
HDMI_RX0-
HDMI_RX2+
HDMI_RX1- HDMI_RX0+ HDMI_RX1+
HDMI_CLK+ HDMI_CLK-
HDMI_SEL2
HDMI_SEL1
HDMI_EQ_SEL
R657 0
OPT
+5V_GENERAL
L601
BLM18PG121SN1D
+5V_HDMI
+5V_HDMI
+5V_HDMI
C619
0.1uF
R632 22
R633 22
R617
10K
Q601
2SC3052
E
B
C
C601
0.1uF
16V
R613
1K
HPD1
R616 0
OPT
R634
1K
OPT
R601
2K
HPD2
R623
10K
R614
1K
R635
1K
OPT
C602
0.1uF
16V
R618 0
OPT
R602
2K
Q602
2SC3052
E
B
C
R631
10K
R615
1K
R656
1K
OPT
C603
0.1uF
16V
R624 0
OPT
R612
2K
Q603
2SC3052
E
B
CR661
10K
R659
1K
R662
1K
OPT
C620
0.1uF
16V
R660 0
OPT
R658
2K
Q604
2SC3052
E
B
C
VR601
AVRL161A1R1NT
OPT
GND
C621
0.1uF
16V
OPT
CEC_REMOTE
006:L4;006:L13;006:L23;006:U23
+3.3V_ST
GND
D601
MMBD301LT1G
HDMI_CEC
002:D15
R663
0
R664
0
R666 9.1K
OPT
Q605
SSM6N15FUOPT
3DRAIN2
2GATE1
1SOURCE1
4
SOURCE2
5
GATE2
6
DRAIN1
+3.3V_HDMI
R667
10K
OPT
R669
10K
OPT
+3.3V_HDMI
R668
10K
OPT
+3.3V_HDMI
R670
10K
OPT
+3.3V_HDMI
R665
120K
JK601
EAG39789402 HDMI_JACK_EAG
1D2+
2D2_GND
3D2-
4D1+
5D1_GND
6D1-
7D0+
8D0_GND
9D0-
10 CK+
11
12
13
14
15
16
17
18
19
20
GND
21
GND
22
JK600
EAG39789402 HDMI_JACK_EAG
1D2+
2D2_GND
3D2-
4D1+
5D1_GND
6D1-
7D0+
8D0_GND
9D0-
10 CK+
11
12
13
14
15
16
17
18
19
20
GND
21
GND
22
JK602
EAG39789402 HDMI_JACK_EAG
1D2+
2D2_GND
3D2-
4D1+
5D1_GND
6D1-
7D0+
8D0_GND
9D0-
10 CK+
11
12
13
14
15
16
17
18
19
20
GND
21
GND
22
R627
4.7K
R626
4.7K
R648
4.7K R652
4.7K
R649
4.7K
R653
4.7K
R650
4.7K R654
4.7K
R655
4.7K
R651
4.7K
JK600-*1
HDMI_JACK_66126612B00015D
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
JK601-*1
HDMI_JACK_66126612B00015D
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
JK602-*1
HDMI_JACK_66126612B00015D
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
EAX60148002-0(LH50)
6 11
HDMI
2009.01.19
HDCP EEPROM
HDMI EEPROM
UI_HW_PORT2
UI_HW_PORT3
UI_HW_PORT1
SIDE HDMI
$0.26
UI_HW_PORT4
L: HDMI1.3 Compliant Cable
H: 10m 28 AWG Cable
L H Unselected, HPD ALL
H
DDC1, HPD1
DDC2, HPD2
SEL1
DDC3, HPD3L
I/O Selected
L
SEL2
H H
L
$0.253
$0.253
$0.253 $0.2522
$0.48
$0.199
$0.055
$0.055
$0.055
$0.055
$0.0526
Copyright ⓒ 2009 LG Electronics. Inc. All right reserved.
Only for training and servcie purposes
LGE Internal Use Only