MYiR MYD-Y6ULX Linux User manual

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MYD-Y6ULX| Product Manual
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MYD-Y6ULX
Product Manual
Version 1.0
08-Nov-2017

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MYD-Y6ULX| Product Manual
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Version History
Version
Description
DATE
V1.0
Initial version
08-Nov-2017

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Table of Contents
Table of Contents ..............................................................................................................3
1.Product Abstract.............................................................................................................4
2. Hardware Characteristics .............................................................................................8
2.1 CPU Module Resource.................................................................................................... 8
2.2 Base Board Resources.................................................................................................... 9
3. Interfaces......................................................................................................................11
3.1 Interface of CPU Module Board..................................................................................... 11
3.2 PIN List.......................................................................................................................... 11
3.3 Peripheral Interfaces of Base Board ............................................................................. 12
4. Hardware Design .........................................................................................................14
4.1 Hardware Design of CPU Module board....................................................................... 14
4.2 Hardware Design of Baseboard .................................................................................... 14
5. Electronic Characteristics..........................................................................................30
5.1 Operating temperature .................................................................................................. 30
5.2 Power Supply................................................................................................................. 30
5.3 GPIO DC Characteristics............................................................................................... 31
6. Mechanical Characteristics........................................................................................32

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1.Product Abstract
The MYD-Y6ULX Development Board is a complete evaluation platform for NXP’s i.MX
6UL/6ULL processor which features the most efficient ARM Cortex-A7 core. Each
processor in this family provides various memory interfaces, including 16-bit LPDDR2,
DDR3, DDR3L, raw and managed NAND flash, NOR flash, eMMC, Quad SPI and a wide
range of other interfaces for connecting peripherals. The MYD-Y6ULX development
boards are consisted of a CPU module MYC-Y6ULX and a base board MYB-Y6ULX. It is
designed to be a complete design reference for embedded developing on the i.MX
6UL/6ULL processor and designs based on MYC-Y6ULX CPU Module.
Figure 1.1 MYD-Y6ULX Development Board
MYD-Y6ULX development board integrated LTE module, WIFI module, LCD interface,
camera interface, dual Ethernet and many other peripherals. It provides rich development
resources for Industry / Internet of things gateway (IOT Gateway), DTU, HMI and so on.
MYD-Y6ULX development board provides peripheral driver support for Linux 4.1.15
operating system. MYIR provides rich software resources and detailed documents with

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the board including user manuals, schematic of the base board, peripheral drivers, BSP
source packages, development tools and other related information.
MYIR is using the 528 MHz MCIMX6G2CVM05AB and MCIMX6Y2DVM05AAchip with 14
x 14mm, 0.8 mm ball pitch, 289 MAPBGA package on the MYC-Y6ULX. The
i.MX6ULL\6UL application processor on the MYC-Y6ULX board provides multiple
compatible options of Y0, Y1, Y2, G0, G1, G2 and G3 sub families.MYIR provides the
following three part number by default.
Part No.
MYD-Y6ULG2-256N256D-50-I
MYD-Y6ULY2-256N256D-50-C
MYD-Y6ULY2-4E512D-50-C
Processor
MCIMX6G2CVM05AB
MCIMX6Y2DVM05AA
MCIMX6Y2DVM05AA
RAM
256MB DDR3
256MB DDR3
512MB DDR3
Flash
256MB Nand Flash
256MB Nand Flash
4GB eMMC
WiFi
Support
Support
Reused SDIO with eMMC
Working
Temp.
-40 to +85 Celsius
(WIFI -20 to +65 Celsius)
0 to +70 Celsius
0 to +70 Celsius
Table 1.1 Part Number of MYD-6ULX (default configurations)
MYIR offers customization on optional CPU and memory size configuration in bulk orders.
The differences between these chips are as follows,
Feature
MCIMX6G0
MCIMX6G1
MCIMX6G2
MCIMX6G3
Speed
528 MHz
528 MHz, 700 MHz
528 MHz, 700 MHz
528 MHz
Cache
32 KB-I, 32 KB-D
32 KB-I, 32 KB-D
128 KB L2
32 KB-I, 32 KB-D
128 KB L2
32 KB-I, 32 KB-D
128 KB L2
OCRAM
128 KB
128 KB
128 KB
128 KB
DRAM
16-bit LP-DDR2,
DDR3/DDR3L
16-bit LP-DDR2,
DDR3/DDR4L
16-bit LP-DDR2,
DDR3/DDR5L
16-bit LP-DDR2,
DDR3/DDR6L
eFuse
512-bit
1024-bit
1536-bit
2048-bit
NAND
(BCH40)
Yes
Yes
Yes
Yes
EBI
Yes
Yes
Yes
Yes
Ethernet
10/100-Mbit/s x 1
10/100-Mbit/s x 1
10/100-Mbit/s x 2
10/100-Mbit/s x 2

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USB
OTG, HS/FS x 1
OTG, HS/FS x 2
OTG, HS/FS x 2
OTG, HS/FS x 2
CAN
0
1
2
2
Security
Basic
TRNG, Crypto
Engine
(AES/TDES/SHA),
Secure Boot
TRNG, Crypto
Engine
(AES/TDES/SHA),
Secure Boot
TRNG, Crypto Engine (AES
with DPA/TDES/SHA/RSA),
Secure Boot, tamper
monitor,
PCI4.0 pre-certification,
OTF DRAM encryption
Graphic
None
None
PxP
PxP
CSI
None
None
24-bit Parallel CSI
24-bit Parallel CSI
LCD
None
None
24-bit Parallel LCD
24-bit Parallel LCD
Quad SPI
1
1
1
1
SDIO
2
2
2
2
UART
4
8
8
8
I2C
2
4
4
4
SPI
2
4
4
4
I2S/SAI
1
3
3
3
S/PDIF
1
1
1
1
Timer/PWM
Timer x 2, PWM x
4
Timer x 4, PWM x 8
Timer x 4, PWM x 8
Timer x 4, PWM x 8
12-bit ADC
1 x 10-ch.
1 x 10-ch.
2 x 10-ch.
2 x 10-ch.
Table 1.2 i.MX 6UL Processor Resource Comparison
Feature
MCIMX6Y0
MCIMX6Y1
MCIMX6Y2
Core
ARM® Cortex-A7
ARM® Cortex-A7
ARM® Cortex-A7
Speed
500 MHz
500 MHz
500/800/900 MHz
Cache
32 KB-I, 32 KB-D
32 KB-I, 32 KB-D
128 KB L2
32 KB-I, 32 KB-D
128 KB L2
OCRAM
128 KB
128 KB
128 KB

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DRAM
16-bit LP-DDR2,
DDR3/DDR3L
16-bit LP-DDR2,
DDR3/DDR4L
16-bit LP-DDR2,
DDR3/DDR5L
eFuse
256-bit
256-bit
256-bit
NAND (BCH40)
Yes
Yes
Yes
EBI
Yes
Yes
Yes
Ethernet
10/100-Mbit/s x 1
10/100-Mbit/s x 1
10/100-Mbit/s x 2
USB
OTG, HS/FS x 1
OTG, HS/FS x 2
OTG, HS/FS x 2
CAN
0
1
2
Graphic
None
None
PxP
CSI
None
None
16-bit Parallel CSI
LCD
None
None
24-bit Parallel LCD
Quad SPI
1
1
1
SDIO
2
2
2
UART
4
8
8
I2C
2
4
4
SPI
2
4
4
I2S/SAI
1
3
3
ESAI
1
1
1
S/PDIF
1
1
1
Timer/PWM
Timer x 2, PWM x 4
Timer x 4, PWM x 8
Timer x 4, PWM x 8
12-bit ADC
1 x 10-ch.
1 x 10-ch.
2 x 10-ch.
Security
None
AES-128, HAB
AES-128, HAB
Temperature
-40°C to 105°C (Tj)
-40°C to 105°C (Tj)
0°C to 90°C (Tj)
Table 1.3 i.MX 6ULL Processor Resource Comparison

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2. Hardware Characteristics
2.1 CPU Module Resource
MYC-Y6ULX CPU module is compatible with i.MX 6UL and i.MX 6ULL series processors.
The board with high-speed circuit board design, which is integrated processor, DDR,
NAND Flash, eMMC, Ethernet PHY and power management circuit on the PCB size of 37
x 39 mm.
Please refer to the below Figure 2.1 for detail.
Figure 2.1 Function Block Diagram of MYC-Y6ULX
Processor
MCIMX6G2CVM05AB\MCIMX6Y2DVM05AA
Memory
256MB/512MB DDR3L
4GB eMMC Flash (Reuse with NAND Flash)
256MB NAND Flash (Reuse with eMMC)
Peripherals
10/100 Ethernet PHY
Expansion connector (Up to 97 x GPIOs)

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2.2 Base Board Resources
The MYB-Y6ULX base board offers rich peripherals to evaluate and make developments
on MYC-Y6ULX.
Please refer to the below Figure 2.2 for detail.
Figure 2.2 MYD-Y6ULX Base Board
Serial ports
- 1 x Debug serial port (TTL)
- 1 x RS485 serial port (with isolation)
- 1 x 3-wire RS232 serial port (with isolation)
USB
- 2 x USB2.0 Host ports
- 1 x Micro USB2.0 OTG ports
1 x Mini PCI-E USB LTE module interface (external SMAantenna)
1 x SIM card socket
1 x WiFi module (external SMAantenna)
2 x 10/100 Mbps Ethernet interfaces
1 x Camera interface

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1x CAN interface (with isolation)
1 x Micro SD card slot
1 x LCD interface (16-bit true color, supports optional 4.3-inch and 7-inch
TFT LCD)
1 x RTC battery holder
Audio input/output port (3.5mm jack)
3 x Buttons (1 x Reset button, 1 x User button, 1 x ON/OFF button)
2 x LEDs (1 x power indicator LED, 1 x user LED)
1 x 2.0mm 20-pin male expansion connector

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3. Interfaces
3.1 Interface of CPU Module Board
The MYC-Y6ULX CPU module is connected to the base board by 1.0mm pitch 140-pin
surface mount pads. Please refer to the pin assignment as below.
Figure 3.1 MYC-Y6ULX Pin Assignment
3.2 PIN List
Please refer to the PIN-Out description document MYC-Y6ULX Pin-List , which is provided in
the CD-ROM of the development kit.

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3.3 Peripheral Interfaces of Base Board
Rich peripheral interface resources are provided on the MYB-Y6ULX base board, which
offer a comprehensive evaluating and developing platform for the MYC-Y6ULX CPU
module and the i.MX6UL\6ULL series processor. Detailed resources provided as below.
Figure 3.2 MYD-Y6ULX Resources
Please refer to the interface list as below.
Interface
Designator
Description
CPU Module
U33
MYC-Y6ULX CPU module
Power Input 1
J22
12V DC power input, 2.1 mm DC jack
Power Input 2
J23
12V DC power input,3.81mm terminal
block
Camera
J9
8 Bit Camera interface
Ethernet 1
CN1
10/100Mbps ethernet 1 interface
Ethernet 2
CN2
10/100Mbps ethernet 2 interface

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Terminal Block
J10
10 pins 3.81mm terminal Block,include
the following functions,
1 x RS485 serial port (with isolation)
1 x 3-wire RS232 serial port (with
isolation)
1x CAN interface (with isolation)
Debug UART
JP1
Debug serial port, compatible with 5V and
3.3V level
USB OTG
J26
Micro USB OTG interface
USB Host
J6
USB host interface
Micro SD Card
J8
4 bit micro SD Card interface
Battery
J2
RTC battery holder
LCD
J3
16-bit true color, supports optional
4.3-inch and 7-inch TFT LCD
Audio
J4
3.5mm stereo audio output port
(Headphone)
J5
3.5mm audio line in input
MIC1
Microphone input
Buttons
K2
Reset button
K3
User button
K1
ONOFF button
LED
D1
Power LED
D30
User LED
4G Module
U12
Mini PCI-E USB LTE module interface
SIM Card
J21
SIM Card interface
4G Antenna
J24
SMA LTE antenna interface
WiFi Antenna
J12
SMAWiFi antenna interface
Expansion Header
J14
Expansion IO header,2.0mm pitch
Figure 3.1 List of MYD-Y6ULX Resources

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4. Hardware Design
4.1 Hardware Design of CPU Module board
Please refer to the document MYC-Y6ULX Product Manual for detail information.
4.2 Hardware Design of Baseboard
4.2.1 Power supply
MYB-Y6ULX base board is designed to be powered by DC 12V, and the internal power
management circuit on-board supplies 5V, 3.8V, 3.3V, 1.8V, 3V (RTC) voltage for the
board.
Please refer to Figure 4.1 for detail.
Figure 4.1 MYB-Y6ULX Power Tree
DCDC convertor with maximum output current of 3Ais used for 12V to 5V and 12V to 3.8V.
The part number of the DCDC convertor is TLV62130. DCDC can provide higher power
conversion efficiency and reduce the power consumption of the board. LDO regulator with
part number RT9018 is used for 5V to 3.3V and 3.3V to 1.8V. LDO can provide smaller
power ripple than the DCDC convertor. The RTC battery input is an optional input. When

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the system is powered down, if the RTC does not need to work, it is not require to provide
this power rail.
4.2.2 Boot configure switch
The boot process begins at the Power-On Reset (POR) where the hardware reset logic
forces the ARM core to begin the execution starting from the on-chip boot ROM. The boot
ROM code uses the state of the internal register BOOT_MODE[1:0] as well as the state of
various eFUSEs and/or GPIO settings to determine the boot flow behavior of the device.
MYD-Y6ULX is equipped with a 4 bit switch to change the boot device.
Please refer to the schematic for the boot state as below,
Figure 4.2 Boot Configure Switch
There are some differences between the NAND Flash version and the eMMC version in
the boot Configure and the hardware. For NAND Flash version, remove R207 and R209,
mount R206 and R208. For eMMC version, remove R206 and R208, mount R207 and
R209.
Bit1 and Bit2 are used to select boot device. Please refer NAND Flash version setting as
below.
Switch
BIT1
BIT2
SD Card
ON
OFF
NAND Flash
OFF
ON
Table 4.1 NAND Flash Version Boot Configure
Please refer eMMC version setting as below,

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Switch
BIT1
BIT2
SD Card
ON
ON
eMMC
OFF
OFF
Table 4.2 eMMC Version Boot Configure
Bit3 and Bit4 are used to select boot type, please refer the setting as below,
Switch
Boot TYPE
BIT4
BIT3
ON
ON
Boot From Fuses
ON
OFF
Serial Downloader
OFF
ON
Internal Boot
OFF
OFF
Reserved
Table 4.3 Boot Type Configure
4.2.3 Ethernet
MYB-Y6ULX is equipped with two ethernets operating at 10/100 Mbps, which offering
standard RJ45 connector (With voltage transformer inside the socket). MYC-Y6ULX has
Integrated a PHY chips (Microchips, LAN8720A). The ethernet 1 circuit on base board has
been greatly simplified by using the PHY.Proper protection circuit can be added when
customer developing your own base board.
Please refer to the SCH of the Ethernet1 of base board as below.

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Figure 4.3 Ethernet 1 Circuit
For the Ethernet 2, an additional PHY chips has to add on the base board. Please refer to
the SCH of the Ethernet 2 of base board as below.
Figure 4.4 Ethernet 2 Circuit
4.2.4 USB
i.MX6UL\6ULL processor provides two high speed (HS) USB 2.0 OTG (Up to 480 Mbps) ,
with integrated high speed USB PHY.OTG1 port is connected to a standard micro USB
Device connector (Micro USB), which can be used as slave and host. OTG2 is connected
to a USB Hub chip (USB2514/MJ from Microchip), which is used to expand four USB host

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controller. Two of the expanded USB host controller is connected to a dual USB connector
(TypeA) and Port 3 of the expanded USB has been connected to the LTE module.the rest
is reserved.
Please refer to the schematic of the USB OTG of the board as below. We implement a
power switch circuit on the board, and the power can be automatically switched according
to the access device.
Figure 4.5 USB OTG
Refer to the schematic of USB Hub as below

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Figure 4.6 USB Hub
Refer to the schematic of USB Host as below.
Figure 4.7 USB Host
4.2.5 LTE Module
MYB-Y6ULX is equipped with a LTE module interface, which can support many general
mini PCI-E LTE module. MYD-Y6ULX development board provides Linux driver support
and code examples based on EC20 LTE module from quectel. The part number of the

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mini PCIE connector is AAA-PCI-047 from LOTES.
Refer to the schematic of LTE module interface as below.
Figure 4.8 LTE Module
Using the LTE module, the user also needs a SIM card. MYB-Y6ULX is equipped with a
side insert type SIM card connector. Refer to the schematic of as below.
Figure 4.9 SIM Card
4.2.6 Audio CODEC
WM8904 Audio CODEC silicon from Wolfson is equipped on MYB-Y6ULX. It provides
high quality audio performance. One (1) unit of 3.5mm headphone interface, 1 unit of
audio in and one unit of MIC are expanded for the comprehensive audio application.
I2S signal of WM8904 is connected to the SAI2 controller of the CPU and I2C of WM8904