
TL/H/7380
LM380 Power Audio Amplifier AN-69
National Semiconductor
Application Note 69
December 1972
LM380 Power Audio
Amplifier
INTRODUCTION
The LM380 is a power audio amplifier intended for consum-
er applications. It features an internally fixed gain of 50
(34 dB) and an output which automatically centers itself at
one-half of the supply voltage. A unique input stage allows
inputs to be ground referenced or AC coupled as required.
The output stage of the LM380 is protected with both short
circuit current limiting and thermal shutdown circuitry. All of
these internally provided features result in a minimum exter-
nal parts count integrated circuit for audio applications.
This paper describes the circuit operation of the LM380, its
power handling capability, methods of volume and tone con-
trol, distortion, and various application circuits such as a
bridge amplifier, a power supply splitter, and a high input
impedance audio amplifier.
CIRCUIT DESCRIPTION
Figure 1
shows a simplified circuit schematic of the LM380.
The input stage is a PNP emitter-follower driving a PNP dif-
ferential pair with a slave current-source load. The PNP
input is chosen to reference the input to ground, thus en-
abling the input transducer to be directly coupled.
The output is biased to half the supply voltage by resistor
ratio R1/R2. Negative DC feedback, through resistor R2,
balances the differential stage with the output at half supply,
since R1e2R
2(
Figure 1
).
The second stage is a common emitter voltage gain amplifi-
er with a current-source load. Internal compensation is pro-
vided by the pole-splitting capacitor CÊ. Pole-splitting com-
pensation is used to preserve wide power bandwidth
(100 kHz at 2W, 8X). The output is a quasi-complementary
pair emitter-follower.
The amplifier gain is internally fixed to 34 dB or 50. This is
accomplished by the internal feedback network R2–R3. The
gain is twice that of the ratio R2/R3due to the slave current-
source which provides the full differential gain of the input
stage.
TABLE I. Electrical Characteristics (Note 1)
Parameter Conditions Min Typ Max Units
Power Output (rms) 8Xloads, 3% T.H.D. (Notes 3,4) 2.5 Wrms
Gain 40 50 60 V/V
Output Voltage Swing 8Xload 14 Vp-p
Input Resistance 150k X
Total Harmonic Distortion Poe1W, (Notes4&5) 0.2 %
Power Supply Rejection Cbypass e5mF, ²e120 Hz 38 dB
(Note 2)
Supply Voltage Range 8 22 V
Bandwidth Poe2W, RLe8X100k Hz
Quiescent Output Voltage 8 9 10 V
Quiescent Supply Current 7 25 mA
Short Circuit Current 1.3 A
Note 1: VSe18V; TAe25§C unless otherwise specified.
Note 2: Rejection ratio referred to output.
Note 3: With device Pins 3, 4, 5, 10, 11, 12 soldered into a (/16×epoxy glass board with 2 ounce copper foil with a minimum surface of six square inches.
Note 4: If oscillation exists under some load conditions, add a 2.7Xresistor and 0.1 mF series network from Pin 8 to ground.
Note 5: Cbypass e0.47 mF on Pin 1.
Note 6: Pins 3, 4, 5, 10, 11, 12 at 50§C derates 25§C/W above 50§C case.
C1995 National Semiconductor Corporation RRD-B30M115/Printed in U. S. A.