National Semiconductor LMH6624 User manual

LMH6624
Ultra Low Noise Wideband Operational Amplifier
General Description
The LMH6624 combines wide bandwidth (1.5 GBW) with
very low input noise (0.92nV/ , 2.3pA/ ) and ultra
low dc errors (100µV V
OS
,±0.1µV/˚C drift) providing a very
precise operational amplifier with wide dynamic range. This
enables the user to achieve closed-loop gains of greater
than 10.
The LMH6624’s traditional voltage feedback topology pro-
vides the following benefits: balanced inputs, low offset volt-
age and offset current, very low offset drift, 81dB open loop
gain, 95dB common mode rejection ratio, and 88dB power
supply rejection ratio.
The LMH6624 operates from ±2.5V to ±6V in dual supply
mode and from +5V to +12V in single supply configuration.
The LMH6624 is stable for closed-loop gain of A
V
≤−10 or
+10 ≤A
V
.
LMH6624 is offered in SOT23-5 and SOIC-8 packages.
Features
V
S
=±6V, T
A
= 25˚C, A
V
= 20, (Typical values unless
specified)
nGain bandwidth 1.5GHz
nInput voltage noise 0.92nV/
nInput offset voltage (limit over temp) 700uV
nSlew rate 350V/µs
nSlew rate (A
V
= 10) 400V/µs
nHD2 @f = 10MHz, R
L
= 100Ω−65dBc
nHD3 @f = 10MHz, R
L
= 100Ω−80dBc
nSupply voltage range (dual supply) ±2.5V to ±6V
nSupply voltage range (single supply) +5V to +12V
nImproved replacement for the CLC425
Applications
nInstrumentation sense amplifiers
nUltrasound pre-amps
nMagnetic tape & disk pre-amps
nWide band active filters
nProfessional Audio Systems
nOpto-electronics
nMedical diagnostic systems
Connection Diagrams
5-Pin SOT23 8−Pin SOIC
20058951
Top View
20058952
Top View
February 2003
LMH6624 Ultra Low Noise Wideband Operational Amplifier
© 2003 National Semiconductor Corporation DS200589 www.national.com

Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
ESD Tolerance
Human Body Model 2000V(Note 2)
Machine Model 200V (Note 9)
V
IN
Differential ±1.2V
Supply Voltage (V
+
-V
−
) 13.2V
Voltage at Input pins V
+
+0.5V, V
−
−0.5V
Soldering Information
Infrared or Convection (20 sec.) 235˚C
Wave Soldering (10 sec.) 260˚C
Storage Temperature Range −65˚C to +150˚C
Junction Temperature (Note 4) +150˚C
Operating Ratings (Note 1)
Operating Temperature Range
(Note 4) −40˚C to +125˚C
Package Thermal Resistance (θ
JA
)(Note 4)
SOIC-8 166˚C/W
SOT23–5 265˚C/W
±2.5V Electrical Characteristics
Unless otherwise specified, all limits guaranteed for at T
A
= 25˚C, V
+
= 2.5V, V
−
= −2.5V, V
CM
= 0V, A
V
= +20, R
F
= 500Ω,R
L
= 100Ω.Boldface limits apply at the temperature extremes. See (Note 12).
Symbol Parameter Conditions Min
(Note 6)
Typ
(Note 5)
Max
(Note 6)
Units
Dynamic Performance
f
CL
−3dB BW V
O
= 400mV
PP
90 MHz
SR Slew Rate(Note 8) V
O
=2V
PP
,A
V
= +20 300 V/µs
V
O
=2V
PP
,A
V
= +10 360
t
r
Rise Time V
O
= 400mV Step, 10% to 90% 4.1 ns
t
f
Fall Time V
O
= 400mV Step, 10% to 90% 4.1 ns
t
s
Settling Time 0.1% V
O
=2V
PP
(Step) 15 ns
Distortion and Noise Response
e
n
Input Referred Voltage Noise f = 1MHz 0.95 nV/
i
n
Input Referred Current Noise f = 1MHz 2.3 pA/
HD2 2
nd
Harmonic Distortion f
C
= 10MHz, V
O
=1V
PP
,R
L
100Ω−60 dBc
HD3 3
rd
Harmonic Distortion f
C
= 10MHz, V
O
=1V
PP
,R
L
100Ω−78 dBc
Input Characteristics
V
OS
Input Offset Voltage V
CM
= 0V −0.75
−0.95
+0.25 +0.75
+0.95
mV
Average Drift (Note 7) V
CM
=0V ±0.2 µV/˚C
I
OS
Input Offset Current V
CM
= 0V −1.5
−2.0
−0.05 +1.5
+2.0
µA
Average Drift (Note 7) V
CM
= 0V 0.6 nA/˚C
I
B
Input Bias Current V
CM
= 0V 13 +20
+25
µA
Average Drift (Note 7) V
CM
= 0V 12 nA/˚C
R
IN
Input Resistance (Note 10) Common Mode 6.6 MΩ
Differential Mode 4.6 kΩ
C
IN
Input Capacitance (Note 10) Common Mode 0.9 pF
Differential Mode 2.0
CMRR Common Mode Rejection
Ratio
Input Referred,
V
CM
= −0.5 to +1.9V
V
CM
= −0.5 to +1.75V
87
85
90 dB
Transfer Characteristics
A
VOL
Large Signal Voltage Gain R
L
= 100Ω,V
O
= −1V to +1V 75
70
79 dB
LMH6624
www.national.com 2

±2.5V Electrical Characteristics (Continued)
Unless otherwise specified, all limits guaranteed for at T
A
= 25˚C, V
+
= 2.5V, V
−
= −2.5V, V
CM
= 0V, A
V
= +20, R
F
= 500Ω,R
L
= 100Ω.Boldface limits apply at the temperature extremes. See (Note 12).
Symbol Parameter Conditions Min
(Note 6)
Typ
(Note 5)
Max
(Note 6)
Units
Output Characteristics
V
O
Output Swing R
L
= 100Ω±1.1
±1.0
±1.5
V
No Load ±1.4
±1.25
±1.7
RO Output Impedance f ≤100KHz 10 mΩ
I
SC
Output Short Circuit Current Sourcing to Ground
∆V
IN
= 200mV (Note 3), (Note 11)
90
75
145
mA
Sinking to Ground
∆V
IN
= −200mV (Note 3), (Note 11)
90
75
145
I
OUT
Output Current Sourcing, V
O
= +0.8V
Sinking, V
O
= −0.8V
100 mA
Power Supply
PSRR Power Supply Rejection Ratio V
S
=±2.0V to ±3.0V 82
80
90 dB
I
S
Supply Current No Load 11.4 16
18
mA
±6V Electrical Characteristics
Unless otherwise specified, all limits guaranteed for at T
A
= 25˚C, V
+
= 6V, V
−
= −6V, V
CM
= 0V, A
V
= +20, R
F
= 500Ω,R
L
=
100Ω.Boldface limits apply at the temperature extremes. See (Note 12).
Symbol Parameter Conditions Min
(Note 6)
Typ
(Note 5)
Max
(Note 6)
Units
Dynamic Performance
f
CL
−3dB BW V
O
= 400mV
PP
95 MHz
SR Slew Rate (Note 8) V
O
=2V
PP
,A
V
= +20 350 V/µs
V
O
=2V
PP
,A
V
= +10 400
t
r
Rise Time V
O
= 400mV Step, 10% to 90% 3.7 ns
t
f
Fall Time V
O
= 400mV Step, 10% to 90% 3.7 ns
t
s
Settling Time 0.1% V
O
=2V
PP
(Step) 14 ns
Distortion and Noise Response
e
n
Input Referred Voltage Noise f = 1MHz 0.92 nV/
i
n
Input Referred Current Noise f = 1MHz 2.3 pA/
HD2 2
nd
Harmonic Distortion f
C
= 10MHz, V
O
=1V
PP
,R
L
100Ω−65 dBc
HD3 3
rd
Harmonic Distortion f
C
= 10MHz, V
O
=1V
PP
,R
L
100Ω−80 dBc
Input Characteristics
V
OS
Input Offset Voltage V
CM
= 0V −0.5
−0.7
+0.10 +0.5
+0.7
mV
Average Drift (Note 7) V
CM
=0V ±0.1 µV/˚C
I
OS
Input Offset Current V
CM
= 0V −1.1
−2.5
0.05 1.1
2.5
µA
Average Drift (Note 7) V
CM
= 0V 0.7 nA/˚C
I
B
Input Bias Current V
CM
= 0V 13 +20
+25
µA
Average Drift (Note 7) V
CM
= 0V 12 nA/˚C
R
IN
Input Resistance (Note 10) Common Mode 6.6 MΩ
Differential Mode 4.6 kΩ
LMH6624
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±6V Electrical Characteristics (Continued)
Unless otherwise specified, all limits guaranteed for at T
A
= 25˚C, V
+
= 6V, V
−
= −6V, V
CM
= 0V, A
V
= +20, R
F
= 500Ω,R
L
=
100Ω.Boldface limits apply at the temperature extremes. See (Note 12).
Symbol Parameter Conditions Min
(Note 6)
Typ
(Note 5)
Max
(Note 6)
Units
C
IN
Input Capacitance (Note 10) Common Mode 0.9 pF
Differential Mode 2.0
CMRR Common Mode Rejection
Ratio
Input Referred,
V
CM
= −4.5 to +5.25V
V
CM
= −4.5 to +5.0V
90
87
95 dB
Transfer Characteristics
A
VOL
Large Signal Voltage Gain R
L
= 100Ω,V
O
= −3V to +3V 77
72
81 dB
Output Characteristics
V
O
Output Swing R
L
= 100Ω±4.4
±4.3
±4.9
V
No Load ±4.8
±4.65
±5.2
R
O
Output Impedance f ≤100KHz 10 mΩ
I
SC
Output Short Circuit Current Sourcing to Ground
∆V
IN
= 200mV (Note 3), (Note 11)
100
85
156
mA
Sinking to Ground
∆V
IN
= −200mV (Note 3), (Note 11)
100
85
156
I
OUT
Output Current Sourcing, V
O
= +4.3V
Sinking, V
O
= −4.3V
100 mA
Power Supply
PSRR Power Supply Rejection Ratio V
S
=±5.4V to ±6.6V 82
80
88 dB
I
S
Supply Current No Load 12 16
18
mA
LMH6624
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Note 1: Absolute maximum ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
intended to be functional, but specific performance is not guaranteed. For guaranteed specifications and the test conditions, see the Electrical Characteristics.
Note 2: Human body model, 1.5Ωin series with 100pF.
Note 3: Applies to both single-supply and split-supply operation. Continuous short circuit operation at elevated ambient temperature can result in exceeding the
maximum allowed junction temperature of 150˚C.
Note 4: The maximum power dissipation is a function of TJ(MAX),θJA, and TA. The maximum allowable power dissipation at any ambient temperature is
PD=(T
J(MAX) -T A)/ θJA . All numbers apply for packages soldered directly onto a PC board.
Note 5: Typical Values represent the most likely parametric norm.
Note 6: All limits are guaranteed by testing or statistical analysis.
Note 7: Average drift is determined by dividing the change in parameter at temperature extremes into the total temperature change.
Note 8: Slew rate is the slowest of the rising and falling slew rates.
Note 9: Machine Model, 0Ωin series with 200pF.
Note 10: Simulation results.
Note 11: Short circuit test is a momentary test. Output short circuit duration is 1.5ms.
Note 12: Electrical table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very limited self-heating of
the device such that TJ=T
A. No guarantee of parametric performance is indicated in the electrical tables under conditions of internal self-heating where TJ>TA.
See applications section for information on temperature derating of this device. Absolute maximum ratings indicate junction temperature limits beyond which the
device may be permanently degraded, either mechanically or electrically.
Ordering Information
Package Part Number Package Marking Transport Media NSC Drawing
SOT23-5 LMH6624MF A94A 1k Units Tape and Reel MF05A
LMH6624MFX 3k Units Tape and Reel
SOIC-8 LMH6624MA LMH6624MA 95 Units/Rail M08A
LMH6624MAX 2.5k Units Tape and Reel
LMH6624
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Typical Performance Characteristics
Noise vs. Frequency Amplifier Peaking with Varying R
F
20058950 20058917
Open Loop Frequency Response Over Temperature Open Loop Frequency Response Over Temperature
20058959 20058960
Frequency Response with Varying V
S
Frequency Response with Varying V
S
20058913 20058914
LMH6624
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Typical Performance Characteristics (Continued)
Inverting Frequency Response Inverting Frequency Response
20058916 20058915
Non-Inverting Frequency Response Non-Inverting Frequency Response
20058904 20058903
Non-Inverting Frequency Response Varying V
IN
Non-Inverting Frequency Response Varying V
IN
20058906 20058905
LMH6624
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Typical Performance Characteristics (Continued)
Non-Inverting Frequency Response Varying V
IN
Non-Inverting Frequency Response Varying V
IN
20058908 20058907
Frequency Response with Cap. Loading Frequency Response with Cap. Loading
20058940 20058941
Frequency Response with Cap. Loading Frequency Response with Cap. Loading
20058939 20058938
LMH6624
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Typical Performance Characteristics (Continued)
Sourcing Current vs. V
OUT
Sourcing Current vs. V
OUT
20058957 20058954
Sinking Current vs. V
OUT
Sinking Current vs. V
OUT
20058958 20058956
V
OS
vs. V
SUPPLY
I
OS
vs. V
SUPPLY
20058955 20058953
LMH6624
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Typical Performance Characteristics (Continued)
Distortion vs. Frequency Distortion vs. Frequency
20058944 20058946
Distortion vs. Frequency Distortion vs. Gain
20058945 20058942
Distortion vs. V
OUT
Peak to Peak Distortion vs. V
OUT
Peak to Peak
20058943 20058947
LMH6624
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Typical Performance Characteristics (Continued)
Non-Inverting Large Signal Pulse Response Non-Inverting Large Signal Pulse Response
20058909 20058910
Non-Inverting Small Signal Pulse Response Non-Inverting Small Signal Pulse Response
20058912 20058911
PSRR vs. Frequency PSRR vs. Frequency
20058948 20058949
LMH6624
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Typical Performance Characteristics (Continued)
Input Referred CMRR vs. Frequency Input Referred CMRR vs. Frequency
20058901 20058902
LMH6624
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Application Section
INTRODUCTION
The LMH6624, a very wide gain bandwidth, ultra low noise
voltage feedback operational amplifier, enables applications
such as medical diagnostic ultrasound, magnetic tape & disk
storage and fiber-optics to achieve maximum high frequency
signal-to-noise ratios. The set of characteristic plots in the
"Typical Performance" section illustrates many of the perfor-
mance trade offs. The following discussion will enable the
proper selection of external components to achieve optimum
device performance.
BIAS CURRENT CANCELLATION
To cancel the bias current errors of the non-inverting con-
figuration, the parallel combination of the gain setting (R
g
)
and feedback (R
f
) resistors should equal the equivalent
source resistance (R
seq
) as defined in Figure 1. Combining
this constraint with the non-inverting gain equation also seen
in Figure 1, allows both R
f
and R
g
to be determined explicitly
from the following equations:
R
f
=A
V
R
seq
and R
g
=R
f
/A
V
-1)
When driven from a 0Ωsource, such as the output of an op
amp, the non-inverting input of the LMH6624 should be
isolated with at least a 25Ωseries resistor.
As seen in Figure 2, bias current cancellation is accom-
plished for the inverting configuration by placing a resistor
(R
b
) on the non-inverting input equal in value to the resis-
tance seen by the inverting input (R
f
||(R
g
+R
s
)). R
b
should to
be no less than 25Ωfor optimum LMH6624 performance. A
shunt capacitor can minimize the additional noise of R
b
.
TOTAL INPUT NOISE VS. SOURCE RESISTANCE
To determine maximum signal-to-noise ratios from the
LMH6624, an understanding of the interaction between the
amplifier’s intrinsic noise sources and the noise arising from
its external resistors is necessary.
Figure 3 describes the noise model for the non-inverting
amplifier configuration showing all noise sources. In addition
to the intrinsic input voltage noise (e
n
) and current noise
(i
n
=i
n+
=i
n−
) source, there is also thermal voltage noise
(e
t
=√(4KTR)) associated with each of the external resistors.
Equation 1 provides the general form for total equivalent
input voltage noise density (e
ni
). Equation 2 is a simplifica-
tion of Equation 1 that assumes
(1)
20058918
FIGURE 1. Non-Inverting Amplifier Configuration
20058919
FIGURE 2. Inverting Amplifier Configuration
20058920
FIGURE 3. Non-Inverting Amplifier Noise Model
LMH6624
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Application Section (Continued)
R
f
||R
g
=R
seq
for bias current cancellation. Figure 4 illus-
trates the equivalent noise model using this assumption.
Figure 5 is a plot of e
ni
against equivalent source resistance
(R
seq
) with all of the contributing voltage noise source of
Equation 2. This plot gives the expected e
ni
for a given (R
seq
)
which assumes R
f
||R
g
=R
seq
for bias current cancellation.
The total equivalent output voltage noise (e
no
)ise
ni
*A
V
.
(2)
As seen in Figure 5,e
ni
is dominated by the intrinsic voltage
noise (e
n
) of the amplifier for equivalent source resistances
below 33.5Ω. Between 33.5Ωand 6.43kΩ,e
ni
is dominated
by the thermal noise (e
t
=√(4kT(2R
seq
)) of the external
resistor. Above 6.43kΩ,e
ni
is dominated by the amplifier’s
current noise (i
n
=√(2) i
n
R
seq
). The point at which the
LMH6624’s voltage noise and current noise contribute
equally occurs for R
seq
= 464Ω(ie., e
n
/√(2)i
n
). For example,
configured with a gain of +20V/V giving a −3dB of 90MHz
and driven from R
seq
=25Ω, the LMH6624 produces a total
equivalent input noise voltage (e
ni
x 1.57*90MHz) of
16.5µV
rms
.
If bias current cancellation is not a requirement, then R
f
||R
g
need not equal R
seq
. In this case, according to Equation 1,
R
f
||R
g
should be as low as possible to minimize noise.
Results similar to Equation 1 are obtained for the inverting
configuration of Figure 2 if R
seq
is replaced by R
b
and R
g
is
replaced by R
g
+R
s
. With these substitutions, Equation 1 will
yield an e
ni
referred to the non-inverting input. Referring e
ni
to the inverting input is easily accomplished by multiplying
e
ni
by the ratio of non-inverting to inverting gains.
NOISE FIGURE
Noise Figure (NF) is a measure of the noise degradation
caused by an amplifier.
(3)
The Noise Figure formula is shown in Equation 3. The addi-
tion of a terminating resistor R
T
, reduces the external ther-
mal noise but increases the resulting NF. The NF is in-
creased because R
T
reduces the input signal amplitude thus
reducing the input SNR.
(4)
The noise figure is related to the equivalent source resis-
tance (R
seq
) and the parallel combination of R
f
and R
g
.To
minimize noise figure.
•Minimize R
f
||R
g
•Choose the Optimum R
S
(R
OPT
)
R
OPT
is the point at which the NF curve reaches a minimum
and is approximated by:
R
OPT
≈e
n
/i
n
NON-INVERTING GAINS LESS THAN 10V/V
Using the LMH6624 at lower non-inverting gains requires
external compensation such as the shunt compensation as
shown in Figure 6. The compensation capacitors are chosen
to reduce frequency response peaking to less than 1dB.
INVERTING GAINS LESS THAN 10V/V
The lag compensation of Figure 7 will achieve stability for
lower gains. Placing the network between the two input
terminals does not affect the closed-loop nor noise gain, but
is best used for the inverting configuration because of its
affect on the non-inverting input impedance.
20058921
FIGURE 4. Noise Model with R
f
||R
g
=R
seq
20058922
FIGURE 5. Voltage Noise Density vs. Source
Resistance
20058924
FIGURE 6. External Shunt Compensation
LMH6624
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Application Section (Continued)
SINGLE SUPPLY OPERATION
The LMH6624 can be operated with single power supply as
shown in Figure 8. Both the input and output are capacitively
coupled to set the DC operating point.
LOW NOISE TRANSIMPEDANCE AMPLIFIER
Figure 9 implements a low-noise transimpedance amplifier
commonly used with photo-diodes. The transimpedance
gain is set by R
f
. Equation 4 provides the total input current
noise density (i
ni
) equation for the basic transimpedance
configuration and is plotted against feedback resistance (R
f
)
showing all contributing noise sources in Figure 10. This plot
indicates the expected total equivalent input current noise
density (i
ni
) for a given feedback resistance (R
f
). The total
equivalent output voltage noise density (e
no
)isi
ni
*R
f
.
(5)
LOW NOISE INTEGRATOR
The LMH6624 implements a deBoo integrator shown in
Figure 11. Positive feedback maintains integration linearity.
The LMH6624’s low input offset voltage and matched inputs
allow bias current cancellation and provide for very precise
integration. Constraint on the circuit element maintains sta-
bility.
20058925
FIGURE 7. External Lag Compensation
20058926
FIGURE 8. Single Supply Operation
20058927
FIGURE 9. Transimpedance Amplifier Configuration
20058928
FIGURE 10. Current Noise Density vs. Feedback
Resistance
LMH6624
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Application Section (Continued)
HIGH-GAIN SALLEN-KEY ACTIVE FILTERS
The LMH6624 is well suited for high gain Sallen-Key type of
active filters. Figure 12 shows the 2
nd
order Sallen-Key low
pass filter topology. Using component predistortion methods
discussed in OA-21 enables the proper selection of compo-
nents for these high-frequency filters.
LOW NOISE MEGNETIC MEDIA EQUALIZER
The LMH6624 implements a high-performance low noise
equalizer for such application as magnetic tape channels as
shown in Figure 13. The circuit combines an integrator with
a bandpass filter to produce the low noise equalization. The
circuit’s simulated frequency response is illustrated in Figure
14.
LAYOUT CONSIDERATION
National Semiconductor suggests the copper patterns on the
evaluation boards listed below as a guide for high frequency
layout. These boards are also useful as an aid in device
testing and characterization. As is the case with all high-
speed amplifiers, accepted-practice RF design technique on
the PCB layout is mandatory. Generally, a good high fre-
quency layout exhibits a separation of power supply and
ground traces from the inverting input and output pins. Para-
sitic capacitances between these nodes and ground will
cause frequency response peaking and possible circuit os-
cillations (see Application Note OA-15 for more information).
Use high quality chip capacitors with values in the range of
1000pF to 0.1F for power supply bypassing. One terminal of
each chip capacitor is connected to the ground plane and the
other terminal is connected to a point that is as close as
possible to each supply pin as allowed by the manufacturer’s
design rules. In addition, connect a tantalum capacitor with a
value between 4.7µf and 10µF in parallel with the chip ca-
pacitor. Signal lines connecting the feedback and gain resis-
tors should be as short as possible to minimize inductance
and microstrip line effect. Place input and output termination
resistors as close as possible to the input/output pins. Traces
greater than 1 inch in length should be impedance matched
to the corresponding load termination.
20058929
FIGURE 11. Low Noise Integrator
20058930
FIGURE 12. Sallen-Key Active Filter Topology
20058931
FIGURE 13. Noise Magnetic Media Equalizer
20058932
FIGURE 14. Equalizer Frequency Response
LMH6624
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Application Section (Continued)
Symmetry between the positive and negative paths in the
layout of differential circuitry should be maintained to mini-
mize the imbalance of amplitude and phase of the differential
signal.
These free evaluation boards are shipped when a device
sample request is placed with National Semiconductor.
Component value selection is another important parameter
in working with high speed/high performance amplifiers.
Choosing external resistors that are large in value compared
to the value of other critical components will affect the closed
loop behavior of the stage because of the interaction of
these resistors with parasitic capacitances. These parasitic
capacitors could either be inherent to the device or be a
by-product of the board layout and component placement.
Moreover, a large resistor will also add more thermal noise to
the signal path. Either way, keeping the resistor values low
will diminish this interaction. On the other hand, choosing
very low value resistors could load down nodes and will
contribute to higher overall power dissipation and high dis-
tortion.
Device Package Evaluation Board Part
Number
LMH6624MF SOT23–5 CLC730216
LMH6624MA SOIC-8 CLC730227
LMH6624
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Physical Dimensions inches (millimeters) unless otherwise noted
5-Pin SOT23
NS Package Number MF05A
8-Pin SOIC
NS Package Number M08A
LMH6624
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Notes
LIFE SUPPORT POLICY
NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL
COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant
into the body, or (b) support or sustain life, and
whose failure to perform when properly used in
accordance with instructions for use provided in the
labeling, can be reasonably expected to result in a
significant injury to the user.
2. A critical component is any component of a life
support device or system whose failure to perform
can be reasonably expected to cause the failure of
the life support device or system, or to affect its
safety or effectiveness.
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LMH6624 Ultra Low Noise Wideband Operational Amplifier
National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.