National Semiconductor LMX2531LQ1910E User manual

LMX2531LQ1910E
Evaluation Board Operating Instructions
National Semiconductor Corporation
Wireless Communications, RF Products Group
2900 Semiconductor Dr.
Santa Clara, CA, 95052-8090
LMX2531LQ1910EFPEB Rev 1.20.2006

LMX2531LQ1910E EVALUATION BOARD OPERATING INSTRUCTIONS
TABLE OF CONTENTS
GENERAL DESCRIPTION .................................................................................................................. 3
LOOP FILTER .................................................................................................................................. 3
PHASE NOISE ................................................................................................................................. 4
PHASE NOISE WITH NARROW LOOP FILTER (INTERNAL DIVIDE BY 2DISABLED) .................................. 5
PHASE NOISE WITH NARROW LOOP FILTER (INTERNAL DIVIDE BY 2ENABLED) ................................... 6
SPURS (INTERNAL DIVIDE BY 2DISABLED)........................................................................................ 7
SPURS (INTERNAL DIVIDE BY 2ENABLED) ........................................................................................ 8
CODELOADER SETTINGS ................................................................................................................. 9
SCHEMATIC .................................................................................................................................. 11
BILL OF MATERIALS ....................................................................................................................... 12
TOP LAYER ................................................................................................................................... 13
MID LAYER 1"GROUND PLANE" ..................................................................................................... 14
MID LAYER 2"POWER".................................................................................................................. 15
BOTTOM LAYER "SIGNAL" .............................................................................................................. 16
TOP BUILD DIAGRAM ..................................................................................................................... 17
2

LMX2531LQ1910E EVALUATION BOARD OPERATING INSTRUCTIONS
General Description
The LMX2531LQ1910E Evaluation Board simplifies evaluation of the LMX2531LQ1910E PLL/VCO
synthesizer system. The board enables all performance measurements with no additional support
circuitry. The evaluation board consists of a LMX2531LQ1910E device, and a cable assembly.
The cable assembly is bundled with the evaluation board for connecting to a PC through the parallel
printer port. By means of MICROWIRETM serial port emulation, the CodeLoader software included can
be run on a PC to facilitate the LMX2531LQ1910E internal register programming for the evaluation and
measurement. In addition to this cable assembly, there is a microwire buffer board that ensures that
the proper voltage levels are provided to the microwire inputs and also this reduces digital noise from
computers through the parallel port.
Loop Filter
Phase Margin 34.4 deg Kφ90 uA
Loop Bandwidth 6.8 kHz Fcomp 2.5 MHz
Crystal Frequency 10 MHz Output Frequency 1834 – 2028 MHz (DIV2=0)
917 – 1014 MHz (DIV2=1)
Supply Voltage 3.0 Volts VCO Gain 11 MHz/Volt
VCO
CPout
47 pF
2.7 nF
47 KΩ
100 pF 100 pF
40 KΩ40 KΩ
Vtune
3

LMX2531LQ1910E EVALUATION BOARD OPERATING INSTRUCTIONS
Phase Noise
Output Frequency = 1931 MHz
Internal Divide by 2 Disabled (DIV2=0)
Output Frequency = 965.5 MHz
Internal Divide by 2 Enabled (DIV2=1)
4

LMX2531LQ1910E EVALUATION BOARD OPERATING INSTRUCTIONS
Phase Noise with Narrow Loop Filter (Internal Divide by 2 Disabled)
Fout = 1834 MHz
Fout = 1931 MHz
Fout = 2028 MHz
The plots to the left show the true
phase noise capability of the
VCO. In order to take these plots,
a 20 Hz loop bandwidth was used
with the E5052 spectrum
analyzer. This is the most
accurate and state of the art
equipment.
At lower offsets, the
measurements are more accurate
because the impact of the PLL is
removed. At higher offsets, the
measurements are also more
accurate because the E5052
spectrum analyzer has a much
lower noise floor than the E4445A
spectrum analyzer. Even though
the E4445A has a noise
cancellation feature, it only
cancels out thermal noise and not
cancel out the phase noise if the
LO inside this equipment.
5

LMX2531LQ1910E EVALUATION BOARD OPERATING INSTRUCTIONS
Phase Noise with Narrow Loop Filter (Internal Divide by 2 Enabled)
Fout = 917 MHz
Fout = 965.5 MHz
Fout = 1014 MHz
The plots to the left show the true
phase noise capability of the
VCO. In order to take these plots,
a 20 Hz loop bandwidth was used
with the E5052 spectrum
analyzer. This is the most
accurate and state of the art
equipment.
At lower offsets, the
measurements are more accurate
because the impact of the PLL is
removed. At higher offsets, the
measurements are also more
accurate because the E5052
spectrum analyzer has a much
lower noise floor than the E4445A
spectrum analyzer. Even though
the E4445A has a noise
cancellation feature, it only
cancels out thermal noise and not
cancel out the phase noise if the
LO inside this equipment.
6

LMX2531LQ1910E EVALUATION BOARD OPERATING INSTRUCTIONS
Spurs (Internal Divide by 2 Disabled)
Spur at 200 kHz offset at a worst case
frequency of 1830.2 MHz is -90.2 dBc.
Worst case channels occur at exactly one
channel spacing above or below a multiple
of the crystal frequency (10 MHz).
Spur at 200 kHz offset at a worst case
frequency of 1910.2 MHz is -89.5 dBc.
Spur at 200 kHz offset at a worst case
frequency of 2030.2 MHz is -88.1 dBc.
7

LMX2531LQ1910E EVALUATION BOARD OPERATING INSTRUCTIONS
Spurs (Internal Divide by 2 Enabled)
Spur at 200 kHz offset at a frequency of
915.1 MHz is –95.5 dBc. Since this mode
uses the divide by 2 mode, the channel
spacing here is actually 100 kHz. The spur
at 100 kHz could be eliminated by doubling
the channel spacing before the divider.
The reason that the spur at 200 kHz is
shown is to illustrate theoretical 6 dB
impact of the divider.
Spur at 200 kHz offset for a frequency of
955.1 MHz is -93.0 dBc.
Spur at 200 kHz offset for a frequency of
1015.1 MHz is –93.0 dBc.
8

LMX2531LQ1910E EVALUATION BOARD OPERATING INSTRUCTIONS
CodeLoader Settings
For the CodeLoader program, the default reference oscillator used for these
instructions was 10 MHz, but there is a mode for a 61.44 MHz oscillator as well.
If the bits become scrambled, their original state may be recalled by choosing the
appropriate mode. Note that if the internal divide by 2 is enabled, the VCO
frequency still reflects the VCO frequency before the divide by 2.
9

LMX2531LQ1910E EVALUATION BOARD OPERATING INSTRUCTIONS
CodeLoader is set up to load the registers and initialize the part in the correct
way. R5 (INIT1) and R5 (INIT 2) are just the R5 register being used to properly
initialize the part. So a single CNT+L should load the part.
The port setup tells CodeLoader what information goes where. If this is wrong,
the part will not program. Although LPT1 is usually correct, CodeLoader does
not autodetect the correct port. On some laptops, it may be LPT3.
10