Nintendo 1504166 - Game Boy Advance SP Edition... Owner's manual

April 2, 2001
AGB Programming Manual
Version 1.1
1999 - 2001 Nintendo of America Inc.

AGB Programming Manual
©1999 - 2001 Nintendo of America Inc.
D.C.N. AGB-06-0001-002B4
2
“Confidential”
This document contains confidential and proprietary information
of Nintendo and is also protected under the copyright laws of
the United States and other countries. No part of this document
may be released, distributed, transmitted or reproduced in any
form or by any electronic or mechanical means, including
information storage and retrieval systems, without permission in
writing from Nintendo.
1999 - 2001 Nintendo of America Inc.
TM and are trademarks of Nintendo

AGB Programming Manual Introduction
©1999 - 2001 Nintendo of America Inc. 3D.C.N. AGB-06-0001-002B4
Introduction
CHARACTER/BITMAP BG
MULTIPLAY COMMUNICATION
32768 COLORS
32BIT RISC CPU 16MHz
2.9" WIDE TFT COLOR
PCM STEREO SOUND
COLOR GRAPHIC EFFECTS
COMPATIBLE FOR CGB
Game Boy Advanced (AGB) stresses portability and focuses on 2D rather than 3D image
processing functions, resulting in a cutting-edge portable game device with revolutionary
capabilities.
It provides window-like functions, rotation, scaling, αblending, and fade-in/fade-out
features that can be combined to produce exactly the image representations desired.
Additionally, the bitmap image-rendering function, with its two modes (double buffering
mode for rewriting full-screen images in real time and single buffering mode for stills), can
be used to handle realistic images that are indistinguishable from actual photographs.
The 2.9-inch-wide reflective TFT color LCD screen provides a clear display with little
afterimage.
In addition to Game Boy Color compatible sound, AGB has a PCM stereo sound generator.
Multiple tracks can be played simultaneously by overlapping them using the CPU. L and R
buttons have been added to the Controller. The broader range of control provided also
expands the breadth of game designs possible.
Although AGB uses a 32-bit RISC CPU whose computing performance and data processing
capabilities far surpass those of Game Boy Color, it consumes little power, allowing
approximately 15 hours of continuous play. This is made possible by the inclusion of the various
types of RAM on a single custom chip.
Furthermore, software for AGB can be developed using the C language, minimizing the
cost of development equipment. This favorable development environment and the high
level of freedom of the system configuration allow one to build a profound world of play in
which anyone can become absorbed.
With its extremely high-performance computational and data processing capabilities as a
foundation, AGB provides greater image and sound representation capabilities, making the
pursuit of fun its essential aim.
The purpose of this high level of performance is to bring unique game ideas fully to life.
AGB is an innovation born from experience. While providing backwards compatibility with
the enormous software resources available for the 100 million Game Boy units in use
worldwide, it also breaks new ground for portable game devices.

AGB Programming Manual Revision History
©1999 - 2001 Nintendo of America Inc. 4D.C.N. AGB-06-0001-002B4
Revision History
Version Date Description
0.3.6.2 12/21/1999 -Minor modification. ( Numbering for items: P81,P82,P149),
(Reference to chapter removed)
-Deleted 14.3
0.3.6.3 01/05/2000 -Minor modification.
-Corrected BG Offset Registers diagrams
-Corrected the diagrams of Registers for Setting the Direction
Parameters of BG data.
-Corrected diagram of the Sound 1 Duty Cycle.
-Corrected the name of d05 bit for the DISPCNT Register.
-Added the description of Bit map BG mode.
-Corrected the SIO Timing Chart of Normal Serial Communication.
-Changed the diagrams and descriptions of the Sound Control
Registers.
-Added the formula for calculating the number of OBJs that can
be displayed on 1 line.
0.4.0 01/25/2000
02/09/2000
-Changed specifications.
*Changed CPU internal working RAM memory capacity, and
created CPU external working RAM.
*Changed the bit structures of DMA control registers.
*Deleted Infrared Communication functions.
*Created the interrupt IME register, and changed the bit
structures of IE and IF registers.
*Changed the number of colors that can be displayed to 32,768.
*Changed the specifications of Normal Serial Communication
(Bit width, communication speed)
*Changed the specifications of Multi SIO Communication (UART
system).
*Changed the center coordinate of OBJ Rotation to dot
boundary.
*Added UART system communication function.
-Added the Complete Block Diagram.
0.4.1 02/22/2000
02/24/2000
02/25/2000
-Modified the description of Direct Sounds, and corrected
register
R bit structure.
-Added the PWM sampling cycle control function.
-Changed the method to specify OBJ size.
-Corrected misprints in the communication control register.
0.4.1.1 03/08/2000
03/10/2000
03/10/2000
-Added the description of ROM registration data.
-Improved the description of interrupt and multiple interrupt
process.
-Improved the description of system call and multiple system call
process.
0.4.1.2 04/06/2000 -Added the description of UART system communication.

AGB Programming Manual Revision History
©1999 - 2001 Nintendo of America Inc. 5D.C.N. AGB-06-0001-002B4
Version Date Description
0.4.1.3 05/08/2000
05/16/2000
05/25/2000
-Corrected [Sound 1 Usage Notes].
-In 1) Normal Communication of Communication Functions,
mentioned not to use a cable.
-Added the diagram of Multi Player AGB Game Link cable
connection.
-Changed the diagram in System-Allocated Area in Working RAM,
and deleted “(Tentative)”.
-Revised ROM registration data.
-Corrected the description of internal shift clock of normal SIO
control register.
-Newly added the description of “AGB Game Link cable” in the
chapter of Communication Functions.
-Corrected Overview of Screen Sizes for Text BG Screens in
“Rendering Functions”.
0.4.1.4 05/29/2000 -Added the description for the device type of ROM Registration
Data.
-Corrected “Fault Function”to ”Halt Function.”
-Corrected the diagram of “AGB Game Link cable.”
0.4.1.5 06/01/2000 -Corrected the attributes of timer setting values register from W
to R/W.
-Added one sentence to 1) of 15.2.1. Normal Interrupt and 15.2.2.
Multiple Interrupts respectively.
-Emphasized the prohibition of use of cable for normal SIO
communication.
0.4.1.6 06/26/2000 -Modified the connection diagram of the multi-play cable.
-Added the transition diagram of the multi-play communication
data.
-Modified the description of "16-Bit Multi-play Communication".
0.4.1.7 08/10/2000 -Modified the description of an error flag for the multi=play
control register.
-Modified the description of a valid flag for all the DMA control
registers.
-Added the number of transfer when 0 is set for the DMA word
count register.
0.4.1.8 10/16/2000 -Added cautions to the priority setting of OBJ.
-Added adescription and cautions to Sound 1,2,3, and 4.
-Added the description to "Mapping of character data".
-Revised the description in SIOCNT[d14] and [06] of UART
communication register.
-Revised the connection diagram of 16 bit multi-play
communication.
-Added a description to all sound operation modesof the sound
control register.
-Revised the itemized description of Chapter 10 "Sound".

AGB Programming Manual Revision History
©1999 - 2001 Nintendo of America Inc. 6D.C.N. AGB-06-0001-002B4
Version Date Description
1.0 12/01/2000 -Deleted the checksum of ROM registration data and revised the
diagram.
-Revised the diagram for "AGB Game Link Cable" in the "Communication
Function".
-Revised the number of DMG sold from tens of millions to a hundred
million in the introduction of AGB.
-Revised the hours you can play continuously from "about 20 hours" to
"about 15 hours".
-Revised the illustrations of the AGB hardware and the Multi Player AGB
Game Link cable in the multi play communication diagram.
-Added the description of the timing chart for normal SIO communication.
-Added a caution in the DMA valid flag of all the DMA control registers.
-Added a caution in the master start bit of the multi-play control register.
-Revised the multi-play timing chart.
-Revised the memory map for system reserve area in the work RAM.
-Added a caution to "Communication Function".
-Revised the first sentence in "UART Communication". Added "Relation
between Data register, FIFO and Shift register".
-Revised the expression of [Cautions] to a more specific expression
[Cautions for ~~].
-Added a description of X coordinate and Y coordinate for OAM. Added
the diagram to Y coordinate.
-Revised the description of the pre-fetch buffer flag in the Game Pak
memory wait control register.
-Added cautions to the description of the input/output select flag in the R
register of general communication.
1.01 2/01/2001 -Modified the description of pin 31 in the Game Pak bus.
-Revised the cancel conditions for the Stop function in the power-down
mode.
-Added additional descriptions and cautions for the initialization flag of
Sound 1.
1.02 2/13/2001 -Modified the description of "8-Bit/32-Bit Normal Communication Function"
summary in "Communication" chapter.
-Added a paragraph to "Selecting Communication Function" in
"Communication" chapter.
1.04 3/1/2001 -Specified the method to control the OBJ display individually in
the description of the double size flag and the rotation/scaling
flag for OAM attribute 0.
-Added the description of display synchronization DMA to DMA3.
-Added the description of the DMA problem and how to avoid it at the end
of the chapter on DMA.
*Added the restrictions to the description of the repeat flag in DMA3.
*Updated the timing chart and the cable connection diagram for the multi-
play communication.
*Revised the description of the normal serial communication cautions.

AGB Programming Manual Revision History
©1999 - 2001 Nintendo of America Inc. 7D.C.N. AGB-06-0001-002B4
1.1 4/2/2001 - Changed the picture in the AGB introduction in the
beginning paragraph.
- Added a caution regarding clearing of IME and IE in the
chapter "Interrupt Control".
- Added additional description of an error flag and ID flag
for multi-play communication.
- Added additional description of communication error flag
of multi-play communication control register.
- Modified the host side example in the description of JOY
bus communication from NUS to DOL.
Added DOL to the abbreviation in "Using This Manual".
- Modified the SIO timing chart for normal serial
communication.
- Revised the number of colors from 256 to 32,768 in the
description of Display Synchronization DMA of DMA3.
- Modified the description of general purpose
communication mode.
- Revised the caution for normal serial communication.
- Revised the caution for communication function.
- Revised the summary of normal serial communication in
the communication function chapter, and added additional
description.
- Added additional description in the caution for the
selection of communication function in the
communication function chapter.
- Emphasized that unless general purpose communication
mode, the cancellation condition SIO for System Call Stop
will not work.
- Changed LPU to LCD controller in system calls Halt and
Stop.
- Deleted the first item in Sound 3 Usage Note.
- Changed the names of following registers according to
header files provided by Nintendo.
--Wait Control--
204h WSCNT àà WAITCNT
--Color Special Effects--
050h BLDMOD àà BLDCNT
052h COLEV àà BLDALPHA
054h COLY àà BLDY
--Sound Related--
080h~SGCNT0_(L H) àà SOUNDCNT_(L H) **Combined multiple names
084h SGCNT1 àà SOUNDCNT_X
088h SG_BIAS àà SOUNDBIAS
060h~ SG10_(L H) àà SOUND1CNT_(L H) **
064h SG11 àà SOUND1CNT_X
068h SG20 àà SOUND2CNT_L
06Ch SG21 àà SOUND2CNT_H

AGB Programming Manual Revision History
©1999 - 2001 Nintendo of America Inc. 8D.C.N. AGB-06-0001-002B4
074h SG31 àà SOUND3CNT_X
078h SG40 àà SOUND4CNT_L
07Ch SG41 àà SOUND4CNT_H
090h~ SGWR(0-3)_L àà WAVE_RAM(0-3)_L **
092h~ SGWR(0-3)_H àà WAVE_RAM(0-3)_H**
0A0h~ SG_FIFOA_(L H) àà FIFO_A_(L H) **
0A4h~ SG_FIFOB_(L H) àà FIFO_B_(L H) **
--DMARelated--
0B0h~ DM(0-3)SAD_L àà DMA(0-3)SAD_L **
0B2h~ DM(0-3)SAD_H àà DMA(0-3)SAD_H**
0B4h~ DM(0-3)DAD_L àà DMA(0-3)DAD_L **
0B6h~ DM(0-3)DAD_H àà DMA(0-3)DAD_H **
0B8h~ DM(0-3)CNT_L àà DMA(0-3)CNT_L **
0Bah~ DM(0-3)CNT_H àà DMA(0-3)CNT_H **
--Timer Related--
100h~ TM(0-3)D àà TM(0-3)CNT_L **
102h~ TM(0-3)CNT àà TM(0-3)CNT_H **
--Communication Related--
134h R àà RCNT
128h SCCNT_L àà SIOCNT
12Ah SCCNT_H àà SIODATA8 (Normal serial, UART communication)
SIOMLT_SEND (Multi-play communication)
120h SCD0 àà SIODATA32_L (Normal serial communication)
SIOMULTI0 (Multi-play communication)
122h SCD1 àà SIODATA32_H(Normal serial communication)
SIOMULTI1 (Multi-play communication)
124h~ SCD(2 3) àà SIOMULTI(2 3) **
140h HS_CTRL àà JOYCNT
158h JSTAT àà JOYSTAT
150h~ JOYRE_(L H) àà JOY_RECV_(L H) **
154h~ JOYTR_(L H) àà JOYTRANS_(L H) **
--Key Related--
130h P1 àà KEYINPUT
132h P1CNT àà KEYCNT

AGB Programming Manual Table of Contents
©1999 - 2001 Nintendo of America Inc. 9D.C.N. AGB-06-0001-002B4
Table of Contents
1 AGB SYSTEM .....................................................................................13
1.1 SYSTEM OVERVIEW.....................................................................................................13
2 SYSTEM CONFIGURATION..............................................................15
2.1 CPU BLOCK DIAGRAM...............................................................................................15
2.2 COMPLETE BLOCK DIAGRAM .....................................................................................16
2.3 MEMORY CONFIGURATION AND ACCESS WIDTH .......................................................17
2.4 LITTLE-ENDIAN............................................................................................................17
3 AGB MEMORY....................................................................................18
3.1 OVERALL MEMORY MAP .............................................................................................18
3.2 MEMORY CONFIGURATION..........................................................................................19
3.2.1 AGB Internal Memory .................................................................................................19
3.2.2 Game Pak Memory ....................................................................................................20
3.3 GAME PAK MEMORY WAIT CONTROL........................................................................21
3.3.1 Access Timing...........................................................................................................23
3.3.2 Game Pak Bus ..........................................................................................................24
4 LCD.......................................................................................................25
4.1 LCD STATUS...............................................................................................................26
4.1.1 V Counter..................................................................................................................26
4.1.2 General LCD Status ...................................................................................................27
5IMAGE SYSTEM...............................................................................29
5.1 BG MODES ..................................................................................................................31
5.1.1 Details of BG Modes ..................................................................................................31
5.1.2 VRAM Memory Map...................................................................................................32
6RENDERING FUNCTIONS...............................................................33
6.1 CHARACTER MODE BG (BG MODES 0-2)..................................................................33
6.1.1 BG Control ................................................................................................................33
6.1.2 Mosaic Size..............................................................................................................39
6.1.3 VRAM Address Mapping of BG Data............................................................................40
6.1.4 Character Data Format ..............................................................................................42
6.1.5 BG Screen Data Format .............................................................................................43
6.1.6 BG Screen Data Address Mapping for the LCD Screen..................................................45
6.1.7 BG Rotation and Scaling Features...............................................................................49
6.1.8 BG Scrolling..............................................................................................................52

AGB Programming Manual Table of Contents
©1999 - 2001 Nintendo of America Inc. 10 D.C.N. AGB-06-0001-002B4
6.2 BITMAP MODE BGS (BG MODES 3-5).......................................................................53
6.2.1 BG Control ................................................................................................................53
6.2.2 BG Rotation/Scaling...................................................................................................54
6.2.3 Pixel Data.................................................................................................................54
6.2.4 Pixel Data Address Mapping for the LCD Screen...........................................................55
6.3 OBJ (OBJECT).............................................................................................................58
6.3.1 OBJ Function Overview.............................................................................................58
6.3.2 Character Data Mapping .............................................................................................60
6.3.3 OAM.........................................................................................................................62
6.3.4 OBJ Rotation/Scaling Feature .....................................................................................70
6.4 DISPLAY PRIORITY OF OBJ AND BG.........................................................................72
7. COLOR PALETTES...........................................................................73
7.1 COLOR PALETTE OVERVIEW ......................................................................................73
7.2 COLOR PALETTE RAM...............................................................................................74
7.3 COLOR DATA FORMAT................................................................................................76
8 WINDOW FEATURE............................................................................77
8.1 WINDOW POSITION SETTING......................................................................................77
8.2 WINDOW CONTROL.....................................................................................................78
9COLOR SPECIAL EFFECTS..........................................................80
9.1 SELECTION OF COLOR SPECIAL EFFECTS ................................................................80
9.2 COLOR SPECIAL EFFECTS PROCESSING...................................................................82
10 SOUND ...............................................................................................84
10.1 SOUND BLOCK DIAGRAM .........................................................................................84
10.2 DIRECT SOUNDS A AND B........................................................................................85
10.3 SOUND 1....................................................................................................................87
10.4 SOUND 2....................................................................................................................91
10.5 SOUND 3....................................................................................................................93
10.6 SOUND 4....................................................................................................................97
10.7 SOUND CONTROL....................................................................................................100
10.8 SOUND PWM CONTROL.........................................................................................104
11 TIMER...............................................................................................106

AGB Programming Manual Table of Contents
©1999 - 2001 Nintendo of America Inc. 11 D.C.N. AGB-06-0001-002B4
12 DMA TRANSFER............................................................................108
12.1 DMA 0.....................................................................................................................109
12.2 DMA 1 AND 2..........................................................................................................113
12.3 DMA 3....................................................................................................................117
12.4 DMA 4....................................................................................................................122
13 COMMUNICATION FUNCTIONS ..................................................125
13.1 8-BIT/32-BIT NORMAL SERIAL COMMUNICATION ................................................128
13.2 16-BIT MULTI-PLAYER COMMUNICATION ..............................................................134
13.3 UART COMMUNICATION FUNCTIONS ....................................................................142
13.4 GENERAL PURPOSE COMMUNICATION...................................................................148
13.5 JOY BUS COMMUNICATION ...................................................................................150
13.6 AGB GAME LINK CABLE.........................................................................................154
14 KEY INPUT ......................................................................................155
14.1 KEY STATUS............................................................................................................155
14.2 KEY INTERRUPT CONTROL......................................................................................155
14.2.1 Interrupt Conditions...................................................................................................156
15 INTERRUPT CONTROL.................................................................157
15.1 SYSTEM-ALLOCATED AREA IN WORK RAM..........................................................159
15.2 INTERRUPT OPERATION...........................................................................................160
15.2.1 Normal Interrupt........................................................................................................160
15.2.2 Multiple Interrupts.....................................................................................................161
16 POWER-DOWN FUNCTIONS ........................................................163
16.1 STOP FUNCTION......................................................................................................163
16.2 HALT FUNCTION......................................................................................................164
17 AGB SYSTEM CALLS...................................................................165
17.1 SYSTEM CALL OPERATION.....................................................................................165
17.1.1 Normal Calls............................................................................................................165
17.1.2 Multiple Calls...........................................................................................................167
18 ROM REGISTRATION DATA........................................................170

AGB Programming Manual Using This Manual
©1999 - 2001 Nintendo of America Inc. 12 D.C.N. AGB-06-0001-002B4
Using This Manual
Important terms and symbols used in this manual are defined below.
1. Terms
The term “user” in this manual refers to the software developer, not to the general consumer.
Bit lengths in this manual are expressed as follows.
Bit Length Term Used
8 bits byte
16 bits half-word
32 bits word
2. Symbols
The attributes of bits used in bit operations are represented as follows.
3. Abbreviations
Nintendo's game hardware is abbreviated as follows:
ØDMG (Game Boy)
ØCGB (Game Boy Color)
ØAGB (Game Boy Advance)
ØDOL(Nintendo GameCube)
Read/write bit
A readable and writable bit. Read-only bit
A bit that is readable but not
writable.
Write-only bit
A bit that is not readable but
is writable.
Fixed-value bit
Must be set to a
specified fixed value.
1
Unrestricted bit
Can be set to either 0 or 1. Not used
*

AGB Programming Manual AGB System
©1999 - 2001 Nintendo of America Inc. 13 D.C.N. AGB-06-0001-002B4
1 AGB System
1.1 System Overview
AGB is a portable game device that maintains downward compatibility with Game Boy
Color (CGB) and provides higher performance.
AGB’s 2.9-inch-wide reflective TFT color LCD and 32-bit RISC CPU enable production
of games that match or surpass the Super Nintendo Entertainment System (Super
NES) in performance.
AGB CPU
32-bit RISC CPU (ARM7TDMI)/16.78 MHz
Downward Compatibility with CGB
Integral 8-bit CISC CPU for compatibility
(However, it cannot operate at the same time as the AGB CPU.)
Memory
System ROM 16 Kbytes (and 2 Kbytes for CGB System ROM)
Working RAM 32 Kbytes + CPU External 256 Kbytes (2 wait)
VRAM 96 Kbytes
OAM 64 bits x 128
Palette RAM 16 bits x 512 (256 colors for OBJ ;
256 colors for BG)
Game Pak
memory Up to 32 MB: mask ROM or flash memory (&EEPROM)
+
Up to 512 Kbits: SRAM or flash memory
Display
240 x 160 x RGB dots
32,768 colors simultaneously displayable
Special effects features (rotation/scaling, αblending, fade-in/fade-out, and mosaic)
4 image system modes
Operation
Operating keys (A, B, L, R, START, SELECT, and Control Pad)
Sound
4 sounds (corresponding to CGB sounds) + 2 CPU direct sounds (PCM format)
Communication
Serial communication (8 bit/32 bit, UART, Multi-player, General-purpose, JOY Bus)

AGB Programming Manual AGB System
©1999 - 2001 Nintendo of America Inc. 14 D.C.N. AGB-06-0001-002B4
Game Pak
Like DMG and CGB, AGB is equipped with a 32-pin connector for Game Pak
connection. When a Game Pak is inserted, AGB automatically detects its type and
switches to either CGB or AGB mode.
The following Game Paks operate on the AGB system.
1. DMG Game Paks, DMG/CGB dual mode Game Paks, and CGB dedicated Game
Paks
2. AGB dedicated Game Paks(Game Paks that only function with AGB)

AGB Programming Manual System Configuration
©1999 - 2001 Nintendo of America Inc. 15 D.C.N. AGB-06-0001-002B4
2 System Configuration
2.1 CPU Block Diagram
ARM7TDMI
CPU
(16.78MHz)
Game Pak I/F
(Prefetch Buffer)
INT
Control
WRAM
(32KByte)
DMAC
(4ch)
Timer
(4ch)
SIO
SOUND(CGB
compatible + PWM)
VRAM_A
(64KByte)
VRAM_B
(16KByte) VRAM_C (16KByte)
Special Color Processing Circuit
Bitmap
Mode
RGB(5:5:5)
32
32
32
32
32
32
32
32
32
32
16
16 16
16 16
16
16
16
16
16
16
R:16/32
W:16/32
R:8/16/32
* "R:8/16/32" and "W:8/16/32" mean that you can
access an area of 8bits/16bits/32bits when reading
and writing, respectively.
ROM
(16KByte)
Palette RAM
(16bit x 512)
Priority Evaluation Circuit
OBJ Processing Circuit
OAM
(64bit x 128)
BG Processing Circuit
R:8/16/32
W:8/16/32
32
32
R:8/16/32
W:8/16/32
R:8/16/32
W:8/16/32
R:8/16/32
W:8/16/32
R:8/16/32
W:8/16/32
R:8/16/32
W:8/16/32
R:16/32
W:16/32
KEY
Control
R:16/32
W:16/32
32 16
Game Pak
CPU
R:16/32
W:16/32
LCD Unit
EXT. WRAM
(256KByte) 16(2 Wait)
R:8/16/32
W:8/16/32
16
16

AGB Programming Manual System Configuration
©1999 - 2001 Nintendo of America Inc. 16 D.C.N. AGB-06-0001-002B4
2.2 Complete Block Diagram
General Purpose Bus
Memory Space
32KByte Max.
Power 5V
DMG/CGB Game Pak
RGB
Regulator IC
General Purpose
Bus Memory Space
64KByte Max.
AD Bus Memory
Space
32MByte Max.
Power 3.3V
AGB Game Pak(AGB Only)
CPU External WRAM
256KByte
16bit Bus
Controller
Game Pak Shape
Detection Switch
Sound
Amp
Sound
Volume
Speaker
Headphone
Jack
6Pin-EXP
SIO
Communi-
cation
Infrared
Communi
-cation
Adaptor,
etc.
CPU
2wait
8/32bit SIO
General Purpose
Port
Multi-SIO
UART
JOY
AGB Unit
LCD Module
4.194MHz
(System 16.78MHz)
A
B
SELECT START
R
L
5V(DMG/CGB)3.3V(AGB)
Switch Between AD Bus/
General Purpose Bus
Game Pak Power
3.3V(AGB)/5V(DMG/CGB)
Gane Pak
External
Unit
3.3V/5V
Voltage
Detection
Circuit
AA Alkaline Battery
AA Alkaline Battery
Power Switch
DC-DC Converter
and Regulator
13.6V5V3.3V2.5V-15V
VRAM
98KByte
16bit Bus
CPU Internal WRAM
32KByte
32bit Bus
AGB 32bit
CPU Core
ARM7TDMI
CGB 8bit
CPU Core
AGB System ROM
16KByte
32bit Bus
Peripheral Circuit
(SOUND, DMA, TIMER, I/O, etc)
Prefetch Buffer
16bit x 8
LCD Controller
CGB System ROM
2KB
2.9"Reflective TFT Color LCD
240x 160x RGB Dot
32,768 Colors Displayable
LCD DriverLCD Driver LCD Driver
LCD Driver

AGB Programming Manual System Configuration
©1999 - 2001 Nintendo of America Inc. 17 D.C.N. AGB-06-0001-002B4
2.3 Memory Configuration and Access Width
DMA CPU
Memory Type Bus
Width Read
Width Write Width Read Width Write Width
OAM 32 16/32 16/32 16/32 16/32
Palette RAM 16 16/32 16/32 16/32 16/32
VRAM 16 16/32 16/32 16/32 16/32
CPU Internal Working RAM 32 16/32 16/32 8/16/32 8/16/32
CPU External Working RAM 16 16/32 16/32 8/16/32 8/16/32
Internal registers 32 16/32 16/32 8/16/32 8/16/32
Game Pak ROM
(Mask ROM, Flash Memory) 16 16/32 16/32 8/16/32 16/32
Game Pak RAM
(SRAM, Flash Memory) 8-- -- 8 8
Good execution efficiency is obtained when programs that operate from the Game Pak
use 16-bit instructions (16-bit compiler), and those that operate from CPU Internal
Working RAM use 32-bit instructions (32-bit compiler).
2.4 Little-Endian
In the AGB CPU, memory addresses are allocated in 8-bit increments, and little-
endian format is used in implementing the 8-, 16-, and 32-bit access widths.
A
B
C
D
0000h
0001h
0002h
0003h
Memory Register
ABCD
d31 d24 d23 d16 d15 d08 d07 d00

AGB Programming Manual AGB Memory
©1999 - 2001 Nintendo of America Inc. 18 D.C.N. AGB-06-0001-002B4
3 AGB Memory
3.1 Overall Memory Map
The following is the overall memory map of the AGB system.
System ROM
(16 Kbytes)
OAM
(1 Kbyte)
VRAM
(96 Kbytes)
Palette RAM
(1 Kbyte)
CPU Internal Working RAM
(32 Kbytes)
Game Pak RAM
(0- 512 Kbits)
Game Pak ROM
Wait State 2
(32 MB)
Game Pak ROM
Wait State 1
(32 MB)
Game Pak ROM
Wait State 0
(32 MB)
Game Pak Memory
AGB Internal
Memory
Images
0E000000h
0C000000h
0A000000h
08000000h
07000000h
06000000h
05000000h
04000000h
02000000h
00000000h
Flash Memory
(1 Mbit)
Mask ROM
(255 Mbits)
Flash Memory
(1 Mbit)
Mask ROM
(255 Mbits)
Flash Memory
(1 Mbit)
Mask ROM
(255 Mbits)
00003FFFh
0203FFFFh
050003FFh
06017FFFh
070003FFh
0FFFFFFFh
0E00FFFFh
09FFFFFFh
0BFFFFFFh
0DFFFFFFh
CPU External Working RAM
(256 Kbytes)
03000000h
03007FFFh
ROM
RAM
Image Area
Unused Area
I/O, Registers

AGB Programming Manual AGB Memory
©1999 - 2001 Nintendo of America Inc. 19 D.C.N. AGB-06-0001-002B4
3.2 Memory Configuration
In broad terms, the area 00000000h-07FFFFFFh is allocated as AGB internal memory,
and 08000000-0EFFFFFFh is allocated as Game Pak memory.
3.2.1 AGB Internal Memory
1) System ROM
The 16 KBytes from 000000000h is the system ROM.
Various types of System Calls can be used.
2) CPU External Working RAM
The 256 Kbytes from 02000000h is CPU External Working RAM. Its
specifications are 2 Wait 16 bit Bus.
3) CPU Internal Working RAM
The 32 Kbytes from 03000000h is CPU Internal Working RAM. It is used to
store programs and data.
4) I/O and Registers
This area is used for various registers.
5) Palette RAM
The 1 Kbyte from 05000000h is palette RAM. It is used to assign palette
colors.
6) VRAM
The 96 Kbytes from 06000000h is the VRAM area. This area is for BG and
OBJ data.
7) OAM
The 1 Kbyte from 07000000h is Object Attribute Memory (OAM). It holds
the objects to be displayed and their attributes.

AGB Programming Manual AGB Memory
©1999 - 2001 Nintendo of America Inc. 20 D.C.N. AGB-06-0001-002B4
3.2.2 Game Pak Memory
1) Game Pak ROM
Three 32 MB Game Pak ROM spaces are allocated to the area beginning
from 08000000h.
The access speed of each of these spaces can be set individually. Thus,
they are named Wait State 0, Wait State 1, and Wait State 2.
This specification enables memory of varying access speeds in Game Pak
ROM to be accessed optimally.
The base addresses of the 3 spaces are 08000000h for Wait State 0,
0A000000h for Wait State 1, and 0C000000h for Wait State 2.
In addition, the upper 1 Mbit of each space is allocated as flash memory.
This area is used primarily for saving data.
2) Game Pak RAM
The area beginning from 0E000000h is the Game Pak RAM area. Up to
512 Kbits of SRAM or Flash Memory can be stored here. However, it is an
8 bit data bus. Due to the specifications, any Game Pak device other than
ROM must be accessed using Nintendo's library.