PCI GRL-PCIE5-CEM-RXA User manual

Granite River Labs
GRL-PCIE5-CEM-RXA PCI Express Card Electromechanical (CEM)
5.0 (32 GT/s)
Receiver Compliance Test Automation Solution User Guide and
MOI
Using GRL-PCIE5-CEM-RXA Automation Test Software,
Anritsu MP1900A BERT,
and
High Performance Oscilloscope
Published on 29 June 2022

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DISCLAIMER
This document is provided “as is” with no warranties whatsoever, including any warranty of
merchantability, no infringement, fitness for any particular purpose, or any warranty otherwise
arising out of any proposal, specification, or sample. The GRL disclaims all liability for
infringement of proprietary rights, relating to use of information in this specification. No license,
express or implied, by estoppel or otherwise, to any intellectual property rights is granted herein.
All product names are trademarks, registered trademarks, or service marks of their respective
owners.
Copyright © 2022 Granite River Labs. All rights reserved.

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TABLE OF CONTENTS
1INTRODUCTION 11
2RESOURCE REQUIREMENTS 12
2.1 EQUIPMENT REQUIREMENTS .................................................................................................. 12
2.2 SOFTWARE REQUIREMENTS.................................................................................................... 14
3SETTING UP GRL-PCIE5-CEM-RXA AUTOMATION SOFTWARE 15
3.1 DOWNLOAD GRL-PCIE5-CEM-RXA SOFTWARE....................................................................... 15
3.2 LAUNCH AND SET UP SOFTWARE ............................................................................................ 15
3.3 PRE-CONFIGURE SOFTWARE BEFORE CALIBRATION/TESTING ...................................................... 18
3.3.1 Enter Test Session Information ............................................................................... 18
4CALIBRATING USING GRL-PCIE5-CEM-RXA SOFTWARE 19
4.1 SET UP AUTOMATED RX CALIBRATION FOR TP3 ........................................................................ 20
4.1.1 TP3 Calibration Setup with Tektronix ATI Based Oscilloscope.............................. 20
4.2 SET UP AUTOMATED RX CALIBRATION FOR TP2 ........................................................................ 22
4.2.1 Connect Equipment for System Board Calibration ................................................ 22
4.2.2 Connect Equipment for Add-In Card Calibration.................................................... 24
4.3 SET MEASUREMENT CONDITIONS............................................................................................ 25
4.4 SET UP CALIBRATION REQUIREMENTS ..................................................................................... 26
4.4.1 Setup Tab ................................................................................................................. 26
4.5 SELECT PCIE CEM 5.0 RX CALIBRATION.................................................................................. 27
4.5.1 Select to Perform TP3 Calibration........................................................................... 27
4.5.2 Select to Perform Long Channel TP2 Calibration................................................... 27
4.6 CONFIGURE CALIBRATION PARAMETERS ................................................................................... 28
4.7 CONFIGURE CALIBRATION TARGET VALUES ............................................................................... 31
4.8 RUN AUTOMATION CALIBRATION............................................................................................. 32
5TESTING USING GRL-PCIE5-CEM-RXA SOFTWARE 34
5.1 OVERVIEW OF DUT TX PRESET TEST ....................................................................................... 34
5.1.1 Add-In Card Tx Preset Test at 32.0 GT/s .................................................................. 34
5.2 OVERVIEW OF DUT INITIAL TX EQUALIZATION TEST ................................................................... 35
5.2.1 Add-In Card Initial Tx Equalization Test at 32.0 GT/s ............................................. 35
5.3 OVERVIEW OF DUT TX LINK EQUALIZATION RESPONSE TEST....................................................... 35
5.3.1 System Board Tx Link Equalization Response Test at 32.0 GT/s............................ 36

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5.3.2 Add-In Card Tx Link Equalization Response Test at 32.0 GT/s............................... 36
5.4 OVERVIEW OF DUT RX LINK EQUALIZATION TEST ...................................................................... 37
5.4.1 System Board Rx Link Equalization Test at 32.0 GT/s ............................................ 37
5.4.2 Add-In Card Rx Link Equalization Test at 32.0 GT/s................................................ 38
5.4.3 Link Training............................................................................................................. 38
5.5 SET UP AUTOMATED DUT TXRX LINK EQUALIZATION TEST......................................................... 40
5.5.1 Connect Equipment for System Board TxRx Link EQ Testing ................................ 40
5.5.2 Connect Equipment for Add-In Card TxRx Link EQ Testing.................................... 41
5.6 SET UP AUTOMATED DUT RX COMPLIANCE TEST ...................................................................... 42
5.6.1 Connect Equipment for System Board Rx Compliance Testing............................. 42
5.6.2 Connect Equipment for Add-In Card Rx Compliance Testing ................................ 43
5.7 SET UP TEST REQUIREMENTS................................................................................................. 45
5.7.1 Setup Tab ................................................................................................................. 45
5.8 SELECT PCIE CEM 5.0 RX TESTS ........................................................................................... 45
5.8.1 Select to Run DUT Link Training and Rx Compliance Test..................................... 46
5.8.2 Select to Run SJ Margin Search Test....................................................................... 46
5.9 CONFIGURE TEST PARAMETERS .............................................................................................. 47
5.10 ENABLE LOOPBACK BER TEST ............................................................................................ 50
5.11 RUN AUTOMATION TESTS ................................................................................................... 51
6INTERPRETING GRL-PCIE5-CEM-RXA TEST REPORT 53
6.1 UNDERSTAND TEST REPORT INFORMATION............................................................................... 53
6.1.1 Test Session Information......................................................................................... 53
6.1.2 Test Summary Table ................................................................................................ 54
6.1.3 Test Results .............................................................................................................. 54
6.2 DELETE TEST RESULTS .......................................................................................................... 55
7SAVING AND LOADING GRL-PCIE5-CEM-RXA TEST SESSIONS 55
8APPENDIX A: METHOD OF IMPLEMENTATION (MOI) FOR MANUAL PCIE CEM
5.0 RECEIVER MEASUREMENTS 56
8.1 PERFORM CALIBRATION......................................................................................................... 56
8.1.1 Calibration Settings ................................................................................................. 57
8.1.2 Calibration Process .................................................................................................. 57
8.1.3 Channel Loss Calibration......................................................................................... 58
8.1.4 Amplitude, Preset, SJ and RJ Calibration Setup .................................................... 60
8.1.5 Anritsu Standard BERT Device Test Application (MX190000A) Startup ................. 60
8.1.6 Amplitude Calibration Adjustment ......................................................................... 61
8.1.7 Preset Calibration Adjustment ................................................................................ 63

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8.1.8 SJ Calibration........................................................................................................... 68
8.1.9 RJ Calibration........................................................................................................... 70
8.1.10 DM & CM Amplitude and Eye Height/Eye Width Calibration Setup .................... 74
8.1.11 DM-I Calibration Adjustment................................................................................ 75
8.1.12 CM-I Calibration Adjustment ................................................................................ 76
8.1.13 EH/EW Calibration Adjustment ............................................................................ 78
8.2 PERFORM INITIAL TX EQUALIZATION & TX LINK EQUALIZATION RESPONSE TESTS............................ 81
8.2.1 Equipment Setup for Add-in Card DUT Initial Tx EQ / Tx Link EQ Response Test . 81
8.2.2 Equipment Setup for System Board DUT Tx Link EQ Response Test..................... 82
8.2.3 Initial Tx EQ Startup and Testing............................................................................. 84
8.2.4 Tx Link EQ Time Response (with Presets/Cursors) Startup and Testing ............... 87
8.3 PERFORM RX LINK EQ TEST................................................................................................... 91
8.3.1 Equipment Setup for Add-in Card DUT Loopback Test.......................................... 91
8.3.2 Equipment Setup for System Board DUT Loopback Test ...................................... 92
8.3.3 Link Training Initialization and Testing................................................................... 94
8.3.4 Link Training Failure Troubleshooting.................................................................... 96
8.4 PERFORM DUT RX COMPLIANCE TESTING ................................................................................ 97
8.4.1 Jitter Tolerance Testing (Optional) ......................................................................... 97
9APPENDIX B: RETURN PATH OPTIMIZATION USING ANRITSU J1890A PCIE5 RE-
DRIVER SET 99
9.1 REQUIREMENTS FOR USING AN EXTERNAL DRIVER (J1890A)....................................................... 99
9.2 RETURN PATH OPTIMIZATION PROCEDURE ............................................................................... 99
9.3 J1890A PCIE5 RE-DRIVER SET SETUP & CONFIGURATION....................................................... 103
9.3.1 Configuration of Re-Driver..................................................................................... 103
9.3.2 Connections............................................................................................................ 103
9.3.3 Setting of Power Supply AH54192A-01.................................................................. 104
9.3.4 Voltage Setup Steps of AH54192A-01.................................................................... 105
10 APPENDIX C: RETURN PATH OPTIMIZATION USING MACOM TECHNOLOGY
SOLUTIONS RE-DRIVER 106
10.1 REQUIREMENTS FOR USING AN EXTERNAL DRIVER (MACOM)................................................. 106
10.2 RETURN PATH OPTIMIZATION PROCEDURE.......................................................................... 106
10.3 MACOM RE-DRIVER SETUP & CONFIGURATION................................................................... 111
10.3.1 Configuration of Re-Driver.................................................................................. 111
10.3.2 Connection Diagram........................................................................................... 111
10.3.3 Operation Guide.................................................................................................. 112
10.4 EQ SETTING OPTIMIZATION.............................................................................................. 113

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11 APPENDIX D: SIGTEST TOOL TAB 114
12 APPENDIX E: DEBUG TOOL TAB 116
13 APPENDIX F: CONNECTING KEYSIGHT OSCILLOSCOPE TO PC 120
14 APPENDIX G: CONNECTING TEKTRONIX OSCILLOSCOPE TO PC 122

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List of Figures
Figure 1. Select and Launch GRL Framework .....................................................................................15
Figure 2. Start PCIe CEM 5.0 Rx Test Application ................................................................................16
Figure 3. See License Details................................................................................................................16
Figure 4. Check License for Installed Applications .............................................................................16
Figure 5. Connect Instruments with GRL Software.............................................................................18
Figure 6. Session Info Page ..................................................................................................................18
Figure 7. Rx Calibration Diagram from PHY Test Specification..........................................................19
Figure 8. Recommended Setup for TP3 Rx Calibration ......................................................................20
Figure 9. Recommended Setup for TP3 Rx Calibration Using Tektronix ATI Scope..........................21
Figure 10. Recommended Setup for TP2 Long Channel Rx Calibration (PCIe Gen 5 System Board)22
Figure 11. Recommended Setup for TP2 Long Channel Rx Calibration (PCIe Gen 5 System Board)
Using Tektronix ATI Scope ............................................................................................................23
Figure 12. Recommended Setup for TP2 Long Channel Rx Calibration (PCIe Gen 5 Add-In Card)...24
Figure 13. Recommended Setup for TP2 Long Channel Rx Calibration (PCIe Gen 5 Add-In Card)
Using Tektronix ATI Scope ............................................................................................................25
Figure 14. Select Test Condition..........................................................................................................26
Figure 15. Set Up Calibration Requirements.......................................................................................26
Figure 16. Select Device for Calibration ..............................................................................................26
Figure 17. Select Rx Calibration...........................................................................................................27
Figure 18. Select TP3 Calibration.........................................................................................................27
Figure 19. Select Long Channel TP2 Calibration (with SigTest).........................................................28
Figure 20. Select Long Channel TP2 Calibration (with Seasim) .........................................................28
Figure 21. Calibration Parameters Configuration Page......................................................................29
Figure 22. Calibration Target Overwrite Page.....................................................................................32
Figure 23. Run Tests Page....................................................................................................................33
Figure 24. Example Connection Pop-Up Diagram for Rx TP3 Calibration .........................................33
Figure 25. Main State Diagram for Link Training and Status State Machine (from PHY Test
Specification).................................................................................................................................39
Figure 26. Polling Substate Machine (from PHY Test Specification)..................................................39
Figure 27. Recommended Setup for DUT TxRx Link EQ Testing (PCIe Gen 5 System Board) ...........40
Figure 28. Recommended Setup for DUT TxRx Link EQ Testing (PCIe Gen 5 Add-in Card)...............41
Figure 29. Recommended Setup for DUT Rx Compliance Testing (PCIe Gen 5 System Board)........43
Figure 30. Recommended Setup for DUT Rx Compliance Testing (PCIe Gen 5 Add-In Card) ...........44
Figure 31. Set Up Test Requirements..................................................................................................45

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Figure 32. Select DUT Type ..................................................................................................................45
Figure 33. Select Rx Tests.....................................................................................................................45
Figure 34. Select DUT Tx Link EQ and Rx Compliance Tests ..............................................................46
Figure 35. Select SJ Margin Search Test..............................................................................................46
Figure 36. Test Parameters Configuration Page .................................................................................47
Figure 37. Connect Equipment for Loopback BER Test......................................................................50
Figure 38. Select BER Loopback Test Method.....................................................................................50
Figure 39. Run Tests Page....................................................................................................................51
Figure 40. Example Connection Pop-Up Diagram for Rx Compliance Test .......................................52
Figure 41. Test Report Page.................................................................................................................53
Figure 42. Test Session Information Example.....................................................................................53
Figure 43. Test Summary Table Example............................................................................................54
Figure 44. Test Results Example..........................................................................................................54
Figure 45. Delete Test Results..............................................................................................................55
Figure 46. Save/Load/Create Test Sessions........................................................................................55
Figure 47. PHY Test Specification Rx Calibration Diagram for PCIe Gen 5.........................................58
Figure 48. Connection Diagram for Channel Loss Calibration (Add-In Card) ....................................59
Figure 49. Connection Diagram for Channel Loss Calibration (System Board).................................59
Figure 50. Connection Diagram for Amplitude, Preset, SJ and RJ Calibration .................................60
Figure 51. Connection Diagram for PCIe Gen 5 DM-I, CM-I and EH/EW TP2 Calibration (for System
Board) ............................................................................................................................................74
Figure 52. Connection Diagram for PCIe Gen 5 DM-I, CM-I and EH/EW TP2 Calibration (for Add-In
Card)...............................................................................................................................................75
Figure 53. Connection Diagram for PCIe Gen 5 Add-in Card DUT Initial Tx EQ / Tx Link EQ Response
Test.................................................................................................................................................81
Figure 54. Connection Diagram for PCIe Gen 5 System Board DUT Tx Link EQ Response Test........83
Figure 55. Connection Diagram for PCIe Gen 5 Add-in Card DUT Loopback Test .............................92
Figure 56. Connection Diagram for PCIe Gen 5 System Board DUT Loopback Test..........................93
Figure 57. Setup Configuration Page.................................................................................................114
Figure 58. Perform SigTest Debugging..............................................................................................114
Figure 59. Running Offline SigTest Verification ................................................................................115
Figure 60. Viewing SigTest Analysis Results......................................................................................115
Figure 61. Setup Configuration Page.................................................................................................116
Figure 62. Perform Tx Link EQ Time Response Offline Tests Debugging.........................................116
Figure 63. Initiate Tx Link EQ Time Response Preset/Cursor Test ...................................................117

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Figure 64. Running Tx Link EQ Time Response Preset/Cursor Test .................................................117
Figure 65. Viewing Tx Link EQ Time Response Preset/Cursor Test Results .....................................118
Figure 66. Viewing Tx Link EQ Time Response Preset/Cursor Test Trace for Transition Time .......119
Figure 67. Keysight Connection Expert .............................................................................................120
Figure 68. Oscilloscope’s VISA Address .............................................................................................121
Figure 69. OpenChoice Instrument Manager In Start Menu.............................................................122
Figure 70. OpenChoice Instrument Manager Menu ..........................................................................123

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List of Tables
Table 1. Equipment Requirements –Systems and Accessories.........................................................12
Table 2. Equipment Requirements –Cables.......................................................................................13
Table 3. Software Requirements .........................................................................................................14
Table 4. Calibration Parameters Description......................................................................................30
Table 5. Test Parameters Description .................................................................................................48
Table 6. Calibration Settings ...............................................................................................................57
Table 7. Calibration Targets.................................................................................................................57

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1Introduction
This user manual provides information using the GRL-PCIE5-CEM-RXA test automation solution to
set up and test an electrical receiver (Rx) device to meet PCI Express Card Electromechanical
(CEM) 5.0 compliance for 32 GT/s as per PCI Express (PCI-SIG) Standards.
The main body of this documentation first describes how to configure the GRL-PCIE5-CEM-RXA
test software to calibrate the stressed eye at the receiver of the device under test (DUT) in the PCIe
Gen 5.0 system. This includes calibration to be performed at both the physical Test Point 3 (TP3)
and the Long Channel at TP2. The GRL software will automate calibration without channel effect
at TP3 before measuring the eye opening due to trace length. It also enables running the SigTest
and Seasim post processing analysis application to ensure signal quality compliance. The final
calibrated eye diagram uses both the SigTest and Seasim software to achieve the final stressed
eye calibration.
After completing calibration, the GRL-PCIE5-CEM-RXA software will automate compliance testing
for the receiver using Bit Error Ratio (BER) as a metric. The receiver path is tested with worst case
eye to ensure a BER of less than 1E-12 can be achieved. The software also provides an optional SJ
margin search test for the DUT.
The GRL-PCIE5-CEM-RXA software performs test automation according to PCI-SIG-approved
Methods of Implementation (MOI’s) with high performance real-time oscilloscopes and Anritsu
BERT using existing PCI-SIG Compliance Base Boards (CBB’s) and Compliance Load Boards
(CLB’s). The GRL software is run from the computer or oscilloscope to provide automation control
to test the DUT for PCIe CEM 5.0 Rx electrical compliance. When combined with a satisfactory level
of interoperability testing, these tests provide a reasonable level of confidence that the DUT’s will
function properly in most PCIe environments.
Note: For manual test methodology, refer to Appendix of this documentation or PCI-SIG for approved
Method of Implementation (MOI’s) as technical reference.

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2Resource Requirements
Note: Equipment requirements may vary according to the lab setup and DUT board. Below are the
recommended lists of equipment for the typical test setup.
2.1 Equipment Requirements
TABLE 1. EQUIPMENT REQUIREMENTS –SYSTEMS AND ACCESSORIES
System & Accessory
Qty.
Description/Key Spec Requirement
High Performance Real-time Oscilloscope [a]
1
≥ 50 GHz bandwidth [b]
Anritsu MP1900A BERT
1
MP1900A Signal Quality Analyzer, with following
modules:
•MU181000A/B 12.5 GHz Synthesizer [c]
•MU181500B Jitter Modulation Source
•MU195020A 21G/32G bit/s SI Pulse Pattern
Generator, or
MU196020A 64.2G bit/s or 64.2G baud
PAM4 Pulse Pattern Generator [d]
•MU195040A 21G/32G bit/s SI Error
Detector
•MU195050A Noise Generator
PCI-SIG Compliance Base Board (CBB)
or
PCI-SIG Compliance Load Board (CLB)
1
For add-in cards
For host system boards
ISI Source Generator
1
Compliant Variable ISI channel
Pick-off Tee
2
For connecting scope to CLB/CBB Tx lanes to
perform link equalization tests
Terminator
1
J1632A Coaxial Terminator, for termination of
unused MU195020A/MU196020A Aux Out
connector during link equalization testing
V(m) - K(f) Adapter
2
34VKF50A Coaxial Adapter, only required if using a
PAM4 Pulse Pattern Generator
PCIe5 Re-Driver
J1890A [e] PCIe5 Re-Driver Set with AH54192A [e]
56Gbaud Differential Linear Amplifier
or
MACOM Technology Solutions Re-Driver [f]
For Return Path optimization in the System Tx/Rx
Link Equalization Test

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System & Accessory
Qty.
Description/Key Spec Requirement
Computer (laptop or desktop)
1
Windows 7+ OS
For automation control
[a]Oscilloscope with scope software requirements as specified in vendor specific MOI’s. For example, when
using the Keysight Scope, scope software such as Keysight InfiniiSim / EZ-JIT / Serial Data Analysis / Serial
Data Equalization that are required for testing and signal processing must be pre-installed on the Scope.
Similarly, the Tektronix Scope shall be used with DPOJET (Jitter and Eye Analysis Tools) software for making
measurements.
[b] Oscilloscope with scope bandwidth as specified in vendor specific MOI’s.
[c] MU181000B Option 02 is required for testing the System Board DUT.
[d] The GRL-PCIE5-CEM-RXA software supports PAM4 PPG in NRZ mode.
[e]The J1890A and AH54192A are packaged separately. Check the contents of both boxes. The AH54192A is
supplied as a set with dedicated power supply AH54192A-01. See Appendix B for more details.
[f]See Appendix C for more details.
TABLE 2. EQUIPMENT REQUIREMENTS –CABLES
Cable [a]
Qty.
SMA-to-SMA cable
4
SMA coaxial cables
1 pair
Phase matched K-K coaxial cables
3 pairs
J1746A K-K cable set (to connect between MU195020A and MU195050A)
1
J1627A GND connection cable
1
BNC-to-SMA cable
1
[a] Based on the standard test configuration. May require more or less cables depending on the DUT type.

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2.2 Software Requirements
TABLE 3. SOFTWARE REQUIREMENTS
Software
Description/Source
GRL-PCIE5-CEM-RXA
Granite River Labs PCI Express Card Electromechanical 5.0 (32 GT/s)
Automated Receiver Calibration and Compliance Test Solution –
www.graniteriverlabs.com
VISA (Virtual Instrument
Software Architecture)
API Software
VISA Software is required to be installed on the controller PC running
GRL-PCIE5-CEM-RXA software. GRL’s software framework has been
tested to work with all three versions of VISA available on the Market:
1. NI-VISA: http://www.ni.com/download/ni-visa-17.0/6646/en/
2. Keysight IO Libraries: www.keysight.com (Search on IO Libraries)
3. Tektronix TekVISA: www.tek.com (Downloads > Software >
TekVisa)
MX183000A
Anritsu High-Speed Serial Data Test Software –For loopback BER
testing of the PCIe Gen 5 CEM DUT receiver. This software is located
in the MP1900A BERT.
SigTest Application
Standard Post Processing Analysis Software –
www.intel.com/content/www/us/en/design/technology/high-speed-
io/tools.html
Seasim
Seasim tool for post-process analysis of the captured waveform (Eye
Opening simulation software) –www.pcisig.com

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3Setting Up GRL-PCIE5-CEM-RXA Automation Software
This section provides the procedures to start up and pre-configure the GRL-PCIE5-CEM-RXA
automation software before running tests. It also helps users familiarize themselves with the basic
operation of the software.
Note: The GRL software installer will automatically create shortcuts in the Desktop and Start Menu
when installing the software.
To start using the GRL software, follow the procedures in the following sections.
3.1 Download GRL-PCIE5-CEM-RXA Software
Download and install the GRL software as follows:
1. If the GRL software is to be installed on a PC (where it is referred to as ‘controller PC’), install
VISA (Virtual Instrument Software Architecture) on to the PC where GRL-PCIE5-CEM-RXA is to
be used (see Section 2.2).
2. Download the software ZIP file package from the Granite River Labs support site.
3. The ZIP file contains:
•PCIECEMGen5_AN_PatternFilesInstallationxxxxxxxxxSetup.exe –Run this on the
Anritsu MP1900A BERT Signal Quality Analyzer to install the pattern setup files.
•PCIECEMGen5_AN_RxTestApplicationxxxxxxxxxSetup.exe –Run this on the PC or on
the oscilloscope to install the application.
•PCIECEMGen5_AN_RxTestScopeSetupFilesInstallationxxxxxxxxxSetup.exe –Run this
on the oscilloscope to install the scope setup files.
3.2 Launch and Set Up Software
1. Once the software is installed, open the GRL folder from the Windows Start menu. Click on
GRL –Automated Test Solutions within the GRL folder to launch the GRL software
framework.
FIGURE 1. SELECT AND LAUNCH GRL FRAMEWORK

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2. From the Application→Rx Test Solution drop-down menu, select ‘Anritsu PCIe CEM 5.0 Rx Test’
to start the PCIe CEM 5.0 Rx Test Application. If the selection is grayed out, it means that your
license has expired.
FIGURE 2. START PCIE CEM 5.0 RX TEST APPLICATION
3. To enable license, go to License→License Details.
FIGURE 3. SEE LICENSE DETAILS
a) Check the license status for the installed application.
FIGURE 4. CHECK LICENSE FOR INSTALLED APPLICATIONS
b) Activate a License:
•If you have an Activation Key, enter it in the field provided and select “Activate”.

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•If you do not have an Activation Key, select “Close”to use a demo version of the software
over a free 10-day trial period.
Note: Once the 10-day trial period ends, you will need to request an Activation Key to continue using
the software on the same computer or oscilloscope. The demo software is also limited in its
capability, in that it will only calibrate the maximum frequency for each data rate. Thus, the demo
version cannot be used to fully calibrate and test a device. For Demo and Beta Customer License
Keys, please request an Activation Key by contacting [email protected].
4. Select the Equipment Setup icon on the PCIe CEM 5.0 Rx Test Application menu.
5. Connect the Anritsu MP1900A BERT via LAN to the GRL automation control enabled Scope or
PC. The BERT and MX183000A software can be connected using connection string formats
similar to the following examples:
•BERT: “TCPIP0::192.168.0.14::5001::SOCKET” or “192.168.0.14:5001”
•MX183000A: “TCPIP0::192.168.0.14::5000::SOCKET” or “192.168.0.14:5000”
Note the IP addresses listed above are only examples and should be changed according to the
actual network connection being used.
6. On the Scope or controller PC, obtain the network addresses for all the connected instruments
from the device settings. Note these addresses as they will be used to connect the instruments
to the GRL automation software.
7. On the Equipment Setup page of the GRL PCIe CEM 5.0 Rx Test Application, type in the address
of each connected instrument into the ‘Address’field.
(Note: If the GRL software is installed on the Tektronix Scope, ensure the Scope is connected via
GPIB and type in the GPIB network address, for example “GPIB8::1::INSTR”.)
If the GRL software is installed on the PC to control the Scope, type in the Scope IP address, for
example “TCPIP0::192.168.0.110::inst0::INSTR”. Note to omit the Port number from the
address.
(Note: If the GRL software is installed on the Keysight Scope, and if there is error in connection,
type in the Scope IP address as “TCPIP0::192.168.0.4::5025::SOCKET”.)
8. Then select the “lightning” button ( ) for each connected instrument.
The “lightning” button should turn green ( ) once the software has successfully established
connection with each instrument.

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FIGURE 5. CONNECT INSTRUMENTS WITH GRL SOFTWARE
Note: Additional information for connecting supported vendor oscilloscopes (Keysight and Tektronix)
to the PC is provided in the Appendix of this document.
3.3 Pre-Configure Software Before Calibration/Testing
Once all equipment is successfully connected from the previous section, proceed to set up the
preliminary settings before going to the advanced measurement setup.
3.3.1 Enter Test Session Information
Select from the menu to access the Session Info page. Enter the information as required for
the test session that is currently being run. The information provided will be included in the test
report generated by the software once tests are completed.
•The fields under DUT Info andTest Info are defined by the user.
•The Software Info field is automatically populated by the software.
FIGURE 6. SESSION INFO PAGE

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4Calibrating Using GRL-PCIE5-CEM-RXA Software
The GRL-PCIE5-CEM-RXA test solution supports automated Rx calibration using the SigTest and
Seasim signal quality and stress tolerance analysis application for PCIe Gen 5 system boards and
add-in cards. To perform calibration, the GRL-PCIE5-CEM-RXA software is run from the PC or
oscilloscope to enable automation control for each step of calibration and signal quality test
sequence.
Calibration for the PCIe CEM 5.0 electrical specification will basically be performed at two physical
test points: TP3 and TP2 (for the Long Channel). Test Point 3 (TP3) is a physical test point for
calibration without the effect of a channel. An adjustable CEM connector will be used along with
the calibration channel for testing the receiver. This will need to adjust the eye amplitude to
specification values when measuring eye height/eye width. TP2 is a physical test point that will
affect the eye opening due to trace length.
FIGURE 7. RX CALIBRATION DIAGRAM FROM PHY TEST SPECIFICATION
For the Long Channel TP2 calibration, a PCI-SIG compliance load board (CLB) test fixture will be
used for the host system board or a PCI-SIG compliance base board (CBB) test fixture for the add-
in card. The board will be connected between the BERT noise generator output and the
oscilloscope which will validate the test pattern of the signal and measure for stress tolerance to
final stressed eye compliance. Post processing analysis of the signal is performed at the TP2P test
point using the Seasim or SigTest application to simulate the stressed eye opening after applying
Rx Behavioral package, Rx CTLE and DFE (if required). When calibration is completed, the GRL
software will generate a test report detailing all results obtained from the calibration.

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4.1 Set Up Automated Rx Calibration for TP3
Once pre-configuration has been completed from previous section, continue with the following
calibration setup at TP3 (output of the BERT generator) using a GRL automation control enabled
oscilloscope and Anritsu MP1900A BERT.
FIGURE 8. RECOMMENDED SETUP FOR TP3RX CALIBRATION
1. Using a SMA-SMA short cable, connect the MU181000A/B clock output to the MU181500B Ext
clock input.
2. Using a SMA-SMA short cable, connect the MU181500B jittered clock output to the
MU195020A/MU196020A Ext clock input.
3. Using coaxial cables, connect the MU195020A/MU196020A data outputs to the MU195050A
data inputs.
4. Using phase matched K-K coaxial cables, connect the MU195050A data outputs to Channels 1
and 3 on the oscilloscope.
4.1.1 TP3 Calibration Setup with Tektronix ATI Based Oscilloscope
If the Tektronix ATI based oscilloscope is being used, proceed with the following TP3 calibration
setup.