Quatech 802.11B/G Owner's manual

Product Specification
802.11b/g High Performance Enterprise
Device Server
Revision: 1.2
July 2010
File name: databook wlng dp500 family v1.2.doc
Document Number: 100-8080-120

Quatech, Inc. Airborne Enterprise Module Databook
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Airborne Enterprise Module Databook Quatech, Inc.
100-8080-120 7/15/2010 3
Quatech Confidential
Copyright © 2009 QUATECH ®Inc.
ALL RIGHTS RESERVED. No part of this publication may be copied in any form, by photocopy, microfilm, retrieval
system, or by any other means now known or hereafter invented without the prior written permission of QUATECH ®Inc..
This document may not be used as the basis for manufacture or sale of any items without the prior written consent of
QUATECH Inc..
QUATECH Inc. is a registered trademark of QUATECH Inc..
Airborne™ is a trademark of QUATECH Inc..
All other trademarks used in this document are the property of their respective owners.
Disclaimer
The information in the document is believed to be correct at the time of print. The reader remains responsible for the
system design and for ensuring that the overall system satisfies its design objectives taking due account of the information
presented herein, the specifications of other associated equipment, and the test environment.
QUATECH ®Inc. has made commercially reasonable efforts to ensure that the information contained in this document is
accurate and reliable. However, the information is subject to change without notice. No responsibility is assumed by
QUATECH for the use of the information or for infringements of patents or other rights of third parties. This document is
the property of QUATECH ®Inc. and does not imply license under patents, copyrights, or trade secrets.
Quatech, Inc. Headquarters
QUATECH ®Inc..
5675 Hudson Industrial Parkway
Hudson, OH 44236
USA
Telephone: [phone]
Toll Free (USA): 800-553-1170
Fax: [phone]
Technical Support: 714-899-7543 / [e-mail]
Web Site: www.quatech.com

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Contents
Product Specification............................................................................................................................... 1
1.0 Conventions..................................................................................................................................... 7
1.1 Terminology ................................................................................................................................ 7
1.2 Notes............................................................................................................................................ 7
1.3 Caution......................................................................................................................................... 7
1.4 File Format.................................................................................................................................. 7
2.0 Product Description........................................................................................................................ 8
3.0 Block Diagram................................................................................................................................. 9
4.0 Model Numbers..............................................................................................................................10
5.0 Pin out and Connectors................................................................................................................11
5.1 Digital UART Ports....................................................................................................................13
5.2 Ethernet PHY Port.....................................................................................................................13
5.3 Serial Peripheral Interface (SPI) .............................................................................................14
5.4 Debug/Console Port..................................................................................................................14
5.5 General Purpose Input/Output (GPIO)...................................................................................14
5.6 Connector Definition .................................................................................................................15
6.0 Electrical & RF Specification........................................................................................................16
6.1 AC Electrical Characteristics –Transmitter...........................................................................19
6.2 Performance/Range..................................................................................................................19
7.0 SPI Interface...................................................................................................................................21
7.1 Pinout..........................................................................................................................................21
7.2 SPI AC Characteristics.............................................................................................................22
7.3 SPI Protocol...............................................................................................................................23
7.4 SPI Commands..........................................................................................................................24
8.0 Antenna...........................................................................................................................................27
8.1 Antenna Selection.....................................................................................................................27
8.2 Host Board Mounted Antenna.................................................................................................27
8.3 Host Chassis Mounted Antenna..............................................................................................28
8.4 Embedded Antenna ..................................................................................................................28
8.5 Antenna Location ......................................................................................................................29
8.6 Performance...............................................................................................................................30
9.0 RESET Function............................................................................................................................32
9.1 Reference RESET Circuit ........................................................................................................33
10.0 Mechanical Outline........................................................................................................................34
10.1 Recommended Connectors.....................................................................................................35
11.0 Certification & Regulatory Approvals..........................................................................................36
11.1 FCC Statement..........................................................................................................................36
11.2 FCC RF Exposure Statement..................................................................................................36
11.3 Information for Canadian Users (IC Notice)..........................................................................36
11.4FCC/IOC Modular Approval.....................................................................................................37
11.5 Regulatory Test Mode Support ...............................................................................................38
12.0 Physical & Environmental Approvals..........................................................................................39
13.0 Change Log....................................................................................................................................40

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Figures
Figure 1- WLNG-AN-DP500 Module Example........................................................................................ 8
Figure 2 - WLNG-SE/SP/AN/ET-DP500 Block Diagram........................................................................ 9
Figure 3 - SPI Read/Write Timing ............................................................................................................22
Figure 4 - SPI Clock and Select Timing ..................................................................................................22
Figure 5 - Power on RESET Timing.........................................................................................................32
Figure 6 - RESET Timing ..........................................................................................................................32
Figure 7 - RESET Circuit...........................................................................................................................33
Figure 8 - Mechanical Outline...................................................................................................................34
Tables
Table 1 - Model Numbers..........................................................................................................................10
Table 2 –Module Pin Definition................................................................................................................11
Table 3 - UART Pin Definition...................................................................................................................13
Table 4- Absolute Maximum Values1.......................................................................................................16
Table 5 –Operating Conditions & DC Specification..............................................................................16
Table 6 - RF Characteristics –802.11b/g ...............................................................................................18
Table 7 - Supported Data Rates by Band...............................................................................................19
Table 8 - Operating Channels...................................................................................................................19
Table 10 - Radio Typical Performance Range.......................................................................................20
Table 11 - SPI Pinout Details....................................................................................................................21
Table 12 - SPI Signal Descriptions ..........................................................................................................21
Table 13 - SPI AC Timings........................................................................................................................22
Table 14 - TX Message Header ...............................................................................................................23
Table 15 - RX Message Header...............................................................................................................23
Table 16 - SPI Command Description.....................................................................................................24
Table 17 - Embedded Antenna Options..................................................................................................28
Table 18 - RESET Timing..........................................................................................................................32
Table 19 - Regulatory Approvals..............................................................................................................36
Table 20 - Mechanical Approvals.............................................................................................................39

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1.0 Conventions
The following section outlines the conventions used within the document, where
convention is deviated from the deviation takes precedence and should be followed. If
you have any question related to the conventions used or clarification of indicated
deviation please contact Quatech Sales or Wireless Support.
1.1 Terminology
Airborne Enterprise Device Server and AirborneDirect Enterprise Device
Server is used in the opening section to describe the devices detailed in this
document, after this section the term module will be used to describe the
devices.
1.2 Notes
A note contains information that requires special attention. The following
convention will be used. The area next to the indicator will identify the specific
information and make any references necessary.

The area next to the indicator will identify the specific information and make any
references necessary.
1.3 Caution
A caution contains information that, if not followed, may cause damage to the
product or injury to the user. The shaded area next to the indicator will identify
the specific information and make any references necessary.

The area next to the indicator will identify the specific information and make any
references necessary.
1.4 File Format
These documents are provided as Portable Document Format (PDF) files. To
read them, you need Adobe Acrobat Reader 4.0.5 or higher. For your
convenience, Adobe Acrobat Reader is provided on the Radio Evaluation Kit CD.
Should you not have the CD, for the latest version of Adobe Acrobat Reader, go
to the Adobe Web site (www.adobe.com).

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2.0 Product Description
The WLNG-AN-DP500 family is the latest generation of 802.11 wireless device servers
from Quatech. The radio features the following:
802.11b/g WiFi Radio with 32bit ARM9 CPU (128Mb SDRAM, 64Mb Flash)
Supports WEP, WPA, WPA2 and 802.1x Supplicant, with Certificates.
The wireless device server includes integrated:
802.11b/g radio driver
TCP/IP stack, UDP, telnet, FTP server
Data bridging and buffering
Command Line Interface
Web interface
WPA Supplicant
802.11 Radio Driver
Supports antenna diversity
Operating Temperature (-40°C to 85°C)
Storage temp (-50°C to 125°C)
36 pin high density SMT connector (Hirose DF12-36)
Dual (2) Hirose U.FL RF connector for RF antenna
Multiple host interfaces supported:
Dual UART (960K BAUD)
Serial (RS232/422/485)
SPI
10/100 Ethernet PHY
Advanced Low power modes
Rugged mounting options.
No host driver required
Small form factor module (Dimensions: 29mm x 21mm x 6.0mm)
Worldwide Regulatory Support
Figure 1- WLNG-AN-DP500 Module Example

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3.0 Block Diagram
The following outlines the block diagram of the radio:
Figure 2 - WLNG-SE/SP/AN/ET-DP500 Block Diagram

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4.0 Model Numbers
The following table identifies the model numbers associated with the device server family.
Please contact Quatech sales for details, quotes and availability.
Table 1 - Model Numbers
WiFi
802.11b/g UART RS232 RS485 SPI Ethernet GPIO WEP WPA WPA2 EAP
WLNG-SE-DP501
802.11b/g, UART Interface with
RS232/422/485 Driver Control
l l l l l l l l l l
WLNG-SP-DP501
802.11b/g, SPI Interface l l l l l l l l
WLNG-AN-DP501
802.11b/g, UART Interface l l l l l l l l l l
WLNG-ET-DP501
802.11b/g, 10/100 Ethernet Interface l l l l l l l l
WLNG-EK-DP501 802.11b/g Enterprise Class Serial Device Server Module Eval Kit (inc. WLNG-SE/AN-DP501) l
WLNG-EK-DP502
802.11b/g Enterprise Class SPI Device Server Module Eval Kit (inc. WLNG-SP-DP501)
l
WLNG-EK-DP503 802.11b/g Enterprise Class Ethernet Bridge Module Eval Kit (inc. WLNG-ET-DP501) l
RoHS
Eval Kit
Model Number
Interface
Security
Description

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5.0 Pin out and Connectors
Pin definition is dependent upon the device type selected. The specific pin function is
defined in Table 2 for each device type. Where multiple options are available for a single
device type, these options are software selectable by the device firmware.
Table 2 –Module Pin Definition
Pin
Name
Device
Type
Description
1
GND
All
Digital Ground
2
TDI
All
JTAG: Test data in
3
VDD
All
3.3VDC
4
VDD
All
3.3VDC
5
RTCK
All
JTAG: Return Test Clock
6
DTXD
All
DOUT Debug
7
/RESET
All
Module RESET
8
DRXD
All
DIN Debug
9
RXD2
UART
DIN UART2
RXD2
Serial
DIN UART2
RXD2
SPI
DIN UART2
RXD2
Ethernet
DIN UART2
G6
All
GPIO
10
TDO
All
JTAG: Test data out
11
/FRESET
All
Factory RESET
12
CTS1
UART
Clear-to-Send UART1
CTS
Serial
Clear-to-Send
/SPI_SEL
SPI
SPI Select
CTS1
Ethernet
Clear-to-Send UART1
F5
All
GPIO
13
NC
UART
No Connect
NC
Serial
No Connect
NC
SPI
No Connect
RX+
Ethernet
Ethernet RX+
14
NC
UART
No Connect
NC
Serial
No Connect
NC
SPI
No Connect
RX-
Ethernet
Ethernet RX-
15
GND
All
Digital Ground
16
GND
All
Digital Ground
17
RTS2
UART
Ready-to-Send UART2
/TXEN
Serial
Line Driver Tx enable
RTS2
SPI
Ready-to-Send UART2
RTS2
Ethernet
Ready-to-Send UART2
G2
All
GPIO
18
RTS1
UART
Ready-to-Send UART1
RTS
Serial
Ready-to-Send
SPI_CLK
SPI
SPI Clock Input
RTS1
Ethernet
Ready-to-Send UART1

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Pin
Name
Device
Type
Description
F4
All
GPIO
19
CTS2
UART
Clear-to-Send UART2
RXEN
Serial
Line driver Rx enable
CTS2
SPI
Clear-to-Send UART2
CTS2
Ethernet
Clear-to-Send UART2
G1
All
GPIO
20
TCK
All
JTAG: Test clock
21
TXD2
UART
DOUT UART2
TXD2
Serial
DOUT UART2
TXD2
SPI
DOUT UART2
TXD2
Ethernet
DOUT UART2
G7
All
GPIO
22
G0
UART
GPIO
SER_MODE
Serial
Serial interface type selection (RS232/422/485)
SPI_INT
SPI
SPI Interrupt
G0
Ethernet
GPIO
23
LED_CON
All
Valid TCP/IP Connection Indicator
F6
GPIO
24
RXD1
UART
DIN UART1
RXD1
Serial
DIN UART1
MOSI
SPI
DIN SPI
RXD1
Ethernet
DIN UART1
F7
All
GPIO
25
LED_POST
All
POST Status Indicator
F0
GPIO
26
LED_WLN_CFG
All
Module TCP/IP Configuration Indicator
F3
GPIO
27
LED_RF_LINK
All
Module RF Link Status Indicator
F2
GPIO
28
TXD1
UART
DOUT UART1
TXD
Serial
DOUT
MISO
SPI
DOUT SPI
TXD1
Ethernet
DOUT UART1
F1
All
GPIO
29
NC
UART
No Connect
NC
Serial
No Connect
NC
SPI
No Connect
TX-
Ethernet
Ethernet TX-
30
NC
UART
No Connect
NC
Serial
No Connect
NC
SPI
No Connect
TX+
Ethernet
Ethernet TX+
31
NTRST
All
JTAG: Test RESET signal
32
TMS
All
JTAG: Test mode select
33
VDD
All
3.3VDC
34
VDD
All
3.3VDC
35
LED_RF_ACT
All
Radio Status Indicator, driven by the radio.
36
GND
All
Digital Ground

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5.1 Digital UART Ports
The units supports two digital UART ports, use of these ports is determined by
the device type choice made in firmware. The details of the ports can be seen in
Table 3.
The availability of UART2 for these device types is selected in firmware.
Table 3 - UART Pin Definition
Device Type
UART
Serial
All
Pin Definition
UART1
Pin
UART2
Pin
UART1
Pin
UART2
Pin
Debug
Data out (DOUT)
28
21
28
21
6
Data In (DIN)
24
9
24
9
8
Clear-to-Send (CTS)
12
19
12
Ready-to-Send (RTS)
18
17
18
Transmit Enable (/TXEN)
17
Receive Enable (/RXEN)
19
Serial Mode (SER_MOD)
22
The primary UART supports a 4-wire interface; the secondary port supports 4-
wire interface except when being used with the Serial Device type, in which case
it is reduced to a 2-wire only.
The primary digital UART can be used as the primary connection for the Serial
device type. This type supports a 7-wire interface to allow the definition of the
serial interface type (RS232/3422/485) and the data transfer direction. Definitions
of this interface can be seen in Table 3.
The UART1 and UART2 interfaces support the following configurations:
BAUD: 300, 600, 1200, 2400, 4800, 9600, 14400, 19200, 28800, 38400,
57600, 115200, 230400, 460800, 921600
Flow Control: None, Hardware (CTS/RTS), Software (XON/XOFF)
Default settings: 9600, 8, N, 1, No Flow Control.
5.2 Ethernet PHY Port
A 10/100 Ethernet PHY interface is supported when the Ethernet device type is
selected in firmware. This interface is a 10/100Mbps interface that supports auto
negotiation and cross-over cabling. The interface also supports both half and full
duplex for 10Mbps and 100Mbps.
The interface uses a Broadcom BCM5241A Ethernet PHY, please refer to the
manufacturers datasheet for interface details and appropriate design guidelines.

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5.3 Serial Peripheral Interface (SPI)
Please refer to section 7.0 for details on this interface.
5.4 Debug/Console Port
A debug/console port is supported by a 2-wire serial interface defined in Table 3.
This port is a bidirectional serial port intended for debug of the unit only, it does
not support data transfer.
It is recommended that a connection to this port be supported via test points or a
two pin header. The default settings for the debug port are 115200, 8, N 1, No
Flow Control.

CAUTION: Do not use the debug port without contacting Quatech Technical
Support first. Potential damage to the module may occur.
5.5 General Purpose Input/Output (GPIO)
A number of the interface pins support multiple functional definitions. Those
defined as alternately GPIO pins can be selected as such via device firmware.
The GPIO pins are digital I/O capable of supporting up to a 16mA drive current at
3.3VDC.

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5.6 Connector Definition
There are a total of three connectors to the radio:
J1: 36 pin Digital Host interface.
Hirose: DF12-36DP-0.5V(XX) (0.50mm (.020") Pitch Plug, Surface
Mount, Dual Row, Vertical, 4.00mm Stack Height, 36 Circuits)
J2: Primary RF connector for 802.11b/g antenna.
Hirose U.FL
J3: Secondary RF connector for 802.11b/g antenna.
Hirose U.FL.
RF Shield
J2
Top View Bottom
View
J1
Component
Area
J3

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6.0 Electrical & RF Specification
Table 4- Absolute Maximum Values1
Parameter
Min
Max
Unit
Maximum Supply Voltage
-0.3
4.0
VDC
Power Dissipation
2.00
W
Operating Temperature Range
-40
85
oC
Storage Temperature
-50
125
oC
Note: 1. Values are absolute ratings, exceeding these values may cause permanent damage to the device.
Table 5 –Operating Conditions & DC Specification
Symbol
Parameter
Min
Typ
Max
Units
VDD
Supply Voltage
3.00
3.30
3.60
V
VIL
Input Low Level Voltage
-0.3
0.8
VIH
Input High Level Voltage
2.0
VDD + 0.3
VOL
Output Low Level Voltage
0.4
VOH
Output High Level Voltage
VDD - 0.4
ICCTXG
Operating Current –UART Data In (802.11g)
Transmitting @ 54Mb/s
UART 100% Duty Cycle @ 920K BAUD
340
360
mA
ICCRXG
Operating Current –UART Data Out
(802.11g)
Receiving valid packets @ 54Mb/s
UART 100% Duty Cycle@ 920K BAUD
480
490
mA
ICCTXB
Operating Current –UART Data In (802.11b)
Transmitting @ 11Mb/s
UART 100% Duty Cycle @ 920K BAUD
340
360
mA
ICCRXB
Operating Current –UART Data Out
(802.11b)
Receiving valid packets @ 11MB/s
UART 100% Duty Cycle @ 920K BAUD
480
490
mA
ICCTXG_ETH
Operating Current –Ethernet Data In
(802.11g)
Transmitting @ 54Mb/s
10/100 Ethernet 100% Duty Cycle
470
500
mA
ICCRXG_ETH
Operating Current –Ethernet Data Out
(802.11g)
Receiving @ 54Mb/s
10/100 Ethernet 100% Duty Cycle
520
560
mA

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Symbol
Parameter
Min
Typ
Max
Units
ICCTXB_ETH
Operating Current –Ethernet Data In
(802.11b)
Transmitting @ 11Mb/s
10/100 100% Duty Cycle
520
560
mA
ICCRXB_ETH
Operating Current –Ethernet Data Out
(802.11b)
Receiving @ 11Mb/s
10/100 Ethernet 100% Duty Cycle
500
530
mA
ICCU
Radio and CPU on. No data traffic (UART)
340
360
mA
ICCE
Radio and CPU on. No data traffic (Ethernet)
330
350
mA
ISBU0
Radio off (UART)
CPU Idle, radio off (f/w control)
350
360
mA
ISBE0
Radio off (Ethernet)
CPU Idle, radio off (f/w control)
360
370
mA
ISB1
Doze Mode
IEEE PSPoll mode, Associated, Idle, Beacon
Interval = 100ms
CPU Idle, wake on UART or Network traffic
140
210
mA
ISB3U
Sleep Mode –UART/Serial
Radio in Deep Sleep (disassociated)
CPU Idle, wake on UART traffic
102
mA
ISB3E
Sleep Mode –Ethernet
Radio in Deep Sleep (disassociated)
CPU Idle, wake on pm-mode
95
mA

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Table 6 - RF Characteristics –802.11b/g
Symbol
Parameter
Rate (Mb/s)
Min
dBm
Average
dBm / mW
Peak
dBm / mW
Units
POUTB
Transmit Power
Output 802.11b
11, 5.5, 2, 1
13
15
31.6
19.3
85.1
dBm/mW
POUTG
Transmit Power
Output 802.11g
6, 9,12,18, 24,
36, 48, 54
10
12
15.9
21.5
141.3
dBm/mW
PRSENB
Receive Sensitivity
802.11b
11
-84
dBm
5.5
-85
2
-86
1
-86
PRSENG
Receive Sensitivity
802.11g
54
-69
dBm
48
-70
36
-74
24
-78
18
-81
12
-83
9
-85
6
-86
FRANGEBG
Frequency Range
2412
2484
MHz

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Table 7 - Supported Data Rates by Band
Band
Supported Data Rates (Mb/s)
802.11b
11, 5.5, 2, 1
802.11g
54, 48, 36, 24, 18, 12, 9, 6
Table 8 - Operating Channels
Band
Region
Freq Range
(GHz)
No. of
Channels
Channels
802.11b
US/Canada
2.401 - 2.473
11
1 –11
Europe
2.401 - 2.483
13
1 –13
France
2.401 - 2.483
4
10 –13
Japan
2.401 - 2.495
14
1 –14
802.11g
US/Canada
2.401 - 2.473
11
1 –11
Europe
2.401 - 2.483
13
1 –13
France
2.446 - 2.483
4
10 –13
Japan
2.401 - 2.483
13
1 –13

1. Only channels 1, 6 and 11 are non-overlapping.
6.1 AC Electrical Characteristics –Transmitter
Transmit power is automatically managed by the device for minimum power
consumption. The MAXIMUM transmit power at the RF connector is typically
+15dBm 2 dB for B-Mode (all rates) and +12dBm+/-2dB for G-Mode (all rates).
6.2 Performance/Range
The following table illustrates the typical data rates, performance and range the
device is capable of providing using an omni-directional antenna.

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Table 9 - Radio Typical Performance Range
Data Rate
Typical Outdoor Distance
(Unity gain antenna)
Typical Outdoor Distance
(2dBi antenna gain on each end for
B/G mode)
1.0 Mb/s
240m
380m
11.0 Mb/s
135m
215m
6Mb/s 802.11g
135m
215m
6Mb/s 802.11a
49m
155m
54Mb/s 802.11g
12m
19m
54Mb/s 802.11a
4.5m
14m
Ranges are based on receiver sensitivity, Transmitter power, free-space path
loss estimates, antenna gain factors, and link margin estimates. Actual range will
vary from those stated. Non-line-of-site applications will result in typical values
less than shown above.
The Data Rate is the supported connection rate for the wireless link, the actual
data throughput for the link will be less than the stated data rates.