SIGNALCORE SC5507A User manual

©2019 Rev 1.0
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General Information
Table of Contents
1General Information ................................................................................................................................ 4
Warranty .......................................................................................................................................... 4
Copyright & Trademarks.................................................................................................................. 4
International Materials Declarations............................................................................................... 5
CE European Union EMC & Safety Compliance Declaration........................................................... 5
Warnings Regarding Use of SignalCore Products............................................................................ 5
2Physical Description ................................................................................................................................. 6
Unpacking ........................................................................................................................................ 6
Nomenclature.................................................................................................................................. 6
Setting Up and Configuring the PSG Device.................................................................................... 7
Front Interface Indicators and Connectors ..................................................................................... 7
Signal Connections................................................................................................................... 7
Device LED Indicators .............................................................................................................. 8
Communication and Supply Connection................................................................................. 8
Mini-USB Connection............................................................................................................... 9
Reset Button (Pin Hole) ......................................................................................................... 10
3Theory and Operation............................................................................................................................ 10
RF Generation ................................................................................................................................ 11
Amplitude Control ......................................................................................................................... 11
Computational Time ...................................................................................................................... 11
RF Power Sensor ............................................................................................................................ 11
Internal EEPROM............................................................................................................................ 12
Modes of RF Generation................................................................................................................ 12
Sweep Function ..................................................................................................................... 12
List Function........................................................................................................................... 12
Sweep Direction..................................................................................................................... 12
Sweep Waveform .................................................................................................................. 12
Dwell Time ............................................................................................................................. 13
List Cycles............................................................................................................................... 13
Trigger Sources ...................................................................................................................... 13
Hardware Trigger Modes....................................................................................................... 13
Trigger Out Modes................................................................................................................. 13

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Default Startup Mode.................................................................................................................... 14
4Hardware Registers................................................................................................................................ 14
Configuration Registers ................................................................................................................. 14
Register 0x01 INITIALIZE (1 Byte) .......................................................................................... 16
Register 0x02 SET_SYS_ACTIVE (1 Byte)................................................................................ 16
Register 0x03 SYNTH_MODE (1 Byte) ................................................................................... 16
Register 0x04 RF_MODE (1 Byte).......................................................................................... 17
Register 0x05 LIST_MODE_CONFIG (1 Byte)......................................................................... 18
Register 0x06 LIST_START_FREQ (7 Bytes)............................................................................ 19
Register 0x07 LIST_STOP_FREQ (7 Bytes) ............................................................................. 20
Register 0x08 LIST_STEP_FREQ (7 Bytes).............................................................................. 20
Register 0x09 LIST_DWELL_TIME (7 Bytes)........................................................................... 20
Register 0x0A LIST_CYCLE_COUNT (7 Bytes) ........................................................................ 20
Register 0x0B Reserved ......................................................................................................... 21
Register 0x0C LIST_BUFFER_POINTS (3 Bytes)...................................................................... 21
Register 0x0D LIST_BUFFER_WRITE (7 Bytes)....................................................................... 21
Register 0x0E LIST_BUF_MEM_TRNSFER (1 Byte) ................................................................ 22
Register 0x0F LIST_SOFT_TRIGGER (1 Byte).......................................................................... 22
Register 0x10 RF_FREQUENCY (7 Bytes) ............................................................................... 22
Register 0x11 RF_LEVEL (3 Bytes) ......................................................................................... 22
Register 0x12 RF_ENABLE (1 Byte)........................................................................................ 23
Register 0x13 RF_PHASE (7 Bytes) ........................................................................................ 23
Register 0x14 AUTO_LEVEL_DISABLE (1 Byte)...................................................................... 23
Register 0x15 RF_ALC_MODE (1 Byte).................................................................................. 23
Register 0x16 RF_STANDBY (1 Byte) ..................................................................................... 24
Register 0x17 REFERENCE_MODE (1 Byte) ........................................................................... 24
Register 0x18 REFERENCE_DAC_VALUE (3 Bytes) ................................................................ 24
Register 0x1A DIRECT_ATTEN ............................................................................................... 24
Register 0x1B STORE_DEFAULT_STATE (1 Byte)................................................................... 25
Register 0x1C SELF_SYNTH_CAL (1 Byte).............................................................................. 25
Register 0x1D SENSOR_SETTING (3 Byte) ............................................................................. 25
Register 0x1E SENSOR_FREQUENCY (7 Byte)........................................................................ 26
Query Registers.............................................................................................................................. 26

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General Information
Register 0x20 GET_RF_PARAMETERS (1 Byte sent, 8 Bytes received) ................................. 27
Register 0x21 GET_TEMPERATURE (1 Byte, 8 Bytes)............................................................ 27
Register 0x22 GET_DEVICE_STATUS (1 Byte, 8 Bytes).......................................................... 28
Register 0x23 GET_DEVICE_INFO (1 Byte, 8 Bytes) .............................................................. 30
Register 0x24 GET_LIST_BUFFER (3 Bytes, 8 Bytes).............................................................. 31
Register 0x25 FETCH_DAC_VALUE (1 Byte, 8 Bytes) ............................................................ 31
Register 0x26 SERIAL_OUT_BUFFER ..................................................................................... 31
5Communication Interfaces .................................................................................................................... 33
Communication Data Format ........................................................................................................ 33
USB Interface ................................................................................................................................. 33
Control Transfer..................................................................................................................... 33
Bulk Transfer.......................................................................................................................... 33
SPI Interface ................................................................................................................................... 34
Writing the SPI Bus ................................................................................................................ 35
Reading the SPI Bus ............................................................................................................... 35
RS232 Interface.............................................................................................................................. 36
Writing to the Device Via RS232............................................................................................ 36
Reading from the Device Via RS232...................................................................................... 37
PXI .................................................................................................................................................. 37
Setting Up the PCI to Serial Bridge ........................................................................................ 37
Writing to the Device............................................................................................................. 38
Reading from the Device ....................................................................................................... 38
Revision Table ................................................................................................................................................ 39

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1General Information
Warranty
This product is warranted against defects in materials and workmanship for a period of one year from
the date of shipment. SignalCore will, at its option, repair or replace equipment that proves to be
defective during the warranty period. This warranty includes parts and labor.
Before any equipment will be accepted for warranty repair or replacement, a Return Material
Authorization (RMA) number must be obtained from a SignalCore customer service representative and
clearly marked on the outside of the return package. SignalCore will pay all shipping costs relating to
warranty repair or replacement.
SignalCore strives to make the information in this document as accurate as possible. The document has
been carefully reviewed for technical and typographic accuracy. If technical or typographical errors
exist, SignalCore reserves the right to make changes to subsequent editions of this document without
prior notice to possessors of this edition. Please contact SignalCore if errors are suspected. In no event
shall SignalCore be liable for any damages arising out of or related to this document or the information
contained in it.
EXCEPT AS SPECIFIED HEREIN, SIGNALCORE, INCORPORATED MAKES NO WARRANTIES, EXPRESS OR
IMPLIED, AND SPECIFICALLY DISCLAIMS ANY WARRANTY OF MERCHANTABILITY OR FITNESS FOR A
PARTICULAR PURPOSE. CUSTOMER’S RIGHT TO RECOVER DAMAGES CAUSED BY FAULT OR NEGLIGENCE
ON THE PART OF SIGNALCORE, INCORPORATED SHALL BE LIMITED TO THE AMOUNT THERETOFORE
PAID BY THE CUSTOMER. SIGNALCORE, INCORPORATED WILL NOT BE LIABLE FOR DAMAGES RESULTING
FROM LOSS OF DATA, PROFITS, USE OF PRODUCTS, OR INCIDENTAL OR CONSEQUENTIAL DAMAGES,
EVEN IF ADVISED OF THE POSSIBILITY THEREOF. This limitation of the liability of SignalCore, Incorporated
will apply regardless of the form of action, whether in contract or tort, including negligence. Any action
against SignalCore, Incorporated must be brought within one year after the cause of action accrues.
SignalCore, Incorporated shall not be liable for any delay in performance due to causes beyond its
reasonable control. The warranty provided herein does not cover damages, defects, malfunctions, or
service failures caused by owner’s failure to follow SignalCore, Incorporated’s installation, operation, or
maintenance instructions; owner’s modification of the product; owner’s abuse, misuse, or negligent
acts; and power failure or surges, fire, flood, accident, actions of third parties, or other events outside
reasonable control.
Copyright & Trademarks
Under the copyright laws, this publication may not be reproduced or transmitted in any form, electronic
or mechanical, including photocopying, recording, storing in an information retrieval system, or
translating, in whole or in part, without the prior written consent of SignalCore, Incorporated.
SignalCore, Incorporated respects the intellectual property rights of others, and we ask those who use
our products to do the same. Copyright and other intellectual property laws protect our products. Use
of SignalCore products is restricted to applications that do not infringe on the intellectual property rights
of others.

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General Information
“SignalCore”, “signalcore.com”, and the phrase “preserving signal integrity” are registered trademarks
of SignalCore, Incorporated. Other product and company names mentioned herein are trademarks or
trade names of their respective companies.
International Materials Declarations
SignalCore, Incorporated uses a fully RoHS compliant manufacturing process for our products.
Therefore, SignalCore hereby declares that its products do not contain restricted materials as defined
by European Union directive 2002/95/EC (EU RoHS) in any amounts higher than limits stated in the
directive. This statement assumes reliable information and data provided by our component suppliers
and may not have been independently verified through other means. For products sold into China, we
also comply with the “Administrative Measure on the Control of Pollution Caused by Electronic
Information Products” (China RoHS). In the current stage of this legislation, the content of six hazardous
materials must be explicitly declared. Each of those materials, and the categorical amount present in
our products, are shown below:
鉛
Lead
(Pb)
汞
Mercury
(Hg)
镉
Cadmium
(Cd)
六价铬
Hexavalent
Chromium
(Cr(VI))
多溴联苯
Polybrominated
biphenyls
(PBB)
多溴二苯醚
Polybrominated
diphenyl ethers
(PBDE)
✓
✓
✓
✓
✓
✓
A ✓indicates that the hazardous substance contained in all of the homogeneous materials for this
product is below the limit requirement in SJ/T11363-2006. An Xindicates that the particular hazardous
substance contained in at least one of the homogeneous materials used for this product is above the
limit requirement in SJ/T11363-2006.
CE European Union EMC & Safety Compliance Declaration
The European Conformity (CE) marking is affixed to products with input of 50 - 1,000 Vac or 75 - 1,500
Vdc and/or for products which may cause or be affected by electromagnetic disturbance. The CE
marking symbolizes conformity of the product with the applicable requirements. CE compliance is a
manufacturer’s self-declaration allowing products to circulate freely within the European Union (EU).
SignalCore products meet the essential requirements of Directives 2004/108/EC (EMC) and 2006/95/EC
(product safety) and comply with the relevant standards. Standards for Measurement, Control and
Laboratory Equipment include EN 61326 and EN 55011 for EMC, and EN 61010-1 for product safety.
Warnings Regarding Use of SignalCore Products
(1)
PRODUCTS FOR SALE BY SIGNALCORE, INCORPORATED ARE NOT DESIGNED WITH COMPONENTS NOR TESTED
FOR A LEVEL OF RELIABILITY SUITABLE FOR USE IN OR IN CONNECTION WITH SURGICAL IMPLANTS OR AS
CRITICAL COMPONENTS IN ANY LIFE SUPPORT SYSTEMS WHOSE FAILURE TO PERFORM CAN REASONABLY BE
EXPECTED TO CAUSE SIGNIFICANT INJURY TO A HUMAN.

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(2)
IN ANY APPLICATION, INCLUDING THE ABOVE, RELIABILITY OF OPERATION OF THE SOFTWARE PRODUCTS CAN
BE IMPAIRED BY ADVERSE FACTORS, INCLUDING BUT NOT LIMITED TO FLUCTUATIONS IN ELECTRICAL POWER
SUPPLY, COMPUTER HARDWARE MALFUNCTIONS, COMPUTER OPERATING SYSTEM SOFTWARE FITNESS,
FITNESS OF COMPILERS AND DEVELOPMENT SOFTWARE USED TO DEVELOP AN APPLICATION, INSTALLATION
ERRORS, SOFTWARE AND HARDWARE COMPATIBILITY PROBLEMS, MALFUNCTIONS OR FAILURES OF
ELECTRONIC MONITORING OR CONTROL DEVICES, TRANSIENT FAILURES OF ELECTRONIC SYSTEMS
(HARDWARE AND/OR SOFTWARE), UNANTICIPATED USES OR MISUSES, OR ERRORS ON THE PART OF THE USER
OR APPLICATIONS DESIGNER (ADVERSE FACTORS SUCH AS THESE ARE HEREAFTER COLLECTIVELY TERMED
“SYSTEM FAILURES”). ANY APPLICATION WHERE A SYSTEM FAILURE WOULD CREATE A RISK OF HARM TO
PROPERTY OR PERSONS (INCLUDING THE RISK OF BODILY INJURY AND DEATH) SHOULD NOT BE SOLELY
RELIANT UPON ANY ONE COMPONENT DUE TO THE RISK OF SYSTEM FAILURE. TO AVOID DAMAGE, INJURY,
OR DEATH, THE USER OR APPLICATION DESIGNER MUST TAKE REASONABLY PRUDENT STEPS TO PROTECT
AGAINST SYSTEM FAILURES, INCLUDING BUT NOT LIMITED TO BACK-UP OR SHUT DOWN MECHANISMS.
BECAUSE EACH END-USER SYSTEM IS CUSTOMIZED AND DIFFERS FROM SIGNALCORE'S TESTING PLATFORMS,
AND BECAUSE A USER OR APPLICATION DESIGNER MAY USE SIGNALCORE PRODUCTS IN COMBINATION WITH
OTHER PRODUCTS IN A MANNER NOT EVALUATED OR CONTEMPLATED BY SIGNALCORE, THE USER OR
APPLICATION DESIGNER IS ULTIMATELY RESPONSIBLE FOR VERIFYING AND VALIDATING THE SUITABILITY OF
SIGNALCORE PRODUCTS WHENEVER SIGNALCORE PRODUCTS ARE INCORPORATED IN A SYSTEM OR
APPLICATION, INCLUDING, WITHOUT LIMITATION, THE APPROPRIATE DESIGN, PROCESS AND SAFETY LEVEL
OF SUCH SYSTEM OR APPLICATION.
2Physical Description
Unpacking
All SignalCore products ship in antistatic packaging (bags) to prevent damage from electrostatic discharge
(ESD). Under certain conditions, an ESD event can instantly and permanently damage several of the
components found in SignalCore products. Therefore, to avoid damage when handling any SignalCore
hardware, you must take the following precautions:
1. Ground yourself using a grounding strap or by touching a grounded metal object.
2. Touch the antistatic bag to a grounded metal object before removing the hardware from
its packaging.
3. NEVER touch exposed signal pins. Due to the inherent performance degradation caused
by ESD protection circuits in the RF path, the device has minimal ESD protection against
direct injection of ESD into the RF signal pins.
4. When not in use, store all SignalCore products in their original antistatic bags.
Remove the product from its packaging and inspect it for loose components or any signs of damage. Notify
SignalCore immediately if the product appears damaged in any way.
Nomenclature
The name “PSG” shall be used in this document in reference to both the SC5507A and SC5508A, unless
the context requires using SC5507A or Sc5508A explicitly. The SC5507A is a PXIe platform module while
the SC5508A is a USB/Serial platform module.

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Physical Description
Setting Up and Configuring the PSG Device
Integration of the PSG modules requires attention to maintain effective cooling. Inadequate cooling can
cause the temperature inside the RF housing to rise above the maximum for this product, leading to
improper performance, reduction of product lifespan or complete product failure. SignalCore suggests
providing either moderate airflow across the RF housing, or if active cooling is not an option, using thermal
interface materials to bond the RF housing to a larger heatsinking surface (i.e. a system enclosure). As each
system configuration into which the device is integrated is unique, detailed cooling options cannot be
provided.
A cooling plan is sufficient when the SC5507A and SC5508A on-board temperature sensors indicate a rise
of no more than 20°C above ambient temperature under normal operating conditions.
Front Interface Indicators and Connectors
The SC5507A is a PXIe-based RF signal source with all RF connectors located on the front face of the
module. Its control I/O is via the back PXIe interface connectors. The SC5508A is a serial controlled core
module, whose RF and I/O connectors are located at the front face as shown in Figure 1. Front face
interfaces and indicators are explained below.
Signal Connections
All signal connections (ports) on the device are female SMA-type. Exercise caution when fastening cables
to the signal connections. Over-tightening any connection can cause permanent damage to the device.
The condition of your system signal connections can significantly affect measurement accuracy and
repeatability. Improperly mated connections or dirty, damaged, or worn connectors can degrade
measurement performance. Clean out any loose, dry debris from connectors with clean, low-
pressure air (available in spray cans from office supply stores).
If deeper cleaning is necessary, use lint-free swabs and isopropyl alcohol to gently clean inside the
connector barrel and the external threads. Do not mate connectors until the alcohol has completely
evaporated. Excess liquid alcohol trapped inside the connector may take several days to fully
evaporate and may degrade measurement performance until fully evaporated.
Tighten all SMA connections to 5 in-lb max (56 N-cm max)
Figure 1. Front view of SC5508A

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RF Out
This port outputs the tunable RF signal of the source. The
connector is SMA female. The nominal output impedance is 50
Ωand is DC coupled.
Sensor In
This port is an input to the power sensor. The connector is SMA
female. The nominal output impedance is 50 Ω and is AC
coupled.
Ref Out
This port outputs the internal 10 MHz or 100 MHz reference
clock. The connector is SMA female. This port is AC-coupled
with a nominal output impedance of 50 Ω.
Ref In
This port accepts an external 10 MHz reference signal, allowing
an external source to synchronize to the internal reference
clock. The connector is SMA female. This port is AC-coupled
with a nominal input impedance of 50 Ω.
Device LED Indicators
There are both status and active LED indicator lights for the device, and their functions are listed in Table
1and Table 2. The active LED indicator lights are user programmable (see register map).
Table 1. Status LED Indicator
LED Color
Description
Green
The device is functioning properly in the state that it is programmed for.
Orange
Channel powered down or port is disabled
Red
Indicates that one or more local oscillators are not functioning correctly.
Off
No supply or supply error
Table 2. Active LED Indicator (User Programmable)
LED Color
Description
Green
Device is open
Red
Supply fault due to possible overvoltage
Off
Device is closed (off)
Communication and Supply Connection
Figure 2. Power and Digital IO Connector

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Physical Description
Power and communication to the modules is provided through a rectangular connector from Samtec
whose part number is TFM-115-01-L-D-RA. It also serves as the digital connector interface for RS232/SPI,
trigger, and other digital signals. The pin definitions are listed in Table 3.
Pinouts are different for different SignalCore products with the same connector type. Please ensure
that mating connectors and cables are wired correctly before connection.
Table 3. Interface connector pin out description
PIN #
SPI Function
RS-232 Function
24
MISO
TxD
28
-
-
27
MOSI
RxD
26
CS_B
-
25
SERIAL READY
-
30
CLK
-
16
SPI MODE
BAUD SELECT
14
Device Reset_B
18
Pulse switch control
22
Used Input
21
Trigger in
20
Trigger out
19
RF1 PLL Status
17
Do not connect
2, 4, 6, 8
+Supply (+12V typ, max +16V)
1, 3, 5, 11, 15, 23, 29
GND
7, 9, 10, 12, 13
Not internally connected
Mini-USB Connection
The SC5508A uses a mini-USB Type B connector for USB communication with the device using the
standard USB 2.0 protocol (full speed) found on most host computers. The pinout of this connector,
viewed from the front, is shown in the following table.

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Table 4. Pinout of the SC5508A USB communication connector.
PIN #
USB Function
Description
1
VBUS
Vcc (+5 Volts)
2
D-
Serial Data (neg)
3
D+
Serial Data (pos)
4
ID
Not Used
5
GND
Device Ground (also tied to connector shell)
Reset Button (Pin Hole)
Behind this pin hole is the reset button that’s only available on the SC5508A. Using a pin to lightly depress
this momentary-action push button switch will cause a hard reset to the device, putting it back to its
default settings. All user settings will be lost. System reset capability can also be accessed through the
communication header connector.
3Theory and Operation
The PSG is an instrument-grade, high performance synthesizer with easy to program register-level
control. It functions as a standard synthesized CW source with the added capability of a sweep/list mode
that makes it ideal for applications ranging from automated test systems to telecommunication
equipment to scientific research labs. Being small and modular, it is the ideal solution for system
integration applications that require a high performance RF source. In addition, it could be used as a
general-purpose lab source. Figure 3 shows the block diagram of the device, and the following sub-
sections provide details of its operation.
Figure 3. PSG block diagram
N
Fine Step
Gen
REF
IN
REF
OUT
RF
OUT
2.9GHz
GHz
Sum Gen
Harmonic
Coarse
Step Gen
DC-
50MHz
Gen
SENSOR
IN
VCXO
10
OCXO
25 MHz to 6.25GHz path
ALC
controller
Filter
Bank
ADC
0
1ADC
RMS
ENV
DC to 50 MHz path
VVA
VVA
60 dB
DSA
32 dB
DSA
HF ALC
DAC
LF
DAC
FracN
Coarse
Step Gen

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Theory and Operation
RF Generation
The PSG is a true DC to 6 GHz low phase noise, low harmonics, and low spur synthesizer that uses a
hybrid synthesizer architecture comprising of phase lock loops, harmonic generation, and DDS functions.
Coarse tuning is accomplished by PLL and harmonic generators, while fine tuning is accomplished with
the variable modulus DDS, providing exact frequency generation with resolution of 1 mHz. Isolation
between the internal oscillators, their mixed IF products, harmonics, and inter-modulation products is
accomplished by internal EMI sealed cavities, resulting in improved overall phase noise performance and
reduction of spurious signal content of this compact size frequency synthesizer. Synthesized signals
reference an internal 10 MHz OCXO clock, or an external 10 MHz reference.
Amplitude Control
The output level of the PSG is controlled through an automatic leveling control (ALC) circuitry. The ALC
can operate in close or open loop. The advantages of the close loop over the open loop operation are
that the power levels are more stable and accurate. The disadvantage of the close loop is that it increases
the AM noise of the carrier sideband. Although this AM noise is typically lower than the phase noise, it
may have impact on some applications. In such applications, it is best to operate the ALC in open loop.
Fine amplitude adjusts can be made by changing the ALC DAC value. Additionally, the ALC can be disabled
and output level can be adjusted manually using the RF attenuators. Disabling the ALC further improves
the AM noise because the internal voltage-variable attenuator is turned off, removing control voltage
noise to amplitude noise conversion.
Computational Time
The ALC control is accomplished by controlling the ALC DAC and the output step attenuator. The settings
of these two components are dynamically calculated based on the level required and a large set of
calibration values. Similarly, to change frequency would require four phase lock loops to be programmed
and their settings are dynamically calculated based on a set of calibration values. Due to the calculations
involved, computational time to set frequency change is typically 250 µs, and about 350 µs to compute
and set up the ALC.
For faster frequency changes, especially for sweeps less than a couple of 100 MHz, it is recommended
that the automatic leveling of the power be turned off. This will prevent the PSG from having to compute
a fresh set of the ALC parameters at each frequency point. Typically, the un-calibrated power level does
not change by more than a couple of dB over a 100 MHz range. See device register 0x14 for details on
turning on and off this automatic leveling feature.
RF Power Sensor
The RF power sensor frequency response is from 10 MHz to 6 GHz. Its amplitude response is -25 dBm to
20 dBm. The sensor may be used in transfer measurement applications….

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Internal EEPROM
The PSG contains an EEPROM whose memory space is divided into calibration and operating data spaces.
The calibration data space contains device information such as serial number, hardware revision,
firmware revision, and production date. In addition, this space holds the calibration data for frequency
tuning and amplitude control. The operating data space contains the default startup configuration of the
device such as the single fixed tone mode frequency and sweep/list mode operation. It also holds the list
mode configuration parameters such as sweep behavior (saw or triangular waveform), software or
hardware trigger, start/stop/step frequencies, dwell time, sweep/list cycles, etc. Space is allocated for
2048 frequency points and 2048 corresponding amplitude points that the user may choose to store for
list mode operation. The internal EEPROM is not accessible for users to store data.
Modes of RF Generation
The PSG has both single fixed tone and list mode operation in frequency generation. In single fixed tone
mode, it operates as a normal synthesizer where the user writes the frequency (RF_FREQUENCY) register
to change the frequency. In list mode, the device is triggered to automatically run through a set of
frequency points that are either entered directly by the user or pre-computed by the device based on
user parameters. Configuration of the device for list mode operation is accomplished by setting up the
LIST_MODE_CONFIG register.
Sweep Function
When frequency points are generated based on the start/stop/step set of frequencies, this is (in the
context of this product) known as putting the device into sweep. When the sweep function is enabled,
the frequency points are incrementally stepped with a constant step size either in a linearly increasing or
linearly decreasing fashion.
List Function
The list function requires that the frequency points are read in from a list provided by the user. The user
will need to load the frequency points into the list buffer via the LIST_BUFFER_WRITE register, or have the
device read the frequency points from the EEPROM into it.
Sweep Direction
The sweep can be chosen to start at the beginning of a list and incrementally step to the end of the list or
vice versa.
Sweep Waveform
The list of frequency points may be swept in a sawtooth manner or triangular manner. If sawtooth is
selected, upon reaching the last frequency point the device returns back to the starting point. Plotting
frequency versus time reveals a sawtooth pattern. If triangular is selected, the device will sweep linearly
from the starting point, then reverse its direction after the last (highest or lowest) frequency and sweep
backwards toward the start point, mapping out a triangular waveform on a frequency versus time graph.

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Theory and Operation
Dwell Time
The dwell time at each frequency, in either sweep or list modes, is determined by writing to the
LIST_DWELL_TIME register. The dwell time step increment is 500 µs. However, the recommended
minimum dwell time is 1 ms, which allows sufficient time for the signal to settle before a measurement is
made. Due to the size limitation of the onboard RAM, it is not possible to have a pre-calculated
configuration parameters list that could be used to program the various functions of the device,
decreasing the setup time of the device for frequency change. As a result, for each frequency change the
configuration parameters are dynamically computed. This overhead computational time to handle the
mathematics, triggers, timers, and interrupts may increase the effective frequency settling time close to
500 µs. The amplitude computational time alone is close to 350 µs. If the sweep is over a narrow range, it
is best to disable the automatic power leveling feature, allowing faster frequency sweeps. By default,
whenever the frequency changes, the device re-computes a set of new parameters to set the ALC. Over
short range frequencies, the parameters are similar so the amplitude variation may be acceptable. If
automatic power leveling is turned on, allow for a minimal dwell time of 2-5 ms.
List Cycles
The number of repeat cycles for a sweep or list is set by writing the LIST_CYCLE_COUNT register. Writing
the value 0 to the register will cause the device to repeat the sweep/list forever until a trigger is sent or
the RF mode is changed to single fixed tone mode via the RF_MODE register. Upon completion of a cycle,
the frequency may be set to end on the last frequency point or return back to the starting point. This
cycle ending behavior is configured with bit [5] of the LIST_MODE_CONFIG register.
Trigger Sources
The device may be set up for software or hardware triggering. This is defined in bit [4] of the
LIST_MODE_CONFIG register. If software trigger is selected, writing the LIST_SOFT_TRIGGER register will
trigger the device to perform the sweep/list function defined in the LIST_MODE_CONFIG register. The
device may also be triggered via pin 21, the hardware trigger pin (TRIGIN). Hardware triggering occurs on
a high to low transition state of this pin. Note, hardware triggering is currently not available for the
SC5507A.
Hardware Trigger Modes
The device may be triggered to start a sweep or list then use the next trigger to stop it. In triggered
start/stop mode, alternating triggers will start and stop the sweep/list. In this mode, start triggering will
always return the frequency point to the beginning of the sweep/list. It does not continue from where it
left off from a stop trigger. The device may also be triggered to step to the next frequency with each start
trigger. This is known as the triggered step mode. Software triggering cannot perform the step trigger
function. This can only be done through hardware triggering. When hardware step triggering has started,
performing a software trigger or changing the RF mode to single fixed tone will take the device out of
step trigger state before a cycle is completed.
Trigger Out Modes
The device can be set to send out a high to low transition signal when the configuration of a frequency by
the device is completed; that is, it has completed all necessary computations, and has successfully written

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data to the appropriate components. This trigger pulse can be sent on the completion of every step
frequency or on the last frequency of a sweep cycle. This trigger signal is present on pin 20 (TRIGOUT).
Default Startup Mode
The factory power-up state for the device is detailed in the following table. The default state can be
changed to the current state of either channel programmatically, allowing the user to power up the
device in the last saved state without having to reprogram.
Table 5. Factory Default Power-Up State.
RF Out
Frequency
3 GHz
Power
0.00 dBm
RF Output
Enabled
ALC Mode
Closed Loop
Standby
Disabled
Auto Level
Enabled
Ref Out Select
10 MHz
Ext Ref Lock
Disabled
4Hardware Registers
Configuration Registers
These are write-only registers to configure the device. The registers vary in length to reduce redundant
data and improve the communication speed, especially for SPI and RS232 interfaces. Furthermore, it is
vitally important that the length of data written to a register is exact because failure to do so will cause
the interfaces to misinterpret the incoming data, leaving the device in a stalled state. The total number of
bytes is the sum of the register address (1 Byte) and its corresponding data bytes. For example, to set the
RF frequency value, eight bytes must be written; the sum of the 1 register byte and 7 data bytes. See the
RF_FREQUENCY register of Table 6. The table provides a summary of the configuration registers, and each
register is explained in detail in the sections following.
Table 6. Configuration Registers
Register Name
Register
Address
Serial
Range
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
INITIALIZE
0x01
[7:0]
Open
Open
Open
Open
Open
Open
Open
Mode
SYSTEM_ACTIVE
0x02
[7:0]
Open
Open
Open
Open
Open
Open
Open
Enable
‘active’
LED

©2019 Rev 1.0
15
Hardware Registers
Register Name
Register
Address
Serial
Range
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
SYNTH_MODE
0x03
[7:0]
Open
Open
Open
Open
Open
Disable
SS
Loop
gain
Lock
mode
RF_MODE
0x04
[7:0]
Open
Open
Open
Open
Open
Open
Open
Mode
LIST_MODE_CONFIG
0x05
[7:0]
Trig
out
mode
Trig
out
enable
Return
to start
Step
on
trigger
Hw
trigger
Saw /
Tri
wave
Sweep
dir
SSS-
mode
LIST_START_FREQ
0x06
[55:0]
Frequency Word (mHz) [55:0]
LIST_STOP_FREQ
0x07
[55:0]
Frequency Word (mHz) [55:0]
LIST_STEP_FREQ
0x08
[55:0]
Frequency Word (mHz) [55:0]
LIST_DWELL_TIME
0x09
[31:0]
Dwell Word[31:0]
[39:32]
Set to Zeros
LIST_CYCLE_COUNT
0x0A
[31:0]
Count Word[31:0]
[39:32]
Set to Zeros
RESERVED
0x0B
[7:0]
Open
Open
Open
Open
Open
Open
Open
Mode
LIST_BUFFER_POINTS
0x0C
[15:0]
Points Word [15:0]
[23:16]
Set to Zeros
LIST_BUFFER_WRITE
0x0D
[55:0]
Frequency Word (mHz) [55:0] See
LIST_BUF_MEM_XFER
0x0E
[7:0]
Open
Open
Open
Open
Open
Open
Open
Mode
LIST_SOFT_TRIGGER
0x0F
[7:0]
Open
Open
Open
Open
Open
Open
Open
Open
RF_FREQUENCY
0x10
[55:0]
Frequency Word (mHz) [55:0]
RF_LEVEL
0x11
[7:0]
RF Power Word [7:0] in 100th dB
[15:0]
Sign Bit
RF Power Word [14:8] in 100th dB
[23:16]
Set to Zeros
RF_OUT_ENABLE
0x12
[7:0]
Open
Open
Open
Open
Open
Open
Open
Mode
RF_PHASE
0x13
[23:0]
RF_PHASE Word [23:0] (in 100th of deg)
[31:24]
Zero
RF_PHASE Word [30:24] (in 100th of deg)
AUTO_LEVEL_DISABLE
0x14
[7:0]
Open
Open
Open
Open
Open
Open
Open
Mode
RF_ALC_MODE
0x15
[7:0]
Open
Open
Open
Open
Open
Open
Open
Mode
RF_STANDBY
0x16
[7:0]
Open
Open
Open
Open
Open
Open
Open
Mode
REFERENCE_MODE
0x17
[7:0]
Open
Open
Open
Open
Open
Open
Ref
Out
Select
Lock
Enable
REFERENCE_DAC_SETTING
0x18
[7:0]
DAC Word [7:0]
[15:8]
Open
Open
DAC Word [13:8]
[23:16]
Zeros
ALC_DAC_VALUE
0x19
[7:0]
DAC Word [7:0]
[15:8]
Open
Open
DAC Word [13:8]
[23:16]
Zeros
DIRECT_ATTEN_CNTRL
0x1A
[7:0]
32
16 (dB)
8
4
2
1
.5
0.25
[15:8]
[15:9] Zeros
Atten
Select
[23:16]
Zeros
STORE_DEFAULT_STATE
0x1B
[7:0]
Open
Open
Open
Open
Open
Open
Open
Open
SELF_SYTHN_CAL
0x1C
[7:0]
Open
Open
Open
Open
Open
Open
Open
Select
Synth

Rev 1.0 | SC5507A & SC5508A Hardware Manual SignalCore, Inc.
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SC5507A & SC5508A Hardware Manual
Register Name
Register
Address
Serial
Range
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
SENSOR SETTING
0x1D
[7:0]
Open
Open
Open
Open
Open
Open
Open
Open
SENSOR FREQ
0x1E
[55:0]
Open
Open
Open
Open
Open
Open
Open
Open
RESERVED
0x1F
[7:0]
Each register from the table above is explained in detail in the following subsections.
Register 0x01 INITIALIZE (1 Byte)
This register allows the user to re-initialize the device with current settings or to the power up state.
Bit
Type
Name
Width
Description
[0]
WO
Mode
1
0 = Re-initialize device with current settings
1 = Re-initialize device to power up state
[7:1]
WO
Unused
7
Set all bits to zero
Register 0x02 SET_SYS_ACTIVE (1 Byte)
This register turns on or off the active LED indicator on the front connector interface of the device. This
register should be called when the device is opened or closed in software.
Bit
Type
Name
Width
Description
[0]
WO
Mode
1
0 = turns off the active LED
1 = turns on the active LED
[7:1]
WO
Unused
7
Set all bits to zero
Register 0x03 SYNTH_MODE (1 Byte)
This register configures the PLL loop gain of the local oscillator synthesizers. It also enables or disables
faster tuning of the YIG based oscillator of LO1.
Bit
Type
Name
Width
Description
[0]
WO
Lock Mode
2
0 = harmonic offset mode
1 = fracN PLL offset mode
[1]
WO
Loop Gain
2
0 = Normal loop gain for better close in phase
noise
1 = Low loop gain for better far out phase noise
and spur suppression
[2]
WO
Disable spur
suppression
1
Only applies in harmonic offset mode, see bit [0].

©2019 Rev 1.0
17
Hardware Registers
Bit
Type
Name
Width
Description
0 = The device automatically switches to fracN
offset mode to avoid potentially large spurs due
to intermodulation between the carrier and the
harmonics of the reference clock.
1 = This disables the function and may speed up
tuning speed in some cases
[3]
WO
Force low path
1
0 = Use lower frequency generator for
frequencies < 25 MHz
1 = Use lower frequency generator for
frequencies ≤50 MHz
[4]
WO
Unused
1
0 = set the phase of signal to 0 of Cos(x)
1 = phase continues from last non-DC CW signal
(only for previous frequency < 50 MHz from low
frequency generator)
[7:5]
WO
Unused
3
Set all bits to zero
Register 0x04 RF_MODE (1 Byte)
This register controls the single fixed tone mode and sweep / list mode.
Bit
Type
Name
Width
Description
[0]
WO
RF Mode
1
0 = Single fixed tone mode. This mode must be
set to change the frequency value via register
0x1A
1 = Sweep / list mode. In this mode, writing to
register 0x10 will be unresponsive. This register
must be called first for sweep / list triggering to
function
[7:1]
WO
Unused
7
Set all bits to zero

Rev 1.0 | SC5507A & SC5508A Hardware Manual SignalCore, Inc.
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SC5507A & SC5508A Hardware Manual
Register 0x05 LIST_MODE_CONFIG (1 Byte)
This register controls the list mode configurations.
Bit
Type
Name
Width
Description
[0]
WO
SSS Mode
1
0 = List mode. Device gets its frequency points
from the list buffer uploaded via the
LIST_BUFFER_WRITE register (0x0D).
1 = Sweep mode. The device computes the
frequency points using the Start, Stop, and Step
frequencies.
[1]
WO
Sweep Direction
1
0 = Forward. In the forward direction, the sweeps
start from either the lowest start frequency or
the beginning of the list buffer.
1 = Reverse. In the reverse direction, the sweep
starts with the stop frequency and steps down
toward the start frequency or starts at the end
and steps toward the beginning of the buffer.
[2]
WO
Triangular
Waveform
1
0 = Sawtooth waveform. Frequency returns to
the beginning frequency upon reaching the end
of a sweep cycle.
1 = Triangular waveform. Frequency reverses
direction at the end of the list and steps back
towards the beginning to complete a cycle.
[3]
WO
Soft/Hardware
Trigger
1
0 = Software trigger. Software trigger can only be
used to start and stop a sweep/list cycle. It does
not work for step-on-trigger mode.
1 = Hardware trigger. A high-to-low transition on
the TRIGIN pin will trigger the device. It can be
used for both start/stop or step-on-trigger
functions

©2019 Rev 1.0
19
Hardware Registers
Bit
Type
Name
Width
Description
[4]
WO
Step on Trigger
1
0 = Start/Stop behavior. The sweep starts and
continues to step through the list for the number
of cycles set, dwelling at each step frequency for
a period set by the LIST_DWELL_TIME register.
The sweep/list will end on a consecutive trigger.
1 = Step-on-trigger. This is only available if
hardware triggering is selected. The device will
step to the next frequency on a trigger. Upon
completion of the number of cycles (set by the
LIST_CYCLE_COUNT register), the device will exit
from the stepping state and stop. Further
triggering will set the device back into the
stepping state. To exit the stepping state and
stop before reaching the end of a cycle, a
software trigger must be sent or a change in the
RF mode to single fixed tone needs to be made.
[5]
WO
Return to Start
1
0 = Stop at end of sweep/list. The frequency will
stop at the last point of the sweep/list.
1 = Return to start. The frequency will return and
stop at the beginning point of the sweep or list
after a cycle.
[6]
WO
Trigger Output
1
0 = No trigger output.
1 = Puts a trigger pulse on the TRIGOUT pin
[7]
WO
Trigger Out Mode
1
0 = Puts out a trigger pulse at each frequency
change, right after all internal devices are
configured.
1 = Puts out a trigger pulse at the completion of
each sweep/list cycle.
Register 0x06 LIST_START_FREQ (7 Bytes)
This register sets the start frequency for a sweep.
Bit
Type
Name
Width
Description
[55:0]
WO
List Start
Frequency
56
Sets the start frequency for a sweep. Start
frequency should always be lower than the stop
frequency. The Sweep Direction bit [1] of register
0x05 should be used to determine where the
sweep should begin.
This manual suits for next models
1
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