SONiX TECHNOLOGY CO. SN8F2271B User manual

SN8F2270B Series
USB 2.0 Low-Speed 8-Bit Micro-Controller
SONiX TECHNOLOGY CO., LTD Page 1 Version1.3
SN8F2270B Series
USER’S MANUAL
SN8F2271B
SN8F22711B
SN8F22721B
S
SO ON Ni iX X 8 8- -B Bi it t M Mi ic cr ro o- -C Co on nt tr ro ol ll le er r
SONIX reserves the right to make change without further notice to any products herein to improve reliability, function or design. SONIX does not
assume any liability arising out of the application or use of any product or circuit described herein; neither does it convey any license under its patent
rights nor the rights of others. SONIX products are not designed, intended, or authorized for us as components in systems intended, for surgical
implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SONIX product
could create a situation where personal injury or death may occur. Should Buyer purchase or use SONIX products for any such unintended or
unauthorized application. Buyer shall indemnify and hold SONIX and its officers, employees, subsidiaries, affiliates and distributors harmless against
all claims, cost, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use even if such claim alleges that SONIX was negligent regarding the design or manufacture of
the part.

SN8F2270B Series
USB 2.0 Low-Speed 8-Bit Micro-Controller
SONiX TECHNOLOGY CO., LTD Page 2 Version1.3
AMENDMENT HISTORY
Version Date Description
VER1.0 2009/3/23 version 1.0
VER1.1 2009/6/17 Modify SN8F22721S/X/K to SN8F22721S/X/P
VER1.2 2009/7/9 Modify PWM output pin to p5.3.
VER1.3 2010/3/3 1. Add UE1D at UE1R
2. Add UE2D at UE2R
3. Add UE0E at UPID
4. Add EP0_IN_STALL at IHRCU
5. Add EP0_OUT_STALL at IHRCL

SN8F2270B Series
USB 2.0 Low-Speed 8-Bit Micro-Controller
SONiX TECHNOLOGY CO., LTD Page 3 Version1.3
Table of Content
AMENDMENT HISTORY.......................................................................................................................... 2
1PRODUCT OVERVIEW......................................................................................................................... 8
1.1 FEATURES.............................................................................................................................................. 8
1.2 SYSTEM BLOCK DIAGRAM ................................................................................................................ 9
1.3 PIN ASSIGNMENT ............................................................................................................................... 10
1.4 PIN DESCRIPTIONS............................................................................................................................. 11
1.5 PIN CIRCUIT DIAGRAMS................................................................................................................... 12
2CENTRAL PROCESSOR UNIT (CPU) .............................................................................................. 13
2.1 MEMORY MAP..................................................................................................................................... 13
2.1.1 PROGRAM MEMORY (ROM) ........................................................................................................ 13
2.1.1.1 RESET VECTOR (0000H) ...................................................................................................... 14
2.1.1.2 INTERRUPT VECTOR (0008H)............................................................................................. 15
2.1.1.3 LOOK-UP TABLE DESCRIPTION........................................................................................ 17
2.1.1.4 JUMP TABLE DESCRIPTION............................................................................................... 19
2.1.1.5 CHECKSUM CALCULATION .............................................................................................. 21
2.1.2 CODE OPTION TABLE.................................................................................................................. 22
2.1.3 DATA MEMORY (RAM).................................................................................................................. 23
2.1.4 SYSTEM REGISTER........................................................................................................................ 24
2.1.4.1 SYSTEM REGISTER TABLE ................................................................................................ 24
2.1.4.2 SYSTEM REGISTER DESCRIPTION ................................................................................... 24
2.1.4.3 BIT DEFINITION of SYSTEM REGISTER........................................................................... 25
2.1.4.4 ACCUMULATOR ................................................................................................................... 27
2.1.4.5 PROGRAM FLAG................................................................................................................... 28
2.1.4.6 PROGRAM COUNTER .......................................................................................................... 29
2.1.4.7 Y, Z REGISTERS .................................................................................................................... 32
2.1.4.8 R REGISTERS......................................................................................................................... 33
2.2 ADDRESSING MODE .......................................................................................................................... 34
2.2.1 IMMEDIATE ADDRESSING MODE.............................................................................................. 34
2.2.2 DIRECTLY ADDRESSING MODE................................................................................................. 34
2.2.3 INDIRECTLY ADDRESSING MODE............................................................................................. 34
2.3 STACK OPERATION............................................................................................................................ 35
2.3.1 OVERVIEW ..................................................................................................................................... 35
2.3.2 STACK REGISTERS........................................................................................................................ 36
2.3.3 STACK OPERATION EXAMPLE.................................................................................................... 37
3RESET..................................................................................................................................................... 38

SN8F2270B Series
USB 2.0 Low-Speed 8-Bit Micro-Controller
SONiX TECHNOLOGY CO., LTD Page 4 Version1.3
3.1 OVERVIEW........................................................................................................................................... 38
3.2 POWER ON RESET............................................................................................................................... 40
3.3 WATCHDOG RESET............................................................................................................................ 40
3.4 BROWN OUT RESET ........................................................................................................................... 41
3.4.1 BROWN OUT DESCRIPTION........................................................................................................ 41
3.4.2 THE SYSTEM OPERATING VOLTAGE DECSRIPTION............................................................... 42
3.4.3 BROWN OUT RESET IMPROVEMENT......................................................................................... 43
3.5 EXTERNAL RESET .............................................................................................................................. 44
3.6 EXTERNAL RESET CIRCUIT ............................................................................................................. 44
3.6.1 Simply RC Reset Circuit.................................................................................................................. 44
3.6.2 Diode & RC Reset Circuit............................................................................................................... 45
3.6.3 Zener Diode Reset Circuit............................................................................................................... 45
3.6.4 Voltage Bias Reset Circuit............................................................................................................... 46
3.6.5 External Reset IC............................................................................................................................. 46
4SYSTEM CLOCK.................................................................................................................................. 47
4.1 OVERVIEW........................................................................................................................................... 47
4.2 CLOCK BLOCK DIAGRAM................................................................................................................. 47
4.3 OSCM REGISTER................................................................................................................................. 48
4.4 SYSTEM HIGH CLOCK ....................................................................................................................... 49
4.4.1 INTERNAL HIGH RC...................................................................................................................... 49
4.5 SYSTEM LOW CLOCK ........................................................................................................................ 49
4.5.1 SYSTEM CLOCK MEASUREMENT............................................................................................... 50
5SYSTEM OPERATION MODE........................................................................................................... 51
5.1 OVERVIEW........................................................................................................................................... 51
5.2 SYSTEM MODE SWITCHING EXAMPLE......................................................................................... 52
5.3 WAKEUP ............................................................................................................................................... 54
5.3.1 OVERVIEW ..................................................................................................................................... 54
5.3.2 WAKEUP TIME............................................................................................................................... 54
6INTERRUPT........................................................................................................................................... 55
6.1 OVERVIEW........................................................................................................................................... 55
6.2 INTEN INTERRUPT ENABLE REGISTER......................................................................................... 56
6.3 INTRQ INTERRUPT REQUEST REGISTER....................................................................................... 56
6.4 GIE GLOBAL INTERRUPT OPERATION .......................................................................................... 57
6.5 PUSH, POP ROUTINE........................................................................................................................... 57
6.6 INT0 (P0.0) &INT1 (P0.1) INTERRUPT OPERATION....................................................................... 59
6.7 T0 INTERRUPT OPERATION.............................................................................................................. 61
6.8 TC0 INTERRUPT OPERATION........................................................................................................... 62
6.9 USB INTERRUPT OPERATION .......................................................................................................... 63

SN8F2270B Series
USB 2.0 Low-Speed 8-Bit Micro-Controller
SONiX TECHNOLOGY CO., LTD Page 5 Version1.3
6.10 WAKEUP INTERRUPT OPERATION............................................................................................... 64
6.11 SIO INTERRUPT OPERATION.......................................................................................................... 65
6.12 MULTI-INTERRUPT OPERATION................................................................................................... 66
7I/O PORT................................................................................................................................................ 67
7.1 I/O PORT MODE ................................................................................................................................... 67
7.2 I/O PULL UP REGISTER ...................................................................................................................... 68
7.3 I/O PORT DATA REGISTER ................................................................................................................ 69
7.4 I/O PORT1 WAKEUP CONTROL REGISTER..................................................................................... 70
8TIMERS .................................................................................................................................................. 71
8.1 WATCHDOG TIMER............................................................................................................................ 71
8.2 TIMER 0(T0)......................................................................................................................................... 73
8.2.1 OVERVIEW ..................................................................................................................................... 73
8.2.2 T0M MODE REGISTER.................................................................................................................. 73
8.2.3 T0C COUNTING REGISTER.......................................................................................................... 74
8.2.4 T0 TIMER OPERATION SEQUENCE............................................................................................ 75
8.3 TIMER/COUNTER 0(TC0)................................................................................................................... 76
8.3.1 OVERVIEW ..................................................................................................................................... 76
8.3.2 TC0M MODE REGISTER............................................................................................................... 77
8.3.3 TC0C COUNTING REGISTER....................................................................................................... 78
8.3.4 TC0R AUTO-LOAD REGISTER ..................................................................................................... 79
8.3.5 TC0 CLOCK FREQUENCY OUTPUT (BUZZER)......................................................................... 80
8.3.6 TC0 TIMER OPERATION SEQUENCE ......................................................................................... 81
8.4 PWM0 MODE ........................................................................................................................................ 82
8.4.1 OVERVIEW ..................................................................................................................................... 82
8.4.2 TCxIRQ and PWM Duty.................................................................................................................. 83
8.4.3 PWM Duty with TCxR Changing..................................................................................................... 84
8.4.4 PWM PROGRAM EXAMPLE ......................................................................................................... 85
9UNIVERSAL SERIAL BUS (USB) ...................................................................................................... 86
9.1 OVERVIEW........................................................................................................................................... 86
9.2 USB MACHINE..................................................................................................................................... 86
9.3 USB INTERRUPT.................................................................................................................................. 87
9.4 USB ENUMERATION .......................................................................................................................... 87
9.5 USB REGISTERS .................................................................................................................................. 88
9.5.1 USB DEVICE ADDRESS REGISTER ............................................................................................. 88
9.5.2 USB STATUS REGISTER................................................................................................................ 88
9.5.3 USB DATA COUNT REGISTER ..................................................................................................... 89
9.5.4 USB ENABLE CONTROL REGISTER............................................................................................ 89
9.5.5 USB endpoint’s ACK handshaking flag REGISTER ....................................................................... 90

SN8F2270B Series
USB 2.0 Low-Speed 8-Bit Micro-Controller
SONiX TECHNOLOGY CO., LTD Page 6 Version1.3
9.5.6 USB endpoint’s NAK handshaking flag REGISTER ....................................................................... 90
9.5.7 USB ENDPOINT 0 ENABLE REGISTER ....................................................................................... 90
9.5.8 USB ENDPOINT 1 ENABLE REGISTER ....................................................................................... 91
9.5.9 USB ENDPOINT 2 ENABLE REGISTER ....................................................................................... 92
9.5.10 USB DATA POINTER REGISTER................................................................................................ 92
9.5.11 USB DATA READ/WRITE REGISTER ......................................................................................... 93
9.5.12 USB ENDPOINT OUT TOKEN DATA BYTES COUNTER.......................................................... 93
9.5.13 UPID REGISTER .......................................................................................................................... 94
9.5.14 ENDPOINT TOGGLE BIT CONTROL REGISTER...................................................................... 94
10 SERIAL INPUT/OUTPUT TRANSCEIVER.................................................................................. 96
10.1 OVERVIEW......................................................................................................................................... 96
10.2 SIOM MODE REGISTER.................................................................................................................... 99
10.3 SIOB DATA BUFFER ....................................................................................................................... 100
10.4 SIOR REGISTER DESCRIPTION..................................................................................................... 100
11 FLASH............................................................................................................................................... 102
11.1 OVERVIEW....................................................................................................................................... 102
11.2 FLASH PROGRAMMING/ERASE CONTROL REGISTER........................................................... 103
11.3 PROGRAMMING/ERASE ADDRESS REGISTER ......................................................................... 103
11.4 PROGRAMMING/ERASE DATA REGISTER ................................................................................ 105
11.4.1 FLASH IN-SYSTEM-PROGRAMMING MAPPING ADDRESS..................................................................... 105
12 INSTRUCTION TABLE ................................................................................................................. 106
13 DEVELOPMENT TOOL ................................................................................................................ 107
13.1 ICE (IN CIRCUIT EMULATION)......................................................................................................... 107
13.2 SN8F2270B EV-KIT ....................................................................................................................... 108
13.3 SN8F2270B TRANSITION BOARD ................................................................................................... 109
14 ELECTRICAL CHARACTERISTIC............................................................................................ 110
14.1 ABSOLUTE MAXIMUM RATING.............................................................................................. 110
14.2 ELECTRICAL CHARACTERISTIC............................................................................................. 110
15 FLASH ROM PROGRAMMING PIN........................................................................................... 112
16 PACKAGE INFORMATION ......................................................................................................... 113
16.1 SOP 20 PIN..................................................................................................................................... 114
16.2 SSOP 20 PIN................................................................................................................................... 115
16.3 P-DIP 20 PIN.................................................................................................................................. 116
16.4 QFN 16 PIN.................................................................................................................................... 117
17 MARKING DEFINITION............................................................................................................... 118

SN8F2270B Series
USB 2.0 Low-Speed 8-Bit Micro-Controller
SONiX TECHNOLOGY CO., LTD Page 7 Version1.3
17.1 INTRODUCTION.......................................................................................................................... 118
17.2 MARKING INDETIFICATION SYSTEM.................................................................................... 118
17.3 MARKING EXAMPLE ................................................................................................................. 119
17.4 DATECODE SYSTEM ................................................................................................................. 119

SN8F2270B Series
USB 2.0 Low-Speed 8-Bit Micro-Controller
SONiX TECHNOLOGY CO., LTD Page 8 Version1.3
1 PRODUCT OVERVIEW
1.1 FEATURES
)Features Selection Table
♦Memory configuration ♦7 interrupt sources.
Flash ROM size: 5K x 16 bits, including in system
programming function and EEPROM enumeration.
20000 erase/write cycles.
Five internal interrupts: T0, TC0, USB, SPI, Wakeup
RAM size: 192 x 8 bits. Two external interrupt: INT0, INT1.
♦8 levels stack buffer ♦One SIO function for data transfer
♦I/O pin configuration ♦Two 8 bits timer counter (T0, TC0)
Bi-directional: P0, P1, P5 TC0 has 8 bit PWM function (duty/cycle
programmable).
Wake-up: P0/P1 level change.
Pull-up resistors: P0, P1, P5. ♦Two system clocks.
External interrupt: P0.0, P0.1 controlled by
PEDGE. Internal low clock: RC type 24KHz which Fosc = 24KHz.
Internal High clock: Fosc = 6MHz.
♦Low Speed USB 2.0
Conforms to USB specification, Version 2.0. ♦Four operating modes.
3.3V regulator output for USB D- pin internal Normal mode: Both high and low clocks active.
1.5k ohm pull-up resistor. Slow mode: Low clock only.
Integrated USB transceiver. Sleep: Both high and low clocks stop.
Supports 1 low speed USB device address, Green mode: Periodical wakeup by timer.
1 control endpoint
2 interrupt IN/OUT endpoints, each has 8 bytes ♦Package
FIFO SOP14, QFN16, SOP20, SSOP20, DIP20
♦Powerful instructions ♦On chip watchdog timer.
One clocks per instruction cycle (1T)
Most of instructions are one cycle only. ♦In-system re-programmability
All ROM area JMP instruction. Allows easy firmware update
All ROM area CALL address instruction.
All ROM area lookup table function (MOVC)
TIMER
CHIP ROM RAM STACK T0 TC0 SIO PWM WAKE-UP
PIN NO. I/O pin PACKAGE
SN8F2271B 5K*16 192*8 8 V V V - 7 10 QFN
SN8F22711B 5K*16 192*8 8 V V - V 7 8 SOP
SN8F22721B 5K*16 192*8 8 V V V V 10 14
DIP/SOP/SSOP

SN8F2270B Series
USB 2.0 Low-Speed 8-Bit Micro-Controller
SONiX TECHNOLOGY CO., LTD Page 9 Version1.3
1.2 SYSTEM BLOCK DIAGRAM
INTERRUPT
CONTROL
ACC
Internal
Low RC
TIMING GENERATOR
RAM
SYSTEM REGISTERS
LVD
WATCHDOG TIMER
TIMER & COUNTER SIO
ALU
PC
FLAGS
IR Flash
memory
Low speed USB SIE
3.3v REGULATOR VREG33
D+
D-
Internal
High RC
P0 P1 P5
2.5v REGULATOR VREG25
PWM
BUZZER

SN8F2270B Series
USB 2.0 Low-Speed 8-Bit Micro-Controller
SONiX TECHNOLOGY CO., LTD Page 10 Version1.3
1.3 PIN ASSIGNMENT
SN8F22711BS (SOP 14 pins)
DN 1 U 14 DP
VREG33 2 13 VSS
VDD 3 12 VREG25
P0.1/INT1 4 11 P1.4
P5.3/PWM0 5 10 P1.6/RST
P1.0 6 9 P1.3
P1.1 7 8 P1.2
SN8F22711BS
SN8F2271BJ (QFN 16 pins)
VREG33 DN DP VSS
16 15 14 13
VDD 1 ●12 VREG25
P0.1/INT1 2 11 P1.4
P5.0/SCK 3 F2271BJ 10 P1.6/RST
P5.2/SDO 4 9 P1.3
5678
P5.1/SDI
P1.0 P1.1 P1.2
SN8F22721BP (DIP 20 pins)
SN8F22721BS (SOP 20 pins)
SN8F22721BX (SSOP 20 pins)
P5.0/SCK 1 U 20 P0.0/INT0
P5.2/SDO 2 19 P0.1/INT1
P5.1/SDI 3 18 VDD
P0.2 4 17 VREG33
P5.3/PWM0 5 16 DN
P1.0 6 15 DP
P1.1 7 14 VSS
P1.2 8 13 VREG25
P1.3 9 12 P1.4
P1.6/RST 10 11 P1.5
SN8F22721BP
SN8F22721BS
SN8F22721BX

SN8F2270B Series
USB 2.0 Low-Speed 8-Bit Micro-Controller
SONiX TECHNOLOGY CO., LTD Page 11 Version1.3
1.4 PIN DESCRIPTIONS
PIN NAME TYPE DESCRIPTION
VDD, VSS P Power supply input pins for digital circuit.
P0.0/INT0 I/O
P0.0: Port 0.0 bi-direction pin.
Schmitt trigger structure and built-in pull-up resisters as input mode.
Built wakeup function.
INT0: External interrupt 0 input pin.
P0.1/INT1 I/O
P0.1: Port 0.1 bi-direction pin.
Schmitt trigger structure and built-in pull-up resisters as input mode.
Built wakeup function.
INT1: External interrupt 1 input pin.
P0.2 I/O
P0.2: Port 0.2 bi-direction pin.
Schmitt trigger structure and built-in pull-up resisters as input mode.
Built wakeup function.
P1[5:0] I/O
P1: Port 1 bi-direction pin.
Schmitt trigger structure and built-in pull-up resisters as input mode.
Built wakeup function.
P1.6/RST I/O
RST is system external reset input pin under Ext_RST mode, Schmitt trigger
structure, active “low”, and normal stay to “high”.
P1.6: Port 1.6 bi-direction pin.
Schmitt trigger structure and built-in pull-up resisters as input mode.
Built wakeup function.
P5.0/SCK I/O
P5.0: Port 5.0 bi-direction pin.
Schmitt trigger structure and built-in pull-up resisters as input mode.
SCK: SIO output clock pin.
P5.1 /SDI I/O
P5.1: Port 5.1 bi-direction pin.
Schmitt trigger structure and built-in pull-up resisters as input mode.
SDI: SIO data input pin.
P5.2/SDO I/O
P5.2: Port 5.2 bi-direction pin.
Schmitt trigger structure and built-in pull-up resisters as input mode.
SDO: SIO data output pin.
P5.3/PWM0 I/O
P5: Port 5 bi-direction pin.
Schmitt trigger structure and built-in pull-up resisters as input mode.
PWM0: PMW output pin.
VREG25 P 2.5V power pin. Please connect 1uF capacitor to GND.
VREG33 P 3.3V power pin. Please connect XuF capacitor to GND. X=1~10.
D+, D- I/O USB differential data line.

SN8F2270B Series
USB 2.0 Low-Speed 8-Bit Micro-Controller
SONiX TECHNOLOGY CO., LTD Page 12 Version1.3
1.5 PIN CIRCUIT DIAGRAMS
Port 0, 1, 5 structures:
Pull-Up
Pin
Output
Latch
PnUR
Input Bus
PnM
Output Bus
Pin RST structure:
Pin
Ext. Reset
Code Option
Int. Bus
Int. Rst

SN8F2270B Series
USB 2.0 Low-Speed 8-Bit Micro-Controller
SONiX TECHNOLOGY CO., LTD Page 13 Version1.3
2 CENTRAL PROCESSOR UNIT (CPU)
2.1 MEMORY MAP
2.1.1 PROGRAM MEMORY (ROM)
)5K words ROM
ROM
0000H Reset vector User reset vector
Jump to user start address
0001H
.
.
0007H
General purpose area
0008H Interrupt vector User interrupt vector
0009H User program
.
.
000FH
0010H
0011H
.
.
.
.
.
General purpose area
End of user program
13F8H
.
.
13FFH
Reserved

SN8F2270B Series
USB 2.0 Low-Speed 8-Bit Micro-Controller
SONiX TECHNOLOGY CO., LTD Page 14 Version1.3
2.1.1.1 RESET VECTOR (0000H)
A one-word vector address area is used to execute system reset.
)Power On Reset (NT0=1, NPD=0).
)Watchdog Reset (NT0=0, NPD=0).
)External Reset (NT0=1, NPD=1).
After power on reset, external reset or watchdog timer overflow reset, then the chip will restart the program from
address 0000h and all system registers will be set as default values. It is easy to know reset status from NT0, NPD
flags of PFLAG register. The following example shows the way to define the reset vector in the program memory.
¾Example: Defining Reset Vector
ORG 0 ; 0000H
JMP START ; Jump to user program address.
…
ORG 10H
START: ; 0010H, The head of user program.
… ; User program
…
ENDP ; End of program

SN8F2270B Series
USB 2.0 Low-Speed 8-Bit Micro-Controller
SONiX TECHNOLOGY CO., LTD Page 15 Version1.3
2.1.1.2 INTERRUPT VECTOR (0008H)
A 1-word vector address area is used to execute interrupt request. If any interrupt service executes, the program
counter (PC) value is stored in stack buffer and jump to 0008h of program memory to execute the vectored interrupt.
Users have to define the interrupt vector. The following example shows the way to define the interrupt vector in the
program memory.
Note:”PUSH”, “POP” instructions save and load ACC/PFLAG without (NT0, NPD). PUSH/POP buffer is a
unique buffer and only one level.
¾Example: Defining Interrupt Vector. The interrupt service routine is following ORG 8.
.CODE
ORG 0 ; 0000H
JMP START ; Jump to user program address.
…
ORG 8 ; Interrupt vector.
PUSH ; Save ACC and PFLAG register to buffers.
…
…
POP ; Load ACC and PFLAG register from buffers.
RETI ; End of interrupt service routine
…
START: ; The head of user program.
… ; User program
…
JMP START ; End of user program
…
ENDP ; End of program

SN8F2270B Series
USB 2.0 Low-Speed 8-Bit Micro-Controller
SONiX TECHNOLOGY CO., LTD Page 16 Version1.3
¾Example: Defining Interrupt Vector. The interrupt service routine is following user program.
.CODE
ORG 0 ; 0000H
JMP START ; Jump to user program address.
…
ORG 8 ; Interrupt vector.
JMP MY_IRQ ; 0008H, Jump to interrupt service routine address.
ORG 10H
START: ; 0010H, The head of user program.
… ; User program.
…
…
JMP START ; End of user program.
…
MY_IRQ: ;The head of interrupt service routine.
PUSH ; Save ACC and PFLAG register to buffers.
…
…
POP ; Load ACC and PFLAG register from buffers.
RETI ; End of interrupt service routine.
…
ENDP ; End of program.
Note: It is easy to understand the rules of SONIX program from demo programs given above. These
points are as following:
1. The address 0000H is a “JMP” instruction to make the program starts from the beginning.
2. The address 0008H is interrupt vector.
3. User’s program is a loop routine for main purpose application.

SN8F2270B Series
USB 2.0 Low-Speed 8-Bit Micro-Controller
SONiX TECHNOLOGY CO., LTD Page 17 Version1.3
2.1.1.3 LOOK-UP TABLE DESCRIPTION
In the ROM’s data lookup function, Y register is pointed to middle byte address (bit 8~bit 15) and Z register is pointed
to low byte address (bit 0~bit 7) of ROM. After MOVC instruction executed, the low-byte data will be stored in ACC and
high-byte data stored in R register.
¾Example: To look up the ROM data located “TABLE1”.
B0MOV Y, #TABLE1$M ; To set lookup table1’s middle address
B0MOV Z, #TABLE1$L ; To set lookup table1’s low address.
MOVC ; To lookup data, R = 00H, ACC = 35H
; Increment the index address for next address.
INCMS Z ; Z+1
JMP @F ; Z is not overflow.
INCMS Y ; Z overflow (FFH Æ00), ÆY=Y+1
NOP ;
;
@@: MOVC ; To lookup data, R = 51H, ACC = 05H.
… ;
TABLE1: DW 0035H ; To define a word (16 bits) data.
DW 5105H
DW 2012H
…
Note: The Y register will not increase automatically when Z register crosses boundary from 0xFF to
0x00. Therefore, user must take care such situation to avoid loop-up table errors. If Z register
overflows, Y register must be added one. The following INC_YZ macro shows a simple method
to process Y and Z registers automatically.
¾Example: INC_YZ macro.
INC_YZ MACRO
INCMS Z ; Z+1
JMP @F ; Not overflow
INCMS Y ; Y+1
NOP ; Not overflow
@@:
ENDM

SN8F2270B Series
USB 2.0 Low-Speed 8-Bit Micro-Controller
SONiX TECHNOLOGY CO., LTD Page 18 Version1.3
¾Example: Modify above example by “INC_YZ” macro.
B0MOV Y, #TABLE1$M ; To set lookup table1’s middle address
B0MOV Z, #TABLE1$L ; To set lookup table1’s low address.
MOVC ; To lookup data, R = 00H, ACC = 35H
INC_YZ ; Increment the index address for next address.
;
@@: MOVC ; To lookup data, R = 51H, ACC = 05H.
… ;
TABLE1: DW 0035H ; To define a word (16 bits) data.
DW 5105H
DW 2012H
…
The other example of loop-up table is to add Y or Z index register by accumulator. Please be careful if “carry” happen.
¾Example: Increase Y and Z register by B0ADD/ADD instruction.
B0MOV Y, #TABLE1$M ; To set lookup table’s middle address.
B0MOV Z, #TABLE1$L ; To set lookup table’s low address.
B0MOV A, BUF ; Z = Z + BUF.
B0ADD Z, A
B0BTS1 FC ; Check the carry flag.
JMP GETDATA ; FC = 0
INCMS Y ; FC = 1. Y+1.
NOP
GETDATA: ;
MOVC ; To lookup data. If BUF = 0, data is 0x0035
; If BUF = 1, data is 0x5105
; If BUF = 2, data is 0x2012
…
TABLE1: DW 0035H ; To define a word (16 bits) data.
DW 5105H
DW 2012H
…

SN8F2270B Series
USB 2.0 Low-Speed 8-Bit Micro-Controller
SONiX TECHNOLOGY CO., LTD Page 19 Version1.3
2.1.1.4 JUMP TABLE DESCRIPTION
The jump table operation is one of multi-address jumping function. Add low-byte program counter (PCL) and ACC
value to get one new PCL. If PCL is overflow after PCL+ACC, PCH adds one automatically. The new program counter
(PC) points to a series jump instructions as a listing table. It is easy to make a multi-jump program depends on the
value of the accumulator (A).
Note: PCH only support PC up counting result and doesn’t support PC down counting. When PCL is
carry after PCL+ACC, PCH adds one automatically. If PCL borrow after PCL–ACC, PCH keeps value and
not change.
¾Example: Jump table.
ORG 0X0100 ; The jump table is from the head of the ROM boundary
B0ADD PCL, A ; PCL = PCL + ACC, PCH + 1 when PCL overflow occurs.
JMP A0POINT ; ACC = 0, jump to A0POINT
JMP A1POINT ; ACC = 1, jump to A1POINT
JMP A2POINT ; ACC = 2, jump to A2POINT
JMP A3POINT ; ACC = 3, jump to A3POINT
SONIX provides a macro for safe jump table function. This macro will check the ROM boundary and move the jump
table to the right position automatically. The side effect of this macro maybe wastes some ROM size.
¾Example: If “jump table” crosses over ROM boundary will cause errors.
@JMP_A MACRO VAL
IF (($+1) !& 0XFF00) !!= (($+(VAL)) !& 0XFF00)
JMP ($ | 0XFF)
ORG ($ | 0XFF)
ENDIF
ADD PCL, A
ENDM
Note: “VAL” is the number of the jump table listing number.

SN8F2270B Series
USB 2.0 Low-Speed 8-Bit Micro-Controller
SONiX TECHNOLOGY CO., LTD Page 20 Version1.3
¾Example: “@JMP_A” application in SONIX macro file called “MACRO3.H”.
B0MOV A, BUF0 ; “BUF0” is from 0 to 4.
@JMP_A 5 ; The number of the jump table listing is five.
JMP A0POINT ; ACC = 0, jump to A0POINT
JMP A1POINT ; ACC = 1, jump to A1POINT
JMP A2POINT ; ACC = 2, jump to A2POINT
JMP A3POINT ; ACC = 3, jump to A3POINT
JMP A4POINT ; ACC = 4, jump to A4POINT
If the jump table position is across a ROM boundary (0x00FF~0x0100), the “@JMP_A” macro will adjust the jump table
routine begin from next RAM boundary (0x0100).
¾Example: “@JMP_A” operation.
; Before compiling program.
ROM address
B0MOV A, BUF0 ; “BUF0” is from 0 to 4.
@JMP_A 5 ; The number of the jump table listing is five.
0X00FD JMP A0POINT ; ACC = 0, jump to A0POINT
0X00FE JMP A1POINT ; ACC = 1, jump to A1POINT
0X00FF JMP A2POINT ; ACC = 2, jump to A2POINT
0X0100 JMP A3POINT ; ACC = 3, jump to A3POINT
0X0101 JMP A4POINT ; ACC = 4, jump to A4POINT
; After compiling program.
ROM address
B0MOV A, BUF0 ; “BUF0” is from 0 to 4.
@JMP_A 5 ; The number of the jump table listing is five.
0X0100 JMP A0POINT ; ACC = 0, jump to A0POINT
0X0101 JMP A1POINT ; ACC = 1, jump to A1POINT
0X0102 JMP A2POINT ; ACC = 2, jump to A2POINT
0X0103 JMP A3POINT ; ACC = 3, jump to A3POINT
0X0104 JMP A4POINT ; ACC = 4, jump to A4POINT