Technologic Systems TS-5500 User manual

TS-5500 User’s Manual

Technologic Systems, Incorporated
16610 East Laser Drive, Suite 10
Fountain Hills, AZ 85268
480-837-5200
FAX [phone]
[email protected]
http://www.embeddedx86.com/
This revision of the manual is dated
October 22, 2003
All modifications from previous versions are listed in the appendix.
Copyright © 1998-2003 by Technologic Systems, Inc. All rights reserved.

TS-5500 User’s Manual Technologic Systems
10/31/03
ii
Limited Warranty
Technologic Systems warrants this product to be free of defects in material and workmanship for a
period of one year from date of purchase. During this warranty period Technologic Systems will repair or
replace the defective unit in accordance with the following instructions:
•Contact Technologic Systems and obtain a Return Material Authorization (RMA) number and a copy
of the RMA form.
•Fill out the RMA form completely and include it and dated proof of purchase with the defective unit
being returned. Clearly print the RMA number on the outside of the package.
This limited warranty does not cover damages resulting from lighting or other power surges, misuse,
abuse, abnormal conditions of operation, or attempts to alter or modify the function of the product.
This warranty is limited to the repair or replacement of the defective unit. In no event shall
Technologic Systems be liable or responsible for any loss or damages, including but not limited
to any lost profits, incidental or consequential damages, loss of business, or anticipatory profits
arising from the use or inability to use this product.
Repairs made after the expiration of the warranty period are subject to a flat rate repair charge and the
cost of return shipping. Please contact Technologic Systems to arrange for any repair service.

TS-5500 User’s Manual Technologic Systems
10/31/03
iii
Table Of Contents
LIMITED WARRANTY.......................................................................................................................................................................................II
1INTRODUCTION ...................................................................................................................................................................................5
2PC COMPATIBILITY..............................................................................................................................................................................5
2.1 Operating Systems..........................................................................................................................................................................5
3POWER...................................................................................................................................................................................................6
4MEMORY.................................................................................................................................................................................................6
4.1 SDRAM...............................................................................................................................................................................................6
4.2 Flash..................................................................................................................................................................................................6
4.3 Compact Flash cards and DiskOnChip modules.....................................................................................................................6
4.4 Using the SanDisk USB Compact Flash Card Reader.........................................................................................7
4.5 Non-Volatile SRAM....................................................................................................................................................................7
5SERIAL PORTS.....................................................................................................................................................................................7
5.1 Serial Port Configuration Registers.............................................................................................................................................8
5.2 Serial Port Hardware.......................................................................................................................................................................8
5.3RS-485 Support...............................................................................................................................................................................8
5.4 Automatic RS-485 TX Enable........................................................................................................................................................9
5.5 Configuring COM3...........................................................................................................................................................................9
5.6 Adding Serial Ports..........................................................................................................................................................................9
6DIGITAL I/O...........................................................................................................................................................................................10
6.1 DIO1 Header...................................................................................................................................................................................10
6.2 DIO2 Header...................................................................................................................................................................................10
6.3 Using LCD Port as Digital I/O......................................................................................................................................................11
7A/D CONVERTER................................................................................................................................................................................11
7.1 Single Sample Acquisition Procedure.......................................................................................................................................12
7.2 A/D Converter BIOS Call...............................................................................................................................................................12
8LCD INTERFACE................................................................................................................................................................................12
9MATRIX KEYPAD SUPPORT.............................................................................................................................................................13
10 THE 10/100 BASE-T ETHERNET PORT.........................................................................................................................................14
10.1 LINUX TCP/IP configuration.........................................................................................................................................................14
10.2 DOS TCP/IP configuration–Packet Driver and WATTCP......................................................................................................15
10.3 WATTCP.CFG configuration file..................................................................................................................................................15
10.4 DOS TCP/IP configuration –MS Client for DOS.......................................................................................................................15
11 PCMCIA BRIDGE.................................................................................................................................................................................16
11.1 Hardware.........................................................................................................................................................................................16
11.2 Software (Linux support only)......................................................................................................................................................16
11.3 Supported Devices........................................................................................................................................................................17
12 USB BRIDGE.......................................................................................................................................................................................17
12.1 Hardware.........................................................................................................................................................................................17
12.2 Software (Linux Support Only).....................................................................................................................................................17
12.3 Supported DevicesHere is a list of devices tested at Technologic Systems and known to work with
the TS-5500, many other USB devices will work with the TS-5500, see the kernel drivers and the
Linux-USB web sites for more information...........................................................................................................................18
13 REAL TIME CLOCK.............................................................................................................................................................................18
14 WATCHDOG TIMER............................................................................................................................................................................19
15 LED, JUMPERS AND RESET BUTTON..........................................................................................................................................20
16 PC/104 BUS EXPANSION .................................................................................................................................................................21
17 LOADING OR TRANSFERRING FILES...........................................................................................................................................22
17.1 Developing with the Technologic Systems TS-9500..............................................................................................................22
17.2 Transferring files with Compact Flash......................................................................................................................................22
17.3 Zmodem Downloads....................................................................................................................................................................22
18 DEBUGGING........................................................................................................................................................................................23

TS-5500 User’s Manual Technologic Systems
10/31/03
iv
18.1 Integrated BIOS Debugger...........................................................................................................................................................23
18.2 Using other debuggers ................................................................................................................................................................23
19 VIDEO, KEYBOARD, AND CONSOLE REDIRECTION.................................................................................................................24
20 SYSTEM BIOS SETUP SCREENS...................................................................................................................................................25
20.1 Main CMOS Configuration Screen..............................................................................................................................................25
20.2 Basic CMOS Configuration..........................................................................................................................................................26
20.3 Adding a TS-9400 or TS-9500 with Compact Flash...............................................................................................................26
20.4 Custom CMOS Configuration......................................................................................................................................................28
20.5 Shadow Configuration..................................................................................................................................................................29
21 FEEDBACK AND UPDATES TO THE MANUAL .............................................................................................................................29
APPENDIXA -BOARD DIAGRAM AND DIMENSIONS............................................................................................................................30
APPENDIX B -OPERATING CONDITIONS...............................................................................................................................................30
APPENDIX C-SYSTEM MEMORY MAP.....................................................................................................................................................31
APPENDIX D-SYSTEM I/O MAP.................................................................................................................................................................32
APPENDIX E -BIOS INTERRUPT FUNCTIONS......................................................................................................................................33
Int 15h / Function B000h-Technologic Systems BIOS information...............................................................................................33
Int 15h / Function B010h-LED Control................................................................................................................................................33
Int 15h / Function B042h–Alphanumeric LCD Support...................................................................................................................34
Int 15h / Function B040h–Matrix Keypad Support.............................................................................................................................34
Int 15h / Function A1h–Console I/O Redirection..............................................................................................................................34
Int 15h / Function B050h–A/D Converter Control..............................................................................................................................35
Int 15h / Function B020h-Jumper Pin Status ....................................................................................................................................35
APPENDIX F -USING A HIGHER RATE (10X) BAUD CLOCK...............................................................................................................36
APPENDIX G -FURTHER REFERENCES................................................................................................................................................37
APPENDIX H-MANUALREVISIONS.........................................................................................................................................................37

TS-5500 User’s Manual Technologic Systems
10/31/03
5
1Introduction
The model TS-5500 is a compact, full-featured PC compatible Single Board Computer based on the
AMD Elan520 processor. At 133 MHz, it is approximately 10 times faster than our other 386EX based
products for only a small additional cost. PC compatibility allows for rapid development since you can
use standard PC development tools such as Turbo C or Power Basic or Linux based tools as well. If
you have done work in the PC world in the past, you will find you can now build applications for a very
small target that does not require a keyboard, video, floppy disks, or hard drives.
By adding the optional TS-9500 daughter board, you can compile and debug directly on the TS-5500
with standard VGA video and keyboard interfaces. Alternatively, you can typically write and debug code
on a host PC using standard development tools for the PC platform, then simply copy it to and run it on
the TS-5500 without modification. If additional peripherals are required, the PC/104 expansion bus
allows for many standard functions available off-the-shelf. It is alsovery simple to create a custom
PC/104 daughter board for those special features that differentiate your product. Technologic Systems
can provide technical support as well as a free quotation for any custom hardware, software, or BIOS
modifications you may require.
This manual is fairly short. This is because for the most part, the TS-5500 is a standard x86-based PC
compatible computer, and there are hundreds of books about writing software for the PC platform. The
primary purpose of this manual is documenting where the TS-5500 differs from a standard PC.
2PC Compatibility
PC compatibility requires much more than just an x86 processor. It requires PC compatible memory
and I/O mapsas well as a PC compatible BIOS. The General Software EMBEDDED BIOS offers a high
degree of compatibility with past and present BIOS standards allowing it to run off-the shelf operating
systemsand application software.
The EMBEDDED BIOS has been tested with all major versions of DOS, including MS-DOS, DR-DOS,
and Embedded DOS 6-XL; all major versions of OS/2, including MS-OS/2 and IBM OS/2; MS-Windows
3.1, Windows-95, Windows NT, and NetWare 386.
2.1 Operating Systems
Technologic Systems Embedded PCs are compatible with a wide variety of x86-based operating
systems. A partial list OSes currently used with our boards by customers includes:
•TNT Embedded Toolsuite, Phar Lap Software
•UCos II
•RTKernel, On Time Software
•RTEMS, On-Line Applications Research Corporation
•DOS with WATTCP, public domain TCP/IP source code for DOS
•Linux
The TS-5500 is shipped, free of charge, with Embedded DOS ROM by General Software.
The TS-5500 can be shipped upon request with Linux pre-installed for a nominal fee. The Linux file
system and kernel is also freely available on the web should you wish to install it yourself. Typically, the
Linux OS requires a 32MB or larger Compact Flash or an M-System’s DiskOnChip.

TS-5500 User’s Manual Technologic Systems
10/31/03
6
3Power
The TS-5500 requires regulated 5VDC at 900 mA (typical). A quick releasescrew-down terminal block
for the 5V power and power GND connections is provided for easy connection to an external power
supply.
When power is first supplied to the TS-5500, the board mounted LED is immediately turned on under
hardware control. Once the processor begins execution, the LED is turned off. The LED then turns on
then off to provide a characteristic blink during execution of POST. If the LED does not turn on at all, the
most likely problem is the power supply. Check that the +5V and GND connections are not reversed. A
diode protects the board against damage in such a situation, but it will not run.
Please note that supply voltages over 6 VDC may damage the TS-5500.
Be sure to use a regulated 5 VDC power supply.
4Memory
4.1 SDRAM
The TS-5500 has a total of 32 Megabytes (MB) of high-speed SDRAM providing 640 Kilobytes (KB) of
base memory, 15 MB of extended memory, and 128 KB of shadow RAM for the BIOS. This is identical
to a standard PC memory map. The TS-5500 can be ordered with 16MB or 64MB of SDRAM, but it is
not field upgradeable.
The TS-5500 SDRAM chips are soldered directly to the board. By not using a SIMM socket, the TS-
5500 is much more reliable in high-vibration environments.
4.2 Flash
There is a total of 2 MB of Flash memory on the TS-5500 with 128 KB reserved for the BIOS. During
POST, this 128 KB area is copied from Flash into SDRAM at addresses E0000h through FFFFFh for
improved performance (a standard technique known as BIOS Shadowing). The remainder of the Flash
memory (1920 KB) is configured as two solid-state disk (SSD) drives appearing as drive A and drive B.
Drive A uses 896 KB of Flash memory while drive B uses the remaining 1024 KB of Flash memory.
Both drives are fully supported by the BIOS as INT 13h drives.
The physical Flash memory is accessed by the BIOS in protected mode at memory address 148M.
The Flashmemory is guaranteed capable of a minimum of 100,000 write/erase cycles. This means that
if you completely erase and rewrite the SSD drive 10 times a day you have over 27 years before any
problems would occur. Reading the SSD produces no wear at all.
Power failure during flash writes can cause corruption of flash drive FAT tables (A: or B:). Therefore
applications writing frequently should use DiskOnChip or Compact Flash card drives which are more
tolerant of power failure during write cycles.
Flash drive A is read-only when JP3 is not installed. Removing JP3 also makes the 128 kbyte BIOS
area of the Flash write protected as well. Write protecting the A: drive can be useful if there are critical
files in the final product that must be very secure.
4.3 Compact Flash cards and DiskOnChip modules
If 2MB of Flash is insufficient for your application, additional non-volatile storage can be added with a
Compact Flash card or an M-Systems DiskOnChip module. Either of these products can supply
additional storage that will behave much as a hard drive does in a typical PC with sizes ranging from
8MB to 512MB. These products are inherently more rugged than a hard drive since they are completely
solid-state with no moving parts.
The Compact Flash card has the added advantage of being removable media. A SanDisk USB
Compact Flash reader/writer (which is included in the TS-5500 Developer’s Kit) is recommended for the

TS-5500 User’s Manual Technologic Systems
10/31/03
7
host PC for file transfers. This results in the ability to quickly move files from a host PC to the TS-5500
using a Compact Flash card as the removable media. Since the Compact Flash card appears as a
standard IDE drive on the TS-5500, it uses no additional RAM for drivers. While a USB Compact Flash
reader allows for hot swapping of the Compact Flash card on the host PC, the Compact Flash interface
on the TS-5500 is not hot swappable, the TS-5500 must be rebooted after removing or installing a
Compact Flash card.
The DiskOnChip module can be installed into the 32-pin socket near the center of the board.
DiskOnChip modules are available from Technologic Systems as well as other distributors. It is
compatible with DOS as shipped, and drivers for other operating systems (such as Linux) are available.
If a DiskOnChip is installed, it will simply appear as drive C. The DiskOnChip is accessed through an 8
KB range of memory at D0000h through D1FFFh. If you are installing a PC/104 daughter card that uses
memory mapped I/O, it must not conflict with this address range if the DiskOnChip is installed.
Additionally, in a DOS environment the DiskOnChip firmware uses approximately 30 KB of user RAM
(below 640 KB).
4.4 Using the SanDisk USB Compact Flash Card Reader
This device allows for a very fast and reliable method of moving files between the host PC and target
SBC (TS-5500). The Compact Flash (CF) card can then be hot swapped (inserted or removed without
rebooting the host PC). Sometimes it is necessary to unplug the USB cable and reinstall it after
swapping CF cards (at least Windows ME seems to prefer this).
Note: The TS-5500 always needs to be powered off before swapping CF cards.
4.5 Non-Volatile SRAM
The 32-pin socket can also optionally hold 32 KB of Non-volatile SRAM memory. This behaves exactly
like battery-backed SRAM. This or the DiskOnChip may be installed, but not both.
Non-volatile SRAM provides non-volatile memory with unlimited write cycles and no write time
degradation, unlike Flash memory. The SRAM uses an additional 32 KB range of D0000h through
D7FFFh. If the SRAM is installed, PC/104 daughter card that uses memory mapped I/O must not
conflict with this address range.
I/O location 75h, bit 0 can be read to determine whether the SRAM option is installed; a ‘1’ in bit 0
indicates that it is installed, a ‘0’ that it is not.
5Serial Ports
The three PC compatible asynchronous serial ports (COM1, COM2 and COM3) provide a means to
communicate with external serial devices such as printers, modems, etc. Each is independently
configured as a standard PC COM port that is compatible with the National Semiconductor NS16C450.
Alternatively, these ports can be changed to the 16C550 mode with 16 byte FIFOs in both the receive
and transmit UART channels. COM1 appears in the I/O space at 3F8h –3FFh and uses IRQ4. COM2
is located at 2F8h –2FFh and uses IRQ3. COM3 appears in the I/O space at 3E8h-3EFh and can be
jumper selected to use IRQ5, IRQ6, or IRQ7.
By changing an internal configuration register in the Elan520, the serial clock to the COM ports can be
switched to a 10 times rate (18.432 MHz). This feature allows baud rates higher than 115 Kbaud (such
as 230K baud or 576K baud), as well as non-standard lower baud rates (such as 24 Kbaud). See
Appendix G for further information.
The COM1 and COM2 ports may also be configured to use a DMA channel, which may be useful when
very high baud rates are being used.
See the AMD Elan520 User's Manual for further details.

TS-5500 User’s Manual Technologic Systems
10/31/03
8
5.1 Serial Port Configuration Registers
Because both serial ports are 100% PC compatible, software written for the PC that accesses serial
ports directly or through standard BIOS calls will work without modification on the TS-5500. The details
of the COM port internal registers are available in most PC documentation books or the data sheet for
the National Semiconductor NS16C550 may be consulted.
5.2 Serial Port Hardware
Each RS-232 serial port has 4 lines buffered: the Rx and Tx data lines and the CTS / RTS handshake
pair. This is quite sufficient to interface with the vast majority of serial devices. If additional handshake
lines are required, it will be necessary to add a TS-SER daughter board. The TS-5500 serial signals are
routed to 10-pin header labeled COM1 and a standard 9-pin Sub-D male labeled COM2 and COM3. A
serial adapter cable can be plugged into the COM1 header to convert this into a standard DB9 male
connector. The pin-outs for the 10-pin header and DB9 male connector are listed above. The RTS
signal also drives the DTR pin on COM ports, DTR is always the same state as RTS.
5.3 RS-485 Support
An option is available to add support to COM3 for half
duplex or full duplex RS-485. RS-485 drivers allow
communications between multiple nodes up to 4000 feet
(1200 meters) via twisted pair cable. Half-duplex RS-485
requires one twisted pair plus a Ground connection, while
full duplex requires two twisted pair plus a Ground.
For half-duplex operation, a single twisted pair isused for
transmitting and receiving. Bit 6 at I/O location 75h must
be set to enable RTS mode or bit 7 can be set to enable
Automatic mode. In RTS mode, the serial port RTS signal
controls the RS-485 transmitter/receiver (See Automatic
mode below). When RTS is asserted true, the RS-485
transmitter is enabled and the receiver disabled. When
RTS is de-asserted the transmitter is tri-stated (disabled)
and the receiver is enabled. Since the transmitter and
receiver are never both enabled, the serial port UART
does not receive the data transmitted.
For full-duplex operation, two twisted pairs are used and
the transmitter can typically be left on all the time. Simply
use RTS mode, and set RTS true.
See Figure 2 above for connector pin-outs.
5GND
Rx - 94Rx +
[in] CTS 83TX data [out]
[out] RTS 72RX data [in]
Tx - 61Tx +
Figure 2 –COM2 and COM3 9-
pin Sub D
Pin-out [signal direction is in brackets]
PLEASE NOTE: COM3 has connections
for the RS-232 port and the RS-485 port
on the same 9 pin connector, only one of
the two functions will be used at a time.
5V Power 10 5GND
NC 94DTR (RTS) [out]
[in] CTS 83TX data [out]
[out] RTS 72RXdata [in]
NC 61NC
Figure 1–COM1 Serial Port Header and
DB9 Pin-out [signal direction is in brackets]
PLEASE NOTE: The serial port headers
use a non-standard numbering scheme.
This was done so the header pins would
have the same numbering as the corre-
sponding DB-9 pin; i.e. pin 8 (CTS) on the
header connects to pin 8 on the DB-9
RS-485 Quick start procedure:
1. The RS-485 option must be installed
2. Install FD jumper for full-duplex or HD
for half-duplex RS-485 operation
3. Attach the RS-485 cable to the 9-pin
Sub-D connector.
4. Set the COM3 UART serial parameters
(baud rate, data, parity, and stop bits,
interrupts, etc).
5. Run Auto485.exe utility
(configures bits 6 and 7 at I/O 75h)
(and initializes Timer2)
6. For Half-Duplex RTS mode: To
transmit data, assert RTS and write the
data to the UART. To receive
data, deassert RTS and read the data
from the UART
7. For Half-Duplex Automatic mode: just
read or write data to the UART

TS-5500 User’s Manual Technologic Systems
10/31/03
9
Note:the correct jumper (FD or HD) must be installed. See the Table 2 for details.
Fail-safe bias resistors are used to bias the TX+, TX-and RX+,
RX-lines to the correct state when these lines are not being
actively driven. This is an important consideration, since in a
typical RS-485 installation, the drivers are frequently tri-stated. If
fail-safe bias resistors are not present, the 485 bus may be
floating and very small amounts of noise can cause spurious
characters at the receivers. 4.7KΩresistors are used to pull the
TX+ and RX+ signals to 5V and also to bias the TX-and RX-
signals to ground. Termination resistors may be required for reliable operation when running long
distances at high baud rates. Termination resistors should only be installed at each end of an RS-485
transmission line. In a multi-drop application where there are several drivers and/or receivers attached,
only the devices at each end of the transmission line pair should have termination resistors.
A read at I/O location 75h bit 1 will return a "1" when the RS-485 option is installed.
5.4 Automatic RS-485 TX Enable
TS-5500 boards support fully automatic TX enable control. This simplifies the design of half-duplex
systems since turning off the transmitter via the RTS signal is typically difficult to implement. The
COM3 UART transmit holding register and the transmit shift register both must be polled until empty
before deasserting RTS when using the RTS mode. The design gets more difficult when using the TX
FIFO or when using a multi-tasking OS such as Linux.
In Automatic mode, Timer2 and a Xilinx PLD keep track of the bits shifting out the COM3 UART. This
circuit automatically turns on/off the RS-485 transceiver at the correct times. This only requires the
TIMER2 to be initialized once based on baud rate and data format, and bit 7 at I/O location 75 must be
set. A utility called AUTO485.exe is included in the AUTOEXEC.bat that simplifies this task.
5.5 Configuring COM3
COM3 has a header labeled HD3 with 6 jumper positions. Three of these jumpers select which interrupt
COM3 uses (IRQ5, IRQ6 or IRQ7). Only one of the interrupt jumpers should be installed. . Note:
IRQ7 is used by many PCMCIA cards. The other three jumper positions select RS-232, RS-485 (Half-
Duplex), or RS-422 (Full-Duplex) operation. Only one of these jumpers should be installed.
Linux strongly prefers the use of interrupts on all COM ports. If COM3 does not have a jumper installed
for interrupt selection, extremely slow throughput is a common symptom under Linux. IRQ5 is the most
commonly used IRQ for COM3. Regardless of IRQ selected, run the setserial command with the
following parameters to register the interrupt with the kernel:
setserial -v /dev/ttyS2 auto_irq autoconfig
5.6 Adding Serial Ports
If your project requires more than three serial ports, additional ports may be added via the PC/104
expansion bus. Technologic Systems offers three different daughter boards (TS-SER1, TS-SER2, and
TS-SER4) that add 1,2,or 4 extra COM ports respectively. Typically these would be configured as
COM4 or be assigned other higher COM I/O locations. Because DOS only directly supports four serial
ports, any additional ports beyond four will require software drivers if using DOS.
The TS-5500 PC/104 bus has IRQ 5, 6, 7, 12 or 15 available for additional serial ports.
Note:IRQ7 is used by many PCMCIA cards and COM3 will typically use IRQ5 or IRQ6.
Jumper Receiver Source
FD Full-Duplex RS-485
HD Half-Duplex RS-485
232 RS-232
Table
1
–
COM3 Receiver Source

TS-5500 User’s Manual Technologic Systems
10/31/03
10
Typically each serial port has a dedicated interrupt, but the TS-SER4 allows all four extra serial ports to
share a single interrupt. This is very helpful in systems with a large number of serial ports since there
are a limited number of IRQ lines available.
6Digital I/O
There are 38 Digital Input/Output (DIO) lines available on the TS-5500. These are available on 3
headers labeled DIO1, DIO2, and LCD. In addition to the DIO signals, each header also has 5 Volt
power and Ground available, while the DIO2 header has an external reset available on pin 12.. The
header labeled LCD can be used as 11 DIO lines or as an alphanumeric LCD interface (See Section 7).
24 of the DIO lines are arranged as three byte-wide ports that can be programmed as either inputs or
outputs in groups of 4-bits. 8 more of the DIO lines can also be programmed as either inputs or outputs
(in groups of 4-bits also). The remaining 6 lines have a fixed configuration of 5 inputs and 1 output. Two
of the DIO lines can be programmed to cause interrupts.
6.1 DIO1 Header
The DIO1 port provides +5V, GND, and 14 digital I/O lines that may
be used to interface the TS-5500 with a wide range of external
devices. DIO lines DIO1_0 thru DIO1_7 are a byte-wide port
accessed at I/O location Hex 7B, while the 6 other DIO lines
DIO1_8 thru DIO1_13 are accessed in the lower 6 bits of I/O
location Hex 7C. I/O location Hex 7A is a control port for DIO1. The
direction of DIO lines DIO1_0 thru DIO1_3 is controlled by bit 0 of
I/O location Hex 7A, and the direction of DIO1_4 thru DIO1_7 is
controlled by bit 1 of I/O location Hex 7A. The direction of DIO1_8
thru DIO1_11 is controlled by bit 5 of I/O location Hex 7A, while
DIO1_12 and DIO1_13 are always inputs. In all cases, when a control bit is a “1”, it is setting the
corresponding DIO lines to be Outputs, while a “0” sets them to be Inputs. All control bits at I/O location
Hex 7A are initialized at reset to be “0”.
When bit 7 of I/O location Hex 7A is a “1”, DIO1_13 is connected to IRQ7 allowing this port to trigger an
interrupt.
All digital outputs on this port can source 4 mA or sink 8 mA and have logic swings between 3.3V and
ground. The digital inputs have standard TTL level thresholds and must not be driven below 0 Volts or
above 5.0 Volts. DIO lines DIO1_0 thru DIO1_7 have 4.7KΩpull-up resistors to 5V biasing these
signals to a logic”1”.
6.2 DIO2 Header
The DIO2 port provides +5V, GND, 13 digital I/O lines, and an
external reset. DIO lines DIO2_0 thru DIO2_7 are a byte-wide
port accessed at I/O location Hex 7E, while the 5 other DIO lines
DIO2_8 thru DIO2_11 and DIO2_13 are accessed in bits 0-4 and
bit6 respectively at I/O location Hex 7F. I/O location Hex 7D is a
control port for DIO2. The direction of DIO lines DIO2_0 thru
DIO2_3 is controlled by bit 0 of I/O location Hex 7D, and the
direction of DIO2_4 thru DIO2_7 is controlled by bit 1 of I/O
location Hex 7D. The direction of DIO2_8 thru DIO2_11 is
controlled by bit 5 of I/O location Hex 7D, while DIO2_13 is always
an input. In all cases, when a control bit is a “1”, it is setting the
corresponding DIO lines to be Outputs, while a “0” sets them to be Inputs. All control bits at I/O location
Hex 7D are initialized at reset to be “0”.
When bit 7 of I/O location Hex 7D is a “1”, DIO2_13 is connected to IRQ6 allowing this port to trigger an
interrupt.
5 V 16 15 DIO1_7
DIO1_13 14 13 DIO1_6
DIO1_12 12 11 DIO1_5
DIO1_11 10 9DIO1_4
DIO1_10 87DIO1_3
DIO1_9 65DIO1_2
DIO1_8 43DIO1_1
GND 21DIO1_0
Figure 2–DIO1 Header Pinout
5 V 16 15 DIO2_7
DIO2_13 14 13 DIO2_6
Reset# 12 11 DIO2_5
DIO2_11 10 9DIO2_4
DIO2_10 87DIO2_3
DIO2_9 65DIO2_2
DIO2_8 43DIO2_1
GND 21DIO2_0
Figure 4 –DIO2 Header Pinout

TS-5500 User’s Manual Technologic Systems
10/31/03
11
All digital outputs on this port can source 4 mA or sink 8 mA and have logic swings between 3.3V and
ground. The digital inputs have standard TTL level thresholds and must not be driven below 0 Volts or
above 5.0 Volts. DIO lines DIO1_0 thru DIO1_7 have 4.7KΩpull-up resistors to 5V biasing these
signals to a logic”1”.
6.3 Using LCD Port as Digital I/O
The LCD Port can be used as 11 additional digital I/O lines or it can be used to interface to a standard
alphanumeric LCD display. At system reset, the port defaults to DIO mode. If using an LCD display this
port can be switched to LCD mode by writing a “1” into bit 4 at I/O location Hex 7D, or the BIOS call to
enable the LCD also sets bit 4 at I/O location Hex 7D (See Section 7 for LCD mode).
When the LCD port is in DIO mode, pins LCD_RS and LCD_WR are digital inputs, LCD_EN is a digital
output, and LCD_0 thru LCD_7 are programmable as either
inputs or outputs.
LCD_RS and LCD_WR can be read at I/O location 73h bits 7
and 6, respectively. The state of LCD_EN is controlled by
writing to I/O location 73h bit 0.
LCD_0 thru LCD_7 can be read or written at I/O location 72h.
The direction of this byte-wide port (pins 7 –14) is determined
by bits 2 and 3 at I/O location 7Dh. If bit 2 is a zero, then the
lower 4 bits (pins 7 –10) are inputs. If bit 2 is logic 1, then pins 7
–10 are outputs. Bit 3 at location 7Dh controls the upper 4 bits,
pins 11 –14 in a like manner.
When bit 6 of I/O location Hex 7D is a “1”, LCD_RS is connected to IRQ1 allowing this port to trigger an
interrupt.
All digital outputs on this port can source 4 mA or sink 8 mA and have logic swings between 3.3V and
ground. The digital inputs have standard TTL level thresholds and must not be driven below 0 Volts or
above 5.0 Volts. DIO lines DIO1_0 thru DIO1_7 have 4.7KΩpull-up resistors to 5V biasing these
signals to a logic”1”.
7A/D Converter
The TS-5500 supports an optional eight-channel,
12-bit A/D converter (ADC) capable of 60,000
samples per second. Each channel is
independently software programmable for a variety
of analog input ranges: -10V to +10V, -5V to +5V,
0V to +10V, or 0V to +5V. This allows an effective
dynamic range of 14 bits. Each channel is
overvoltage tolerant from -16V to + 16V, and a fault
condition on any channel will not affect the
conversion result of the selected channel. This is
all accomplished with a 5V only power supply; no
negative supply voltage is required. The Maxim
MAX197 chip can be replaced with a MAX199
chip if a lower range of analog input levels is
required (-4V to +4V, -2V to +2V, 0V to 4V,and 0V
to 2V).
LCD_6
14 13 LCD_7
LCD_4
12 11 LCD_5
LCD_2
10 9LCD_3
LCD_0
87LCD_1
LCD_WR
65LCD_EN
Bias
43LCD_RS
GND
215V
Figure 5 –Pinout for LCD header when
used as DIO
I/O Address Action
196h Write Initiate A/D Conversion
196h Read LSB of Conversion
197h Read MSB of Conversion
75h Read Bit 2 = 1 if A/D option installed
195h Read Bit 0 = 0 when Conversion
completed
Table 2–A/D registers
Bit Description Details
0-2Analog channel select Channels 0-7
3Unipolar / Bipolar 0 = Unipolar (i.e. 0 to +5V)
1 = Bipolar (i.e. –5 to +5V)
4Range select 0 = 5V range
1 = 10V range
5-7Set to zero
Table 6 –A/D Control Register (196h Write)

TS-5500 User’s Manual Technologic Systems
10/31/03
12
7.1 Single Sample Acquisition Procedure
An acquisition is initiated by writing to I/O location 196h. The value written to I/O location 196h
determines the channel to convert (bits 0-2) and selects one of four input ranges (bits 3,4). Bits 5-7
should be set to zero. After the write cycle to I/O location 196h, the MAX197 completes the A/D
conversion in 11 µS. Bit 0 at I/O location 195h may be polled to determine when the conversion is
complete (zero = complete). The conversion result is now available at locations 196h (LSB) and 197h
(MSB). A single word read at I/O 196h can also be used. When using unipolar modes, the result is in
binary format with the upper 4 bits of the MSB equal to zero. When a bipolar mode is used, the result is
in twos-complement binary with the upper 4 bits (Bits 12-15) equal to bit 11 (sign extended).
If more details on the A/D converter specifications are required, the Maxim web site is listed in Appendix
G .
7.2 A/D Converter BIOS Call
An A/D acquisition can also be obtained through BIOS call int 15h, function
B050h. By using a BIOS call, your code will operate safely even when running
on a development machine without the ADC, because the function call will not
"hang" if there is a hardware fault (MAX197 not populated). If the ADC
completion bit is not true after 50 µS, the routine exits with an error condition.
Int 15h / Function B050h –
ENTRY:
AX = B050h
BL = Value to write into A/D Control register (See Table 6)
EXIT:
CY = 0 (no error)
AH = 0 –No Error
1–bad subfunction
2 –bad input registers (i.e. if BL bit 5 set)
3 –ADC option not present (I/O 7Dh bit 0 = 0)
4 –Hardware error (A/D timeout)
BX = A/D Conversion value
For Linux A/D driver information refer to the “Linux Developers Manual” on the Technologic Systems website:
www.embeddedx86.com
8LCD Interface
A 14-pin LCD connector is provided on the TS-5500 for interfacing with standard alphanumeric LCD
displays. These displays use a common controller, the Hitachi HD44780 or equivalent. While software
written for the HD44780 will work with all displays using the controller, the cable needed is dependent on
the display used. For most displays, a straight-through type ribbon cable can be used. The connector on
the LCD display is typically mounted on the backside of the display. Warning –using an incorrect cable
or mounting the LCD connector on the front-side can result in a reverse power polarity and can damage
the LCD display. Please refer to your LCD data sheets for in-depth information.
Pin Description
1Channel 0
3Channel 1
5Channel 2
7Channel 3
9Channel 4
11 Channel 5
13 Channel 6
15 Channel 7
Even Analog GND
Table 7
ADC Header
246810 12 14 16
1357911 13 15
Figure 3-ADC Header Pinout
246810 12 14
1357911 13
Figure 6 -LCD Header Pinout

TS-5500 User’s Manual Technologic Systems
10/31/03
13
The TS-5500 BIOS incorporates a fairly complete set of
INT10h video routines that work with the LCD. Once the
LCD has been enabled (INT15h/Func B042h –see
Appendix E below)
The LCD can be written to as the standard I/O device. This
means that software can be developed and debugged
using standard I/O calls, and the executable will work with
LCD, VGA video, or redirected COM port. See the section
16 for more information.
I/O addresses 72h and 73h are used to access the LCD.
Figure 6 shows the header pin-out, while Table 3 lists the
LCD signals. The section below will briefly describe the
LCD interface signals. The LCD can be controlled directly
by software at these addresses.
The register select signal is simply the buffered A0 address
line. Thus, reads and writes to 72h cause register select to
be low, and those to 73h cause it to be high. Generally the
LCD uses this line to separate data bytes from command
bytes. See your LCD data sheet for details.
The LCD Write# signal is an active low write enable line.
LCD Enable is an active high signal, raised whenever the
LCD addresses are being read or written.
D0 –D7 are bi-directional, buffered copies of the data bus and carry all data and commands to the LCD.
Table 3 is not the standard pin-outs given for LCD displays. But this pin-out allows a standard ribbon
cable to be used when the ribbon cable is attached to the backside of the LCD.
Example LCD code is available at: http://www.embeddedx86.com/downloads/util.zip
9Matrix Keypad Support
The DIO2 port, signals DIO2_0 through DIO2_7, may be configured to support a 4 x 4 matrix keypad.
When enabled, BIOS firmware performs all the work, making the matrix keypad appear as a simple 16-
key keyboard to software. This allows the use of standard keyboard access routines. The default set of
keys translated by the BIOS consists of 0 –9, A –D, *, and #. The # key is returned as an ASCII
Carriage Return character (Hex 0D). Because the user is writing the software, this set of keys is usually
sufficient. However, a custom translation table can be loaded, allowing the use of function keys, arrow
keys, or any other key on the keyboard.
Matrix keypad support is enabled or disabled using INT15h, Function B040h (see Appendix F). Once
enabled, standard keyboard BIOS functions are enabled. Note that console redirection and the matrix
keypad support are mutually exclusive –console redirection must be disabled to use the keypad.
A matrix keypad can be used with console redirection only if the keypad is not used as stdin, but
accessed directly as a hardware device. This is useful if one wishes to use console redirection or to use
a PC/AT keyboard as stdin. See section 16 for an explanation of console I/O and redirection. See the
Technologic Systems download page for example code.
http://www.embeddedx86.com/downloads/keypad.zip
When using a matrix keypad, the DIO2 signals DIO2_0 through DIO2_7 are not available as general I/O.
Pin Function Comments
1LCD 5V
2LCD GND
3LCD_RS Register Select
(Buffered A0)
4Bias 680 Ohm to GND
5LCD_EN Active high Enable
6LCD_WR# Active low Write
7LCD_D1
8LCD_D0
9LCD_D3
10 LCD_D2
11 LCD_D5
12 LCD_D4
13 LCD_D7
14 LCD_D6
D0 –D7: Buffered
bi-directional data bus
Table 3 -LCD Header Signals

TS-5500 User’s Manual Technologic Systems
10/31/03
14
10 The 10/100 Base-T Ethernet Port
The TS-5500 has a full-function IEEE 802.3 (10/100 Mbit/sec) Ethernet port provided by Davicom
DM9102A Ethernet controllers. The DM9102A is a single-chip, 32-bit PCI Ethernet controller that
includes such features as full-duplex operation, power saving shutdownmodes, LED indicators for link
status/activity (Green) and auto-sense network speed detection (Amber). The physical interface is
10/100Base-T (RJ45 connector).
The TS-5500 has both a LINK/ACTIVITY LED and a 10/100 speed LED built into each RJ-45 connector
that indicates the current Ethernet status. The LINK LED (left side of connector, green) is active when a
valid Ethernet link is detected. This LED should be ON whenever the TS-5500 is powered on and
properly connected to a 10/100BaseT Ethernet network. The LINK/ACTIVITY LED will blink to indicate
network activity either inbound or outbound. The SPEED LED (right side of connector, amber) will be on
when a 100 Mbit network is detected and off for a 10 Mbit network. Both of these LEDs are controlled by
the DM9102A and do not require initialization by the processor.
10.1 LINUX TCP/IP configuration
When using the TS-5500 with TS-Linux, the DM9102A driver can be included in the kernel or loaded as
a kernel module. If the Technologic Systems kernel is used, the DM9102A driver is built into the kernel.
The settings stored in EEPROM on the TS-5500 are used to configure the DM9102A.
The TCP/IP settings for the TS-Linux are configured in the file ‘/etc/sysconfig/ifcfg-eth0’, here is a listing:
DEVICE=eth0 # Name of Ethernet interface
IPADDR=192.168.0.50 # IP address of this Ethernet interface.
NETMASK=255.255.255.0 # Used with NETWORK to determine local IP’s.
NETWORK=192.168.0.0 # Used with NETMASK to determine local
IP’s.
BROADCAST=192.168.0.255 # Broadcast IP for system wide messages.
ENABLE=yes # Initialize on startup
The TCP/IP network settings are configured in the file ‘/etc/sysconfig/network_cfg’, here is a listing:
### Technologic Systems
### General Network Configuration File
### NETWORKING=yes
GATEWAY=192.168.0.1 # Gateway for internet access
GW_DEV=eth0 # Gateway device to use
Hostname="miniepc.embeddedx86.com" # Host name for this computer
BOOTPROTO=no
DEFRAG_IPV4=no
FORWARD_IPV4=no
The TCP/IP name resolution server is configured in the file ‘/etc/resolv.conf’, here is a listing:
Nameserver 192.168.0.1 # Name server for domain name lookups.
To access the web server, open a web browser and enter “192.168.0.50” as the address. This
should display the sample web page which demonstrates some of the functionality of Apache with
PHP. Use the “ifconfig” command at the bash prompt to display the status of the Ethernet ports.
See the Technologic Systems Linux support page:
http://www.embeddedx86.com/support/linuxhelp.php

TS-5500 User’s Manual Technologic Systems
10/31/03
15
10.2 DOS TCP/IP configuration –Packet Driver and WATTCP
A standard packet driver for DOS is installed on the board as shipped, along with sample network
applications written with the public domain Waterloo TCP/IP software (WATTCP). WATTCP is a freely
available package (including source code) that provides TCP/IP connectivity for programs written for the
DOS environment. See the Technologic Systems download page
http://www.embeddedx86.com/downloads/wat2001t.zip
In addition, we have written a simple DOS HTTP web server using WATTCP that is included on the TS-
5500 utility disk. The simple web server uses CGI calls to control a DIO pin from a web browser. Full
source code is included, and you are free to modify and extend the code for your own use on
Technologic Systems Single Board Computers.
The DOS packet driver (DM9PCIPD.COM) is loaded by AUTOEXEC.BAT once DOS starts. Hardware
settings are read from the EEPROM chips and used by the packet driver to initialize each DM9102A.
Below is an example of the DOS command line to load a packet driver for the Ethernet interface:
DM9PCIPD 0X60
The TCP/IP settings for the WATTCP code are stored in the WATTCP.CFG configuration file in the
A:\ETHERNET directory, this file must be modified for the network environment where the TS-5500 will
be installed.
10.3 WATTCP.CFG configuration file
my_ip=192.168.0.20 // IP address of this Ethernet interface.
hostname="epc.embeddedx86.com" // Host name of this computer.
netmask=255.255.255.0 // Used to determine which IP’s are local.
gateway=192.168.0.1 // Gateway for internet access.
nameserver=192.168.0.1 // Name server for domain name lookups.
With the WATTCP.CFG file properly setup and the 10/100 base-T cable connected, you should be able
to ping other nodes on the network, i.e. ‘ping www.embeddedx86.com’
Other WATTCP examples include: serial to telnet redirector, http file download, telnet server, and finger,
web server with I/O control. Many more can be downloaded from the internet as freeware.
10.4 DOS TCP/IP configuration –MS Client for DOS
The Davicom Ethernet adapter has the MS Client for DOS driver available. This has been tested and
found to work on Windows workgroups as well as Samba workgroups. Check the Technologic Systems
web page for driver downloads (www.embeddedx86.com).
Email [email protected] with questions.

TS-5500 User’s Manual Technologic Systems
10/31/03
16
11 PCMCIA Bridge
11.1 Hardware
The TS-5500 uses a Texas Instruments PCI1510 single-slot CardBus controller designed to meet the
PCI Interface Specification for PCI to CardBus Bridges. The PCI-to-CardBus controller supports a single
PC card socket compliant with the PC Card Standard (rev. 7.2). The PC Card Standard retains the 16-
bit PC Card specification defined in the PCI Local Bus Specification and defines the 32-bit PC Card,
CardBus, capable of full 32-bit data transfers at 33 MHz. The TS-5500 supports both 16-bit and
CardBus PC Cards, powered at 5 V or 3.3 V, as required.
The PCI1510 is compliant with the PCI Local Bus Specification, and its PCI interface can act as either a
PCI master device or a PCI slave device. The PCI bus mastering is initiated during CardBus PC Card
bridging transactions.
All card signals are internally buffered to allow hot insertion and removal. The PCI1510 is register-
compatible with the Intel 82365SL-DF and 82365SL ExCA controllers. The PCI1510 internal data path
logic allows the host to access 8-, 16-, and 32-bit cards using full 32-bit PCI cycles for maximum
performance.
The PCMCIA Bridge uses IRQ10 to monitor card plug events and IRQ7 is used for the PC Card
interrupt.
11.2 Software (Linux support only)
Card Services for Linux is a complete PCMCIA support package. It includes a set of loadable kernel
modules that implement a version of the PCMCIA 2.1 Card Services applications program interface, a
set of client drivers for specific cards, and a card manager daemon that can respond to card insertion
and removal events, loading and unloading drivers on demand. It supports ``hot swapping'' of PCMCIA
cards, so cards can be inserted and ejected at any time.
The current package supports many ethernet cards, modems and serial cards, several SCSI adapters,
mostATA/IDE devices, and some SRAM and FLASH memory cards. All the common PCMCIA
controllers are supported, so it should run just about all Linux-capable devices.
The PCMCIA CS drivers are a standard install with the following changes to /etc/pcmcia/config.opts
REMOVED:
include port 0x0100-0x04ff, port 0x800-0x8ff
exclude irq7
ADDED:
exclude irq3
exclude irq4
exclude irq5
These changes will avoid trying to allocate the x100-x4ff region, which is unavailable to PCI devices in
the TS-5500. And will force the useof IRQ7 for the PCMCIA device, which the PCMCIA Bridge chip has
been programmed for in the BIOS during power up.
See /etc/pcmcia directory and the documentation on the sourceforge project page. (link below)
The home page for PCMCIA Card Services for Linux can be found @
http://pcmcia-cs.sourceforge.net/

TS-5500 User’s Manual Technologic Systems
10/31/03
17
11.3 Supported Devices
There is a very large list of devices supported by the Linux Card Services package available on the
sourceforge page. Here is a list of devices tested at Technologic Systems and known to work with the
TS-5500:
802.11b Wireless Ethernet adapters
Belkin F5D6020 (16-bit version not CardBus version)
Netgear MA401
Orinoco Gold PC24E-H-FC
Phoebe WLC010(INT)
Cellular Modem
Novatel Merlin C201 Sprint PCS Connection Card
Hard Drives
Toshiba MK5002MPL 5GB Hard Disk Drive
Sandisk Compact Flash w/PCMCIA to Compact Flash Adapter
Modem
Actiontec DataLink Fax/Modem
Ethernet adapters
SoHoware ND5120-E 16-bit 10 Mbps adapter
Netgear FA511 32-bit CardBus 10/100 adapter
Hawking Technology 32-bit CardBus 10/100 adapter
12 USB Bridge
12.1 Hardware
The TS-5500 uses the FireLink 82C861 USB controller, this is the de-facto Industry Standard USB
Controller from OPTi. The 82C861 controller is fully compatible with the USB OHCI (OpenHCI)
specification and supports speeds up to 12 Mbps under USB Rev 1.1. The TS-5500 provides two USB
ports with individual power switching and over current shutdown. The USB controller is connected as a
standard PCI device on the TS-5500 using interrupt 9.
12.2 Software (Linux Support Only)
The USB drivers are standard kernel modules loaded by the Hotplug scripts. The kernel drivers are
compiled as part of the kernel make. The modules selected are a minimal to keep the embedded file
system small. Additional modules can by added by adding them in the kernel configuration screens and
recompiling the kernel. The Linux support page on the Technologic Systems web site will provide a
patch for the Linux kernel that is the best starting point for any kernel changes. Any standard Linux
drivers should work with our system.
The Hotplug scripts will automatically detect and configure supported Linux devices. See the Hotplug
project web site for more details and a comprehensive supported devices list. See the /etc/hotplug
directory on the TS-5500 for configuration scripts.
Hotplug web site: http://linux-hotplug.sourceforge.net/
Linux USB web site: http://www.linux-usb.org/
Technologic Systems web site, see Linux Support Page: http://www.embeddedx86.com/

TS-5500 User’s Manual Technologic Systems
10/31/03
18
12.3 Supported Devices
Here is a list of devices tested at Technologic Systems and known to work with the TS-5500,
many other USB devices will work with the TS-5500, see the kernel drivers and the Linux-USB
web sites for more information.
Compact Flash adapters
Sandisk SDDR-31
Sandisk SDDR-05
SIIG US2256
Flash Drives
HyperSecurity
Transcend
Web Cams
Digital Cameras
Ricoh RDC-5300
Serial adapters
13 Real Time Clock
The Dallas Semiconductor DS12887 is used for the PC compatible battery-backed real-time clock. It is
a completely self-contained module that includes a Motorola 146818 compatible clock chip, the 32.768
kHz crystal, the lithium battery, and 114 bytes of battery-backed CMOS RAM. It is guaranteed to
maintain clock operation for a minimum of 10 years in the absence of power. It is located at the standard
PC I/O addresses of Hex 070 and 071. The top 48 bytes (index 50h through 7Fh) are not used by the
BIOS and are available for user applications.
The RTC is capable of generating a square wave output function with a period of 500 mSec to 122
uSec. The square wave output pin is connected to IRQ8 on the processor, and can be used to generate
periodic interrupts. The keypad example code uses this function to generate interrupts at a 256 Hz rate.
http://www.embeddedx86.com/downloads/keypad.zip

TS-5500 User’s Manual Technologic Systems
10/31/03
19
Bits 0-7Timeout Value
01h 0.5 milliseconds
02h 0.5 seconds
04h 1 second
08h 2 seconds
10h 4 seconds
20h 8 seconds
40h 16 seconds
80h 32 seconds
Table 4 Watchdog Timer Timeout Values
14 Watchdog Timer The AMD Elan520 contains a 32-bit watchdog timer
(WDT) unit that can be used to prevent a system
“hanging” due to a software failure. The WDT can
be programmed to cause an interrupt or a full
system reset when the WDT times out allowing a
guaranteed recovery time from a software error. To
prevent a WDT timeout, the application must
periodically “feed” the WDT by writing a “clear-count
key sequence” to the Watchdog Timer Control
(WDTMRCTL) register.
The WDT must be initialized with the timeout period
desired. This may be as short as 0.5 mS or may be
as high as 32 seconds. After the WDT has been
enabled, the 32-bit watchdog counter starts counting
from zero. The application software can reset this
counter at any time by writing a “clear-count key
sequence” to the WDTMRCTL. If this counter
reaches the timeout period, then an interrupt is
generated, or a system reset occurs.
If programmed to cause an interrupt, the WDT must
be fed within the next timeout period or else a
system reset occurs as an additional failsafe
feature.
In order to load the WDTMRCTL register, a specific
sequence of three word writes is required. A 3333h,
followed by CCCCh, followed by the value to be
loaded into the WDTMRCTL register must be written
to the WDTMRCTL register.
In order to clear the WDT counter (feeding the
watchdog), a “clear-count key sequence” must be
written to the WDTMRCTL register. This is a
specific two word write sequence with a write of
AAAAh, followed by a write of 5555h. (Writing this
“clear-count key sequence” has no effect on the
contents of the WDTMRCTL register)
Typically a system reset at timeout is the preferred
method for using the WDT, if you wish to have an
interrupt occur before the system reset occurs (bit
14 = 0 in the WDTMRCTL Register), additional
programming is required to “attach” a specific IRQ to
the WDT. An interrupt service routine must also be
written to handle this IRQ. Please see the AMD
Elan520 User’s Manual or contact Technologic
Systems.
Bit Position Function
Bit 15 1 = Enable WDT
Bit 14 1 = Generate Reset at Timeout
0 = Generate Interrupt at Timeout
Bit 13 Must always be 0
Bit 12 1 = WDT Interrupt has occurred
(Interrupt routine must clear this bit)
Bits 8-11 Must always be 0
Bits 0-7TimeoutValue (See Table 4)
Table 5–WDTMRCTL Register
Register Memory
Address
WatchDog Control (WDTMRCTL) DFCB0h
WDT Counter Bits 0-15 (Read only) DFCB2h
WDT Counter Bits 16-31 (Read only) DFCB4h
WDT Interrupt Mapping DFD42h
Table 6-WatchDog Timer Memory Map