Technologic Systems TS-ETH100 User manual

GETTING STARTED WITH TS-ETH100
10/100 ETHERNET PERIPHERAL BOARD
OVERVIEW
The TS-ETH100 is a PC/104 peripheral board (standard format) that provides a 10/100
Ethernet port. The TS-ETH100 is ompatible with both Te hnologi Systems x86 and ARM
single board omputers. TS-ETH100 features in lude:
✔10/100 Ethernet Port
✔Jumper sele table I/O and IRQ
✔PC/104 Dimensions 3.6 x 3.8 in hes
✔Wake-on-LAN
✔Linux driver and utilities available
✔RoHS ompliant (Restri tion of Certain Hazardous Substan es)
The TS-ETH100 provides an integrated 10/100 ethernet port through the ASIX AX88796B
embedded MAC with on- hip PHY. It interfa es with the PC/104 onne tor via 16-bit data
bus and the register map is NE2000 ompatible. The ASIX solution features Wake-on-LAN
fun tionality, enabling the Ethernet hip to enter in sleep mode with programmed wake-up on
the re epetion of a magi network pa kage.
PRODUCT VIEW
HARDWARE CONFIGURATION
The TS-ETH100 jumpers sele t one-of-three IRQ lines and one-of-four I/O address regions.
Also, it is possible to do PC/104 16-bit a ess using only the 64-pin PC/104 onne tor in
ARM mode if the ARM jumper is ON. Jumpers IRQ5, IRQ6 and IRQ7 (ARM IRQs 22, 33 and
40, respe tively) sele ts the desired ISA IRQ line for the TS-ETH100 MAC.
There are two on-board LEDs for the MAC, indi ating speed of the link and network a tivity
on the able.
I/O ADDRESS
The PLD and MAC I/O address lo ations an be onfigured using jumpers Add1 and Add2
a ording to the table below:
© Nov, 2007 www.em eddedARM.com 1

GETTING STARTED WITH TS-ETH100
10/100 ETHERNET PERIPHERAL BOARD
Jumper settings for I/O
address space selection
PLD I/O MAC I/O Add1 Add2
0x100 0x200 OFF OFF
0x110 0x240 ON OFF
0x120 0x300 OFF ON
0x130 0x340 ON ON
Note
TS-ARM (TS-7000 SBC's) I/O spa e
starts at 0x11E0_0000 physi al address.
e.g. 0x100 I/O spa e is de oded at
0x11E0_0100 physi al memory
BASE REGISTER MAP
The TS-ETH100 has 4 registers of 4-bits ea h whi h are implemented on the PLD.
I/O Addr Description Data Access Bits and such
Base+0x0 Board identifier Read only returns 0x5 unique ID to verify presen e
Base+0x4 PLD revision Read only Returns PLD revision
Base+0x8 SRAM ontrol
register
Read only bit 3 = IRQ7 jumper status (1=ON, 0=OFF)
bit 2 = IRQ6 jumper status (1=ON, 0=OFF)
bit 1 = IRQ5 jumper status (1=ON, 0=OFF)
bit 0 = ARM jumper status (1=ON, 0=OFF)
For a omplete des ription of the MAC register map (whi h is NE2000 ompatible), please
refer to the ASIX AX88796B do umentation.
SOFTWARE SUPPORT
The register map of ASIX AX88796B ethernet hip is NE2000 ompatible, so driver support
is straight-forward. Te hnologi Systems provides a Linux driver for the ASIX Ethernet
interfa e suitable for both Kernel versions 2.4 and 2.6. The Linux driver provided dete ts
jumper sele tion, automati ally onfiguring IRQ and IO parameters. In ase one wants to
skip this feature, the “mem” and “irq” parameters are available to set up I/O base address
and IRQ line, respe tively. To load the driver using the auto-dete tion and Kernel 2.4, use:
# insmod –f ax88796b.o
To load the driver using the parameters and Kernel 2.4 for ARM, with a board with only the
IRQ5 jumper ON, use:
# insmod –f ax88796b.o mem=0x100 irq=33
Noti e that in some systems the kernel module “ r 32.o” must be loaded before the TS-
ETH100 driver. In addition, Te hnologi Systems provides Linux tools to manage the Wake-
on-LAN fun tion. A Linux tool to program the MAC address on the EEPROM hip is also
provided. Conta t Te hnologi Systems for further information regarding software support.
CONTACT TECHNOLOGIC SYSTEMS
16610 East Laser Drive #10
Fountain Hills, AZ 85268
TEL [phone]
FAX [phone]
www.em eddedARM.com
support@em eddedARM.com
DOCUMENT HISTORY
11.26.2007 – CREATED
© Nov, 2007 www.em eddedARM.com 2