Texas Instruments TPS54160EVM-230 User manual

User's GuideSLVU270 – September 2008
TPS54160EVM-230
Contents1 Introduction ................................................................................................................... 21.1 Background .......................................................................................................... 22 Connector Description....................................................................................................... 22.1 Input/Output Connector Descriptions............................................................................. 23 Performance Specifications ................................................................................................ 33.1 Top Converter Specification ....................................................................................... 33.2 Bottom Converter Specification ................................................................................... 44 Test Results .................................................................................................................. 65 Board Layout ................................................................................................................ 115.1 Layout ............................................................................................................... 116 Schematic and Bill of Materials ........................................................................................... 176.1 Schematic .......................................................................................................... 176.2 Bill of Materials .................................................................................................... 18
List of Figures
1 Synchronization to an External Clock .................................................................................... 52 Top Converter Efficiency .................................................................................................... 63 Bottom Converter Efficiency ............................................................................................... 64 Top Converter Transient Response, 0.5A to 1.5A step, Vin=42V ..................................................... 65 Bottom Converter Transient Response, 0.5A to 1.5A step, Vin=48V ................................................. 76 Top Converter Output Voltage Ripple, Vin=42V, Iout=1.5A ............................................................ 77 Bottom Converter Output Voltage Ripple, Vin=60.0V, Iout=1.5A ..................................................... 78 Top Converter Input Voltage Ripple, Vin=42.0V, Iout=1.5A ........................................................... 89 Bottom Converter Input Voltage Ripple, Vin=48.0V, Iout=1.5A ........................................................ 810 Top Converter Start-up relative to Vin, Vin=42V, Iout=1.5A ........................................................... 811 Top Converter UVLO relative to Vin, Iout=1.5A ......................................................................... 912 Bottom Converter Start-up relative to Vin, Vin=60.0V, Iout=1.5A ..................................................... 913 Bottom Converter Start-up relative to EN, Vin=60.0V, Iout=1.5A ..................................................... 914 Bottom Converter Loop Response, Vin=36V, Iout=1.0A .............................................................. 1015 Top Converter Loop Response, Vin=42V, Iout=1.0A .................................................................. 1016 Assembly Layer............................................................................................................. 1217 Top Layer Routing ......................................................................................................... 1318 Layer 2 Routing ............................................................................................................. 1419 Layer 3 Routing ............................................................................................................. 1520 Bottom Layer Routing ...................................................................................................... 1621 TPS54160EVM-230 Schematic .......................................................................................... 17
List of Tables
1 Top Converter Specifications............................................................................................... 42 Bottom Converter Specifications ........................................................................................... 43 TPS54160EVM-230 Bill of Materials – Top Converter ................................................................ 184 TPS54160EVM-230 Bill of Materials – Bottom Converter ............................................................ 18
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1 Introduction
1.1 Background
2 Connector Description
2.1 Input/Output Connector Descriptions
2.1.1 J1 – VIN Top Converter
2.1.2 J2 – GND Top Converter
2.1.3 J3 – VOUT Top Converter
2.1.4 J4 – VOUT Top Converter
2.1.5 J5 – VIN Bottom Converter
Introduction
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The TPS54160EVM-230 evaluation module (EVM) helps designers evaluate the operation andperformance of the TPS54160 DC/DC converter. This converter is a wide input voltage (3.5 - 60V),2.5MHz, non-synchronous, externally compensated, step down converter capable of 1.5A of outputcurrent.
The TPS54160EVM-230 provides two independent DC/DC converters based on the TPS54160. Theconverter at the top of the board (top converter) is designed to operate from a nominal 42VDC ±25% inputvoltage source. This input voltage range is typical for input supplies derived from rectified 24VAC sources.The top converter provides a 5.0V output and up to 1.5A of output current. The top converter highlights asmall solution size by using 0402 components with the minimum number of parts needed to provide a fullyfunctional DC/DC converter complete with a programmed enable/disable voltage and soft start features.
The converter at the bottom of the board (bottom converter) is designed to operate from 6.0V to 60V, themaximum recommended input voltage the TPS54160. The bottom converter provides a 3.3V output withup to 1.5A of output current. The bottom converter has additional component footprints that can be usedby the designer to implement a variety of TPS54160 solutions.
This chapter describes the jumpers and connectors on the EVM as well as how to properly connect, setup,and use the TPS54160EVM-230.
This is the positive input supply voltage to the top converter. The leads to the input supply should betwisted and kept as short as possible to minimize EMI transmission. Additional bulk capacitance should beadded between J1 and J2 if the supply leads are greater than six inches. An additional 47 µF or greatercapacitor improves the transient response of the TPS54160 and helps to reduce ringing on the input whenlong supply wires are used.
This is the return connection for the input power supply of the top converter.
This is the positive connection from the output of the top converter. Connect this pin to the positive input ofthe load.
This is the return connection for the output of the top converter.
This is the positive input supply voltage to the bottom converter. The leads to the input supply should betwisted and kept as short as possible to minimize EMI transmission. Additional bulk capacitance should beadded between J5 and J6 if the supply leads are greater than six inches. An additional 47 µF or greatercapacitor improves the transient response of the TPS54160 and helps to reduce ringing on the input whenlong supply wires are used.
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2.1.6 J6 – GND Bottom Converter
2.1.7 J7 – ENABLE Bottom Converter
2.1.8 J8 – TRACK Bottom Converter
2.1.9 J9 – CLK Bottom Converter
2.1.10 J10 – VOUT Bottom Converter
2.1.11 J11 – GND
2.1.12 J12 – PG Top Converter
2.1.13 J13 – PG Bottom Converter
3 Performance Specifications
3.1 Top Converter Specification
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Performance Specifications
This is the return connection for the input power supply of the bottom converter.
Pin 1 of this connector is tied to the EN pin of the bottom converter. Pin 2 of this connector is tied to theground plane of the bottom converter. Shorting pin 1 to 2 will disable the converter. Leaving pin 1 and 2open enables the bottom converter.
Pin 1 of this connector is tied to the SS pin of the bottom converter. Pin 2 of this connector is tied to theground plane of the bottom converter. Shorting pin 1 to 2 will disable the converter. Leaving pin 1 and 2open enables the bottom converter.
Pin 1 of this connector is tied to the RT/CLK pin of the bottom converter. Pin 2 of this connector is tied tothe ground plane of the bottom converter.
This is the positive connection from the output of the bottom converter. Connect this pin to the positiveinput of the load.
This is the return connection for the output of the bottom converter.
Pin 1 of this connector is tied to the PWRGD output pin of the top converter. Pin 2 of this connector is tiedto the ground plane of the top converter. R4 is pull up resistor for the PG pin and is connected to theoutput voltage. The maximum voltage of the PWRGD pin is 6V. If the output voltage of the converter is setto any value higher than 6.0V, then R4 must be removed from the board to avoid damaging theTPS54160.
Pin 1 of this connector is tied to the PWRGD pin of the bottom converter. Pin 2 of this connector is tied tothe ground plane of the bottom converter. R12 is pull up resistor for the PG pin and is connected to theoutput voltage. The maximum voltage of the PWRGD pin is 6V. If the output voltage of the converter is setto any value higher than 6.0V, then R12 must be removed from the board to avoid damaging theTPS54160.
Table 1 provides a summary of the top converters specifications. The top converter is designed and testedfor VIN = 31.5V to 52.5V. Operation at other input voltages is possible but some performancespecifications will vary compared to those shown in Table 2 . The ambient temperature is 25 °C for allmeasurements, unless otherwise noted.
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3.1.1 Modifications of the Top Converter
3.2 Bottom Converter Specification
Performance Specifications
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Table 1. Top Converter Specifications
SPECIFICATION TEST CONDITIONS MIN TYP MAX UNIT
VIN input voltage range 31.5 42 52.5 VOutput voltage 5.0 VOutput current range 0 1.5 A1 %/VLoad regulation Vin = 42 V 0.13 %/AVoltage change 225 mVLoad transient response
Recovery time 1.0 msLoop bandwidth 29.8 kHzPhase margin 43 °Output voltage ripple Vin = 42 V, Iout = 1.5 V 10 mVppOperating frequency 750 kHzMaximum efficiency Vin = 42 V, Iout = 800 mA 81.5%Converter enable voltage Vin rising, Io = 1 A 25.8 VConverter disable voltage Vin falling, Io = 1 A 25.5 VOutput rise time 32 ms
The top converter is meant to show a small solution size so most of the parts have been selected for theirsmall size. This makes modifications to the top converter difficult since many components are 0402 size.Additionally, to reduce size, there are no additional connectors or jumpers to connect control signals toexternal circuits. The bottom converter was designed to be more adjustable and accommodate off boardsignals and parts that are easier to solder. The bottom converter should be used to evaluate circuitmodifications.
Table 1 provides a summary of the top converters specifications. The bottom converter is designed andtested for VIN = 6.0V to 60V. Operation at other input voltages is possible, but some performancespecifications will vary compared to those shown in Table 2 . The ambient temperature is 25 °C for allmeasurements, unless otherwise noted.
Table 2. Bottom Converter Specifications
SPECIFICATION TEST CONDITIONS MIN TYP MAX UNIT
VIN input voltage range 6 60 VOutput voltage 3.3 VOutput current range 0 1.5 ALine regulation Iout = 1.5 A, Vin = 6 V to 60 V 0.1 %/VLoad regulation 0.11 %/AVoltage change 120 mVLoad transient response
Recovery time 2.0 msLoop bandwidth 18.5 kHzPhase margin 72 °Output voltage ripple 40 mVppOperating frequency 415 kHzMaximum efficiency Vin = 5 V, Iout = 200 mA 94.60%Output rise time 32 ms
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3.2.1 Modifications of the Bottom Converter
3.2.2 Output Voltage Set Point
Vout
R14 = R15 1
0.8
æ ö
´ -
ç ÷
è ø
(1)
3.2.3 External Clock Synchronization
TPS54160
Rt/Clk
C18
10pF
R11
Rt
R16
49.9 Ω
R17
0 Ω
J9
1
2
TPS54160EVM
3.2.4 Programmable Under Voltage Lock Out and Enable
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Performance Specifications
The bottom converter provides several features that allow custom TPS54160 designs to be evaluated.Many of the control signals are routed to external connectors for easy access. Additionally, the board uses0603 or larger components and multiple component footprints to ease soldering and assembly of customdesigns.
To change the output voltage of the EVM, it is necessary to change the value of resistor R14. The value ofR14 can be calculated using Equation 1 . The converter should be re-compensated if the output voltage isaltered from the factory default
The PWRGD pin of the TPS54160 is pulled up to the output voltage by R4 on the top converter and R12on the bottom converter. The absolute maximum voltage rating of the PWRGD pin is 6.0V. If the outputvoltage of either converter is modified to be above 6.0V, then the corresponding pull up resistor should beremoved so that the absolute maximum rating of the IC is not exceeded.
The EVM supports connection of an external oscillator for the TPS54160 to synchronize too. A zero ohmresistor should be installed for R17 and a 10pF capacitor installed for C18. Figure 1 shows theconnections and components to synchronize to an external clock source.
Figure 1. Synchronization to an External Clock
The Under Voltage Lock-out (UVLO) and Enable voltages of the TPS54160 have programmable values asshown in the datasheet. The UVLO and Enable levels are programmed using R8 and R9 on the EVM. Seethe TPS54160 data sheet for how to select the value of these resistors. Capacitor C19 can be installed toadd a delay or noise filtering on the EN pin.
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4 Test Results
0.6
0.65
0.7
0.75
0.8
0.85
0.9
0.95
1
0500 1000 1500
I - Output Current - mA
O
Efficiency - %
42 V
0.5
0.55
0.6
0.65
0.7
0.75
0.8
0.85
0.9
0.95
1
0 200 400 600 800 1000 1200 1400
60 V
48 V
36 V
24 V
12 V
5 V
Efficiency - %
I - Output Current - mA
O
Vout
Load Current
50 mV/div
500 mA/div
Test Results
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This chapter provides typical performance waveforms for the TPS54160EVM-279 board.
Figure 2. Top Converter Efficiency
Figure 3. Bottom Converter Efficiency
Figure 4. Top Converter Transient Response, 0.5A to 1.5A step, Vin=42V
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Vout
Load Current
50 mV/div
500 mA/div
Vout
Inductor Ripple Current
10 mV/div
100 mA/div
IL
Vout
20 mV/div
200 mA/div
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Test Results
Figure 5. Bottom Converter Transient Response, 0.5A to 1.5A step, Vin=48V
Figure 6. Top Converter Output Voltage Ripple, Vin=42V, Iout=1.5A
Figure 7. Bottom Converter Output Voltage Ripple, Vin=60.0V, Iout=1.5A
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Vin
PH
100 mV/div
20 V/div
Vin
PH
100 mV/div
20 V/div
Vin
Vout
20 V/div
2 V/div
Test Results
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Figure 8. Top Converter Input Voltage Ripple, Vin=42.0V, Iout=1.5A
Figure 9. Bottom Converter Input Voltage Ripple, Vin=48.0V, Iout=1.5A
Figure 10. Top Converter Start-up relative to Vin, Vin=42V, Iout=1.5A
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Vin
Vout
20 V/div
2 V/div
Vin
Vout
20 V/div
1 V/div
EN
Vout
2 mV/div
1 V/div
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Test Results
Figure 11. Top Converter UVLO relative to Vin, Iout=1.5A
Figure 12. Bottom Converter Start-up relative to Vin, Vin=60.0V, Iout=1.5A
Figure 13. Bottom Converter Start-up relative to EN, Vin=60.0V, Iout=1.5A
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5 Board Layout
5.1 Layout
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Board Layout
This chapter provides the TPS54160EVM-230 board layout and illustrations.
Figure 16 through Figure 20 show the layout for each layer of the TPS54160 EVM. The top and bottomlayers of the board are 2-oz. copper and the internal layers are 1-oz. copper. The top layer ispredominantly used to route the high current traces of the input and output voltages. Some noise sensitivetraces, such as the feedback trace, have been routed on the bottom layer so that they are shielded by thelarge ground plane on the bottom layer. The two inner layers do not have any traces routed on them butdo provide additional heat sinking for the ICs.
Board layout is critical for all high frequency switch mode power supplies. The nodes with high switchingfrequencies and currents are kept as short as possible to minimize trace inductance. Careful attention hasbeen given to the routing of high frequency current loops and a single point grounding scheme is used.Refer to the datasheet for specific layout guidelines.
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6.2 Bill of MaterialsSchematic and Bill of Materials
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Table 3. TPS54160EVM-230 Bill of Materials – Top Converter
QTY RefDes Value Description Size Part Number MFR
Capacitor, Ceramic, 100V, X7R,2 C1, C17 2.2 µF 1210 Std Std10%
Capacitor, Ceramic, 6.3V, X5R,1 C15 15 pF 0402 Std Std20%
Capacitor, Ceramic, 6.3V, X5R,1 C2 0.1 µF 0402 Std Std20%1 C3 0.1 µF Capacitor, Ceramic, 10V, X5R, 20% 0402 Std StdCapacitor, Ceramic, 6.3V, X5R,1 C4 3300 pF 0402 Std Std20%
Capacitor, Ceramic, 6.3V, X5R,1 C5 47 µF 1206 Std Std20%1 D1 ZXSDS2M832 Diode. Dual Schottky 60V, 1.65A MLP832 ZXSDS2M832 ZetexJ1-J4, Header, 2-pin, 100mil spacing,5 PTC36SAAN 0.100 inch x 2 PTC36SAAN SullinsJ12 (36-pin strip)1 L1 27 µH Inductor, SMT, 2.48A, 89 m Ω0.402 x 0.394 inch MSS1038-273ML Coilcraft1 R1 113 k ΩResistor, Chip, 1/16W, 1% 0402 Std Std1 R2 5.49 k ΩResistor, Chip, 1/16W, 1% 0402 Std Std1 R3 154 k ΩResistor, Chip, 1/16W, 1% 0402 Std Std2 R4, R7 10.0 k ΩResistor, Chip, 1/16W, 1% 0402 Std Std1 R5 88.7 k ΩResistor, Chip, 1/16W, 1% 0402 Std Std1 R6 53.6 k ΩResistor, Chip, 1/16W, 1% 0402 Std Std1 U1 TPS54160DGQ IC, DC-DC Converter, 60V, 1.5A MSOP-10 TPS54160DGQ TI
Table 4. TPS54160EVM-230 Bill of Materials – Bottom Converter
QTY RefDes Value Description Size Part Number MFR
Capacitor, Ceramic, 6.3V, X5R,1 C11 68 pF 0603 Std Std20%
Capacitor, Ceramic, 6.3V, X5R,1 C12 5600 pF 0603 Std Std20%
Capacitor, POSCAP, 220uF, 10V,1 C13 220 µF 7343 (D) 10TPB220M Sanyo40milliohm, 20%Capacitor, Ceramic, 50V, X7R,1 C16 0.1 µF 0805 Std Std10%C18, Capacitor, Ceramic, 6.3V, X5R,0 Open 0603 Std StdC19 20%
Capacitor, Aluminum, SM, 20%,0 C6 Open 0.328 x 0.328 inch EEVFK1xxxxP Panasonic100V
Capacitor, Ceramic, 100V, X7R,2 C7, C14 2.2 µF 1210 Std Std10%
Capacitor, Ceramic, 100V, X7R,1 C8 0.1 µF 0805 Std Std10%
Capacitor, Ceramic, 10V, X5R,2 C9, C10 0.1 µF 0603 Std Std20%1 D2 B260 Diode, Schottky, 60V, 2A SMB B260 VishayJ5-J11, Header, 2-pin, 100mil spacing,8 PTC36SAAN 0.100 inch x 2 PTC36SAAN SullinsJ13 (36-pin strip)1 L2 27 µH Inductor, SMT, 2.48A, 89 m Ω0.402 x 0.394 inch MSS1038-273ML Coilcraft1 R11 249 k ΩResistor, Chip, 1/16W, 1% 0603 Std Std
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Schematic and Bill of Materials
Table 4. TPS54160EVM-230 Bill of Materials – Bottom Converter (continued)
QTY RefDes Value Description Size Part Number MFR
R12,2 10.0 k ΩResistor, Chip, 1/16W, 1% 0603 Std StdR151 R13 162 k ΩResistor, Chip, 1/16W, 1% 0603 Std Std1 R14 31.6 k ΩResistor, Chip, 1/16W, 1% 0603 Std Std1 R16 49.9 ΩResistor, Chip, 1/16W, 1% 0603 Std StdR8, R9,0 Open Resistor, Chip, 1/16W, 1% 0603 Std StdR171 U2 TPS54160DGQ IC, DC-DC Converter, 60V, 1.5A MSOP-10 TPS54160DGQ TI
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EVALUATION BOARD/KIT IMPORTANT NOTICE
Texas Instruments (TI) provides the enclosed product(s) under the following conditions:This evaluation board/kit is intended for use for ENGINEERING DEVELOPMENT, DEMONSTRATION, OR EVALUATION PURPOSESONLY and is not considered by TI to be a finished end-product fit for general consumer use. Persons handling the product(s) must haveelectronics training and observe good engineering practice standards. As such, the goods being provided are not intended to be completein terms of required design-, marketing-, and/or manufacturing-related protective considerations, including product safety and environmentalmeasures typically found in end products that incorporate such semiconductor components or circuit boards. This evaluation board/kit doesnot fall within the scope of the European Union directives regarding electromagnetic compatibility, restricted substances (RoHS), recycling(WEEE), FCC, CE or UL, and therefore may not meet the technical requirements of these directives or other related directives.Should this evaluation board/kit not meet the specifications indicated in the User’s Guide, the board/kit may be returned within 30 days fromthe date of delivery for a full refund. THE FOREGOING WARRANTY IS THE EXCLUSIVE WARRANTY MADE BY SELLER TO BUYERAND IS IN LIEU OF ALL OTHER WARRANTIES, EXPRESSED, IMPLIED, OR STATUTORY, INCLUDING ANY WARRANTY OFMERCHANTABILITY OR FITNESS FOR ANY PARTICULAR PURPOSE.The user assumes all responsibility and liability for proper and safe handling of the goods. Further, the user indemnifies TI from all claimsarising from the handling or use of the goods. Due to the open construction of the product, it is the user’s responsibility to take any and allappropriate precautions with regard to electrostatic discharge.EXCEPT TO THE EXTENT OF THE INDEMNITY SET FORTH ABOVE, NEITHER PARTY SHALL BE LIABLE TO THE OTHER FOR ANYINDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES.TI currently deals with a variety of customers for products, and therefore our arrangement with the user is not exclusive.
TI assumes no liability for applications assistance, customer product design, software performance, or infringement of patents orservices described herein.
Please read the User’s Guide and, specifically, the Warnings and Restrictions notice in the User’s Guide prior to handling the product. Thisnotice contains important safety information about temperatures and voltages. For additional information on TI’s environmental and/orsafety programs, please contact the TI application engineer or visit www.ti.com/esh .No license is granted under any patent right or other intellectual property right of TI covering or relating to any machine, process, orcombination in which such TI products or services might be or are used.FCC Warning
This evaluation board/kit is intended for use for ENGINEERING DEVELOPMENT, DEMONSTRATION, OR EVALUATION PURPOSESONLY and is not considered by TI to be a finished end-product fit for general consumer use. It generates, uses, and can radiate radiofrequency energy and has not been tested for compliance with the limits of computing devices pursuant to part 15 of FCC rules, which aredesigned to provide reasonable protection against radio frequency interference. Operation of this equipment in other environments maycause interference with radio communications, in which case the user at his own expense will be required to take whatever measures maybe required to correct this interference.
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265Copyright © 2008, Texas Instruments Incorporated
EVM WARNINGS AND RESTRICTIONS
It is important to operate this EVM within the input voltage range of 3.5 V to 60 V and the output voltage range of 0.8 V to 60 V.Exceeding the specified input range may cause unexpected operation and/or irreversible damage to the EVM. If there are questionsconcerning the input range, please contact a TI field representative prior to connecting the input power.Applying loads outside of the specified output range may result in unintended operation and/or possible permanent damage to the EVM.Please consult the EVM User's Guide prior to connecting any load to the EVM output. If there is uncertainty as to the load specification,please contact a TI field representative.During normal operation, some circuit components may have case temperatures greater than 85 °C. The EVM is designed to operateproperly with certain components above 85 °C as long as the input and output ranges are maintained. These components include but arenot limited to linear regulators, switching transistors, pass transistors, and current sense resistors. These types of devices can be identifiedusing the EVM schematic located in the EVM User's Guide. When placing measurement probes near these devices during operation,please be aware that these devices may be very warm to the touch.
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265Copyright © 2008, Texas Instruments Incorporated
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