Texas Instruments bq2403 Series User manual

User's GuideSLUU207A – October 2004 – Revised January 2007
bq2403x ( bqTiny-III™) 1.5-A Single-Chip Li-Ionand Li-Pol Charge Management IC EVM
This user’s guide describes the bq2403x ( bqTiny-III™) Evaluation Module. The EVMprovides a convenient method for evaluating the performance of a charge managementand system power solution for portable applications using the bq2403x product family.A completly designed and tested module is presented. The charger is designed todeliver up to 1.5 A of continuous current to the system or charger for one-cell Li-ion orLi-polymer applications (see the data sheet for correct device, x) using a dc powersupply. The charger is programmed from the factory to deliver 1 A of charging current.
Contents1 Introduction .......................................................................................... 22 Considerations When Testing and Using bq2403x ICs ........................................ 23 Performance Specification Summary ............................................................ 34 Test Summary ...................................................................................... 35 Schematic ........................................................................................... 76 Physical Layouts .................................................................................... 87 Bill of Materials .................................................................................... 138 References ......................................................................................... 14
List of Figures
1 Test Diagram ........................................................................................ 42 bq2403x EVM Schematic .......................................................................... 73 Top Assembly View ................................................................................ 84 Board Layout – Top Etch Layer .................................................................. 95 Board Layout – Second Etch Layer ............................................................ 106 Board Layout – Third Etch Layer ............................................................... 117 Board Layout – Bottom Etch Layer ............................................................. 12
List of Tables
1 Performance Specification Summary For bq24030/1/2/5 EVMs ............................. 32 Bill of Materials .................................................................................... 13
bqTiny-III is a trademark of Texas Instruments.
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1 Introduction
2 Considerations When Testing and Using bq2403x ICs
Introduction
The bqTiny-III powers the system while independently charging the battery. This feature reduces thecharge and discharge cycles on the battery, allows for proper charge termination, and allows the systemto run with an absent or defective battery pack. This feature also allows for the system to instantaneouslyturn on from an external power source even when using a deeply discharged battery pack.
The bqTiny-III automatically selects the USB port or the ac adapter as the power source for the system. Inthe USB configuration, the host can select from the two preset input maximum rates of 100 mA and 500mA. The bqTiny-III dynamically adjusts the USB charge rate based on the system load to stay within the100-mA or 500-mA maximum rates. The AC pin can be programmed to perform like a USB input bypulling the PSEL pin low. An external resistor, RSET1, sets the magnitude of the charge current. If thecharge current exceeds the available input current, the voltage on the OUT pin drops to the DPPM
OUTthreshold or the battery voltage, which ever is higher. The charging current is reduced to what current isavailable (I
BAT
= I
IN
–I
OUT
).
The bqTiny-III charges the battery in three phases: conditioning, constant current, and constant voltage.Charge is terminated based on minimum current. A resistor-programmable charge timer provides abackup safety for charge termination. The bqTiny-III automatically re-starts the charge if the batteryvoltage falls below an internal threshold. The bqTiny-III automatically enters sleep mode when bothsupplies are removed (a drop to the battery voltage).
Consider the following noteworthy items while testing and using the bq2403x ICs.
There are three ICs (bq24030/1/2/5) to select from. The significant difference is the OUT pin voltage. Thebq24030/1 has a LDO 6-V regulator connected the OUT pin. The intent on this charger is to provide asolution for using an inexpensive unregulated adaptor to power the charger. When unloaded, a 5-VDCadapter peak charges to ~8 V, but when loaded it quickly drops closer to 5 V. Since this is a linearregulator/charger, the higher the input voltage the lower the current level has to be to not exceed thepower rating of the IC. The bq24032 has a LDO 4.4-V regulator connected to the OUT pin. The bq24035shuts down if the input exceeds ~6.4 VDC.
The three potential sources to power the system ( V
OUT
) are: AC (AC-to-DC adapter), USB port, andbattery. The IC is designed to power the system continuously. The battery, in most cases, is the last lineof backup. If the AC or USB inputs are not available (or disabled), the battery connects to the system.
In thermal regulation condition (T
J
=125°C—not a first-choice design mode of operation), the chargecurrent is reduced to the battery, and the system still gets its power from the input. The batterysupplement is still available in thermal regulation if the V
OUT
falls to V
BAT
. In thermal cutoff (~155°C), theinput sources are disconnected, but the internal battery FET connects the battery to V
OUT
.
The battery FET only opens (when needed) if a short on the V
OUT
pulls more than 4 A of current, or anycondition has V
OUT
less than 1 Vdc (considered a short-circuit condition). In the short-circuit condition aretwo types of pullups: a 500- Ωresistor from each input to V
OUT
and a 10-mA current source from thebattery to the V
OUT
. The system load has to be reduced (>200 Ω) on the output to allow V
OUT
to rise above1 Vdc. If the voltage on the DPPM pin is held below 1 V, then the short-circuit feature is disabled.Therefore, placing a small capacitor (~1000 pF) across the DPPM resistor delays the short-circuitprotection on input powerup by a few microseconds. Typically, the system does not have much of a loadbelow 1 V; so, powering up during a potential short-circuit condition usually is not a problem. V
OUT
isalways powered if there is any source voltage; so, dropping below 1 V is not a typical mode.
Another feature that protects system integrity is dynamic power path management (DPPM). The voltageon the DPPM pin (DPPM
IN
) times a scaling factor of ~1.15 is the DPPM
OUT
voltage. The DPPM
OUT
voltageis the critical voltage, determined by the designer, where battery charging current is reduced to keep thesystem voltage ( V
OUT
) from further decay. A special feature to keep in mind is that when in DPPM modethe internal oscillator timer is slowed proportionally to how much the programmed charger current isreduced. This allows the timers (safety and others) to be appropriately adjusted during operation.Therefore, when performing any test where time is measured, keep in mind this adjustment factor.
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3 Performance Specification Summary
4 Test Summary
4.1 Equipment
4.2 Equipment Setup
Performance Specification Summary
Another critical feature is power handoff. The power handoff is initiated autonomously or by request. ThePSEL (High/Low) sets which input source takes priority (AC or USB). This handoff happens immediatelyon request. The CE pin (going high) immediately enables the chip; disabling it (going low) delays handofffor 5 ms. For autonomous power selection (e.g., the selected source is lost), the IC switches sourceswhen the Power Good (PG) status indicates the primary selected source is no longer good. PG is definedas >( V
BAT
+ 80 mV). This means that if the battery is dead (missing, or discharged below a useablesystem voltage), the IC switches over to the other available source when the V
OUT
reaches the deadbattery voltage. This design feature prevents cycling between a stronger current-limiting source and theUSB source. In most situations, if AC power is available (prior to losing it), the battery probably would notbe discharged.
Table 1 summarizes the performance specifications of the EVM.
Table 1. Performance Specification Summary For bq24030/1/2/5 EVMs
SPECIFICATION TEST CONDITIONS MIN TYP MAX UNITS
Input DC Voltage, V
I(AC)
4.8 V 5.0 6.5
VoltsInput DC USB Voltage, V
I(USB)
5.0Battery Charge Current, I
O(CHG)
1.0 2.0+ AmperesPower Dissipation, bq2403x IC, 1 Cell Pdiss=(Vin-Vout)Iout +(Vin-Vbat)Ibat + see
(1)
Watts(Vin-Vldo)I
LDO
(1)
The HPA073 (bq2403x) thermal design is optimized (8
+
vias, 0.031-inch PWB, 2 oz. copper) to give θ
JA
~ 27°C/W.
This section covers the setup and tests performed in evaluating the EVM.
•Power supply (+5.25 ± 0.25 VDC), current limit set to 2.0 A ± 0.2 A for AC input to the UUT•USB high-power port (500 mA) and cable (J1 is an alternate USB connection)•Three Fluke 75 DMMs (equivalent or better)•Oscilloscope, Model TDS220 (equivalent or better)
•Preset the UUT power supply voltage and current prior to connection to UUT; turn off the power supplyand connect the supply to J2-AC/GND (+ to AC and – to GND).•Connect a 10- Ωload to J7-OUT/GND.•Connect a 1k- Ωload to J5-LDO/GND.•Connect a fully discharged (< 2.8-VDC) single-cell Li-ion or Li-polymer battery to J8-BAT+/BAT–.•Connect the DMMs as shown in Figure 1 .
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USB PLUG USB
Connector
J9 J5 LDO GND
OUT
GND
J7
Bat +
Bat −
TS
J8
(DC−)
Alternate
Connection
J1
USB
GND
J2
AC
GND
5.25 VDC
P/S
#1
DMM
#1
+
−
1 kW
10 W
DMM
#2
+
−
Li-ion, Single Cell
DMM
#3
+
−
bq2403x Charger EVM −
bqTiny-IIIE
HPA073 UUT
To 500 mA
(High PWR Port)
4.3 Test Procedure
Test Summary
Figure 1. Test Diagram
1. Verify that the equipment is set up according to Equipment Setup section.2. Set jumpers on the UUT as follows: JMP1-0.5; JMP2-AC; JMP3-EN; set JMP4 through JMP7 to LED.3. Adjust R_DPPM until TP1 is 31 k Ω± 0.1 k Ωwith respect to GND, and adjust R_TMR until TP2 is 50kΩwith respect to GND.4. Verify that V
OUT
is approximately equal to V
BAT
(if Vout < 1.1 V, the output is in short-circuit mode. Toget out of this mode, momentarily disconnect the 10- Ωload, or touch a 1- µF capacitor between theDPPM pin and ground).5. Power up the +5.25-VDC Supply to the UUT.6. Verify V
BAT
is between 2.4 VDC and 3.0 VDC, and the charger is in pre-charge state: LEDs STAT1(D2), STAT2 (D3), and ACPG (D5) are on.If V
BAT
is above the low-voltage threshold (V
(LOWV)
~3 V), then the IC is in fast-charge mode {STAT2(D3) is off (High)}. If the IC is in fast charge, skip step 10.7. Verify I
BAT
is ~0.1 A ( I
BAT
~=I
AC
– (V
OUT
/ R
OUT
) –0.01 A)8. Verify V
OUT
is between 4.3 VDC and 4.5 VDC for the bq24032 IC. The bq24030/1/5 switches the inputto the output for V
AC
less than 6 V. The bq24030/1 regulates V
OUT
to 6 V for larger inputs, and thebq24035 turns off the charging and output for an AC input above 6 VDC.9. Verify V
LDO
is between 3.2 VDC and 3.4 VDC.10. Allow the battery to charge until V
BAT
is between 3.2 VDC and 4.0 VDC. The charger should deliverthe programmed constant current to the battery unless the input cannot source the required current.11. Verify D3 (STAT2) has turned off.12. Verify I
BAT
is ~1.0 A (for a 10-k Ωresistor on ISET1, I
BAT
~=I
AC
– (V
OUT
/ R
OUT
) – 0.01 A).13. Verify I
AC
is ~1.5 A (for 10- ΩOUT load and 10 k Ωon ISET1).14. Apply a short between J3-4 (CE) and J3-3 (GND) on the UUT. This overrides the JMP3 100-k Ωpullup,disables the charging, puts the IC in low power mode and connects the battery to the OUT pin. Notethat if CE is floated (JMP3 is removed and J3-4 connection is removed) the IC may bounce betweenthe charging and disabled states. Verify on the scope that V
OUT
does not drop out. Note that thetransition between power sources is implemented by break-before-make switching and requires thecapacitance on V
OUT
to be able to hold up the system voltage for at least 50 µs.15. Verify D2 (STAT1) has turned off.16. Verify I
AC
drops below 10 mA (should be < 200 µA into the IC if ACPG LED (current) JMP6 isremoved).
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Test Summary
17. Verify V
OUT
is within –50 mV of V
BAT
.18. Remove short betwen J3-4 and J3-3 on UUT. Verify on the scope that V
OUT
does not drop out. VerifyD2 (STAT1) has turned on, charging has resumed and V
OUT
is powered from the input.19. Disconnect the +5.25-VDC Input Supply from the UUT AC input. Verify on the scope that V
OUT
doesnot drop out. Verify V
OUT
is within –50 mV of V
BAT
and D2 (STAT1) and D5 (ACPG) LEDs turn off. Thisdemonstrates battery power backup for loss of AC adapter.20. Reapply the +5.25-VDC supply to the UUT AC input. Verify on the scope that V
OUT
does not drop out.Verify D2 (STAT1) and D5 (ACPG) LEDs turn on.21. Adjust R15 until the voltage on TP1 is ~ 3.50 VDC ( V
BAT
should be less than 3.9 V for thisdemonstration; otherwise, discharge battery).22. Reduce the current limit on the input supply to ~ 1 A (going to AC pin on UUT) and verify on the scopethat V
OUT
has dropped to the VDPPM level of ~4.0 V {(3.5 V at TP1) × 1.15 = 4 V}. Note that thecurrent into the battery is ~ 600 mA (1-A input minus 400 mA to the system), which has been reducedto keep the output from falling below the programmed DPPM OUTPUT threshold of 4 V. Thisdemonstrates DPPM operation (charging current to the battery is reduced if output drops to the DPPMOUTPUT voltage threshold attempting to keep the output voltage from dropping further).23. Further reduce the input’s current limit to 250 mA. Verify on the scope that V
OUT
does not drop out.Verify that V
OUT
drops just below V
BAT
(< 50 mV). Because the available input current is less than thesystem OUT load, reducing the battery charging current to zero is still not enough reduction in load tokeep the output from dropping. Once the output drops below ~ 50 mV, the internal battery FET turnson and allows the battery to source the OUT pin system load. This demonstrates battery supplementmode.
24. Return the current limit of the +5.25-V supply to ~2 A. Verify V
OUT
returns to Vreg or Vin (see Step 8 ofthis test procedure).25. Set JMP2 (PSEL) to USB (PSEL = low). Verify that the input current (AC) drops to between 400 mAand 500 mA. The programmed charge current of ~1 A and the system load of 10 Ωexceeds the USB0.5-A limit; therefore, V
OUT
drops until the DPPM OUTPUT voltage threshold, or battery voltage, isreached (which ever is higher). If the DPPM OUTPUT threshold is larger, the charging current isreduced to keep the output voltage from dropping further. If the battery voltage is higher, the batterysupplements the current to keep the output from dropping too much (50 mV to 200 mV) below thebattery voltage. Note that setting PSEL to low (USB mode; PSEL high is AC mode) selects the USBinput as the primary source. If the USB source is not present, and the ac source is present, the ICuses the AC input source as if it were a USB input. This feature is useful if only one input powerconnector is desired, and two sources (USB and AC adaptor) are available. A keyed cable or au-controller would set the PSEL pin for the available source. Note that the system would ideally go to alower power mode prior to selecting USB operation to avoid pulling down V
OUT
.26. Plug in a USB cable from a high-power port (500 mA) into the UUT (or supply 5 VDC to J1). Verify thatthe USB input now supplies the input current instead of the AC (J2) input. This demonstrates thatJMP2 (PSEL) defines the priority of the inputs. If PSEL = Low (USB priority), then the USB input isused first, if available, and if not it switches to AC power at USB-current levels.27. Verify that D4 (USBPG) turns on.28. Set JMP2 (PSEL) to AC, and verify that the AC supply is providing ~1.5 A of current (~0.44 to the loadand 1 A to the battery plus miscellaneous).29. Remove the ac-input supply and verify that the USB source is supplying between 400 mA and 500 mAof current to the input. The output should have dropped to the DPPM OUTPUT threshold or batteryvoltage (whichever is higher).30. Verify that D5 (ACPG) turns off.31. Reapply the AC-input source and verify that the AC source is now providing the ~1.5 A as before.32. Verify that D5 (ACPG) turns on.33. Set JMP2 (PSEL) to USB, and verify that the USB source is now providing between 400 mA and 500mA of current.34. Set JMP1 to 0.1 on the UUT. Verify that the input current has dropped below 100 mA and V
OUT
hasdropped slightly below V
BAT
. In this test, the system load is 10 Ω, which would result in the outputdropping to 1 V at 100 mA if there were no other source to help out. As the output voltage drops to theDPPM OUTPUT threshold, the charging current is reduced to zero, but V
OUT
continues to drop until itreaches the battery voltage. The internal battery FET turns on to supplement the OUTPUT. This
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Test Summary
demonstrates battery supplement mode because the system load exceeds the available input current.35. Disconnect the USB source and verify that the AC source takes over in USB mode at the 100-mAcharge level.36. Verify that D4 (USBPG) turns off.37. Set JMP2 to AC (PSEL = High). Skip to next step for HPA073-1/3 (bq24030/1/5 ICs). Verify that the(AC) input current is ~1 A. Verify that IBAT is reduced to half the programmed level, ~0.5 A. This is theAC half-charge mode and is implemented on bq24032 when ISET2 is low (0.1 A) and J2-PSEL is AC(High).
38. Set JMP1 to 0.5. Continue to let the battery charge. Note that once the battery voltage reachesregulation (~4.20 VDC for bq24030/2/5 and 4.1 VDC for bq24031) the charging current tapers off.39. Verify that the charging terminates when the battery current tapers to C/10 or 100 mA (1 A/10,programmed charge current divided by 10). Verify D2 (STAT1) turns off (High) and D3 (STAT2) turnson (Low).40. If a load is applied across the battery such that the battery is discharged to ~100 mV below theregulation voltage, the charger starts a new charging cycle.
This concludes the evaluation of the bq2403x EVM. Several more features implemented in the IC are notdemonstrated in this user's guide. See the data sheet to learn more about thermal regulation, thermalcutoff, USB boot up, and short-circuit protection.
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5 Schematic
Schematic
Figure 2. bq2403x EVM Schematic
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6 Physical Layouts
6.1 Board Layout
Physical Layouts
This section contains the board layout and assembly drawings for the EVM.
Figure 3 shows the top assembly view of the EVM. Figure 4 shows the top etch layer of the EVM. Figure 5shows the board second etch layer of the EVM. Figure 6 shows the board third etch layer of the EVM.Figure 7 shows the bottom etch layer of the EVM.
Figure 3. Top Assembly View
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Physical Layouts
Figure 4. Board Layout – Top Etch Layer
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Physical Layouts
Figure 5. Board Layout – Second Etch Layer
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Physical Layouts
Figure 6. Board Layout – Third Etch Layer
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Physical Layouts
Figure 7. Board Layout – Bottom Etch Layer
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7 Bill of Materials
Bill of Materials
Table 2. Bill of Materials
(1) (2) (3) (4)
COUNT
REFDES DESCRIPTION SIZE MFR PART NUMBERbq24030 bq24032 bq24035 bq24031-001 -002 -003 -004
3 3 3 3 C1, C2, C3 Capacitor, ceramic, 10-µF, 6.3-V, X5R, 20% 805 Panasonic ECJ-2FB0J106M
2 2 2 2 C4, C5 Capacitor, ceramic, 10-µF, 25-V, X5R, 20% 1206 Panasonic ECJ-3YB1E106M
1 1 1 1 C6 Capacitor, ceramic, 0.47-µF, 16-V, X7R, 805 Panasonic ECJ-2YB1C474K10%
0 0 0 0 C7 Capacitor, ceramic, 0.22-µF, 10-V, X5R, 603 Panasonic ECJ-1VB1A224K10%
0 0 0 0 C8 Capacitor, ceramic, xxx-µF, 10-V, X5R, 10% 603 Panasonic ECJ-1VB1C103K
1 1 1 1 D1 Diode, dual Schottky, 200-mA, 30-V SOT23 Vishay BAT54C-Liteon
3 3 3 3 D2, D4, D5 Diode, LED, green, 2.1-V, 20-mA, 6-mcd 603 Liteon 160-1183-1-ND
1 1 1 1 D3 Diode, LED, red, 1.8-V, 20-mA, 20-mcd 603 Liteon 160-1181-1-ND
4 4 4 4 J1, J2, J5, Terminal block, 2-pin, 6-A, 3.5 mm 0.27 x 0.25 OST ED1514J7
1 1 1 1 J3 Terminal block, 4-pin, 6-A, 3.5 mm 0.55 x 0.25 OST ED1516
3 3 3 3 J4, J6, J8 Terminal block, 3-pin, 6-A, 3.5 mm 0.41 x 0.25 OST ED1515
1 1 1 1 J9 Connector, USB upstream (Type B) 0.47 x 0.67 Molex 67068-1000
7 7 7 7 JMP1, Header, 3-pin, 100-mil spacing, 0.10 x 3 Sullins PTC36SAANJMP2, (36-pin strip)JMP3,
JMP4,
JMP5,
JMP6,
JMP7
4 4 4 4 R1, R2, R7, Resistor, Chip, 1.5-k Ω, 1/16-W, 1% 603 Std StdR8
1 1 1 1 R10 Resistor, Chip, 0- Ω, 1/16-W, 1% 603 Std Std
1 1 1 1 R11 Resistor, Chip, 22.6-k Ω, 1/16-W, 1% 603 Std Std
1 1 1 1 R14 Resistor, Chip, 30.1-k Ω, 1/16-W, 1% 603 Std Std
1 1 1 1 R15 Potentiometer, 20-k Ω, 1/4 inch Cermet, 0.25 ×0.17 Bourns 3266W-20312-turn, top-adjust
1 1 1 1 R16 Potentiometer, 50-k Ω, 1/4 inch Cermet, 0.25 ×0.17 Bourns 3266W-50312-turn, top-adjust
3 3 3 3 R3, R4, R5 Resistor, chip, 100-k Ω, 1/16-W, 1% 603 Std Std
1 1 1 1 R6 Resistor, chip, 1-k Ω, 1/10W, 1% 805 Std Std
1 1 1 1 R9 Resistor, chip, 10-k Ω, 1/16-W, 1% 603 Std Std
3 3 3 3 TP1, TP2, Test point, 0.032-inch hole None VoidTP3
1 1 U1 IC, single chip charge and power path QFN TI bq24030RHLmanagement
1 U1 IC , single chip charge and power path QFN TI bq24032ARHLmanagement
1 U1 IC , single chip charge and power path QFN TI bq24035RHLmanagement
1 1 1 1 -- PCB, 2-inch x 2-inch x 0.31-inch Any HPA073
(1)
These assemblies are ESD sensitive, ESD precautions shall be observed.
(2)
These assemblies must be clean and free from flux and all contaminants. Use of no-clean flux is not acceptable.
(3)
These assemblies must comply with workmanship standards IPC-A-610 Class 2.
(4)
Reference designators marked with an asterisk ('**') cannot be substituted. All other components can be substituted with equivalentMFR's components.
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8 References
References
1. SLUS618 , bq2403x Datasheet
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References
FCC Warning
This evaluation board/kit is intended for use for ENGINEERING DEVELOPMENT,DEMONSTRATION, OR EVALUATION PURPOSES ONLY and is not considered by TI to be afinished end-product fit for general customer use. It generates, uses, and can radiate radiofrequency energy and has not been tested for compliance with the limits of computing devicespursuant to part 15 of FCC rules, which are designed to provide reasonable protection againstradio frequency interference. Operation of this equipment in other environments may causeinterference with radio communications, in which case the user at his own expense will berequired to take whatever measures may be required to correct this interference.
EVALUATION BOARD/KIT IMPORTANT NOTICE
Texas Instruments (TI) provides the enclosed product(s) under the following conditions:This evaluation board/kit is intended for use for ENGINEERING DEVELOPMENT,DEMONSTRATION, OR EVALUATION PURPOSES ONLY and is not considered by TI to be afinished end-product fit for general consumer use. Persons handling the product(s) must haveelectronics training and observe good engineering practice standards. As such, the goods beingprovided are not intended to be complete in terms of required design-, marketing-, and/ormanufacturing-related protective considerations, including product safety and environmentalmeasures typically found in end products that incorporate such semiconductor components orcircuit boards. This evaluation board/kit does not fall within the scope of the European Uniondirectives regarding electromagnetic compatibility, restricted substances (RoHS), recycling(WEEE), FCC, CE or UL, and therefore may not meet the technical requirements of thesedirectives or other related directives.Should this evaluation board/kit not meet the specifications indicated in the User’s Guide, theboard/kit may be returned within 30 days from the date of delivery for a full refund. THEFOREGOING WARRANTY IS THE EXCLUSIVE WARRANTY MADE BY SELLER TO BUYERAND IS IN LIEU OF ALL OTHER WARRANTIES, EXPRESSED, IMPLIED, OR STATUTORY,INCLUDING ANY WARRANTY OF MERCHANTABILITY OR FITNESS FOR ANY PARTICULARPURPOSE.
The user assumes all responsibility and liability for proper and safe handling of the goods. Further,the user indemnifies TI from all claims arising from the handling or use of the goods. Due to theopen construction of the product, it is the user’s responsibility to take any and all appropriateprecautions with regard to electrostatic discharge.EXCEPT TO THE EXTENT OF THE INDEMNITY SET FORTH ABOVE, NEITHER PARTYSHALL BE LIABLE TO THE OTHER FOR ANY INDIRECT, SPECIAL, INCIDENTAL, ORCONSEQUENTIAL DAMAGES.TI currently deals with a variety of customers for products, and therefore our arrangement with theuser is not exclusive.TI assumes no liability for applications assistance, customer product design, softwareperformance, or infringement of patents or services described herein.Please read the User’s Guide and, specifically, the Warnings and Restrictions notice in the User’sGuide prior to handling the product. This notice contains important safety information abouttemperatures and voltages. For additional information on TI’s environmental and/or safetyprograms, please contact the TI application engineer or visit www.ti.com/esh .No license is granted under any patent right or other intellectual property right of TI covering orrelating to any machine, process, or combination in which such TI products or services might beor are used.
SLUU207A – October 2004 – Revised January 2007 bq2403x ( bqTiny-III™) 1.5-A Single-Chip Li-Ion 15and Li-Pol Charge Management IC EVMSubmit Documentation Feedback

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FCC Warning
This evaluation board/kit is intended for use for ENGINEERING DEVELOPMENT,DEMONSTRATION, OR EVALUATION PURPOSES ONLY and is not considered by TI to be afinished end-product fit for general consumer use. It generates, uses, and can radiate radiofrequency energy and has not been tested for compliance with the limits of computing devicespursuant to part 15 of FCC rules, which are designed to provide reasonable protection againstradio frequency interference. Operation of this equipment in other environments may causeinterference with radio communications, in which case the user at his own expense will berequired to take whatever measures may be required to correct this interference.
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265Copyright © 2007, Texas Instruments Incorporated
EVM WARNINGS AND RESTRICTIONS
It is important to operate this EVM within the input voltage range of 0 V to 6.5 V and the outputvoltage range of 0 V to 6.5 V.Exceeding the specified input range may cause unexpected operation and/or irreversible damageto the EVM. If there are questions concerning the input range, please contact a TI fieldrepresentative prior to connecting the input power.Applying loads outside of the specified output range may result in unintended operation and/orpossible permanent damage to the EVM. Please consult the EVM User's Guide prior toconnecting any load to the EVM output. If there is uncertainty as to the load specification, pleasecontact a TI field representative.During normal operation, some circuit components may have case temperatures greater than85°C. The EVM is designed to operate properly with certain components above 60°C as long asthe input and output ranges are maintained. These components include but are not limited tolinear regulators, switching transistors, pass transistors, and current sense resistors. These typesof devices can be identified using the EVM schematic located in the EVM User's Guide. Whenplacing measurement probes near these devices during operation, please be aware that thesedevices may be very warm to the touch.
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265Copyright © 2007, Texas Instruments Incorporated
16 bq2403x ( bqTiny-III™) 1.5-A Single-Chip Li-Ion SLUU207A – October 2004 – Revised January 2007and Li-Pol Charge Management IC EVM
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