Themis TA64 User manual

Themis Computer—Rest of World
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Themis Computer—Americas and Pacific Rim
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Phone (510) 252-0870
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TA64HardwareManual
Version 1.0—May 2006

Copyright © 2006 Themis Computer, Inc.
ALL RIGHTS RESERVED. No part of this publication may be reproduced in any form, by
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Themis Computer assumes no responsibility for inaccuracies. Themis Computer retains the right to
make changes to this publication at any time without prior notice. Themis Computer does not assume
any liability arising from the application or use of this publication or the product(s) described herein.
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is subject to the restrictions set forth in DFARS 252.227-7013 (c)(1)(ii) and FAR 52.227-19.
TRADEMARKS
THEMIS®is a registered trademark of Themis Computer, Inc.
TA64™is a trademark of Themis Computer, Inc.
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All other trademarks or registered trademarks used in this publication are the property of their
respective owners.
TA64 Hardware Manual, Version 1.0
May 2006
Part Number: 111999-022
Themis Customer Support
North America, South America, and Pacific Rim
Telephone: 510-252-0870
Fax: 510-490-5529
E-mail: [email protected]
Web Site: http://www.themis.com

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VersionRevisionHistory
Version 1.0.............................................................................................May 2006

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Table of Contents
How to Use This Manual ................................................................................................... xvii
1. TA64 Installation ........................................................................................................... 1-1
1.1 Determine Board Type ........................................................................................... 1-1
1.2 Check Configurations ............................................................................................ 1-2
1.2.1 Combination PS/2–USB Connector (Custom Order) ................................1-3
1.2.2 SCSI Termination ...................................................................................... 1-4
1.3 Install the TA64 Paddle Board ............................................................................... 1-6
1.4 Attach I/O Cables ................................................................................................... 1-8
1.4.1 Serial Port A (RS232) & Port B (RS232/RS422) ...................................... 1-8
1.4.1.1 Front Panel Connection .............................................................. 1-8
1.4.1.2 VME P2 Connection (Paddle Board) .......................................... 1-8
1.4.2 Paddle-Board only: Serial Ports C/D (both RS232) ................................. 1-8
1.4.3 2P2 PMC/XMC Carrier Board only:
Serial Port E (RS232) & Port F (RS232) 1-9
1.4.3.1 Front Panel Connection .............................................................. 1-9
1.4.3.2 VME P2 Connection ................................................................... 1-9
1.4.4 PMC (Expansion) Module Slots ................................................................ 1-9
1.4.5 Gigabit Ethernet Port ................................................................................. 1-9
1.4.6 Ultra320 SCSI A (Paddle Board) and B (Baseboard) .............................. 1-10
1.4.7 IDE Port ................................................................................................... 1-10
1.4.8 USB Port A and USB Port B ................................................................... 1-10
1.4.8.1 Dual-USB Connector (Default) ................................................ 1-10
1.4.8.2 DIN-8 Connector (Custom Order Only) ................................... 1-10
1.4.9 Paddle-Board only: USB Port C and USB Port D .................................. 1-11
1.4.10 PS/2 Keyboard/Mouse Port (Custom Order Only) .................................. 1-11
1.4.10.1 Front Panel Connection ............................................................ 1-11
1.4.10.2 VME P2 Connection ................................................................. 1-11
1.5 TOD/NVRAM Battery Replacement ................................................................... 1-12

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2. TA64 Features and Specifications ............................................................................... 2-1
2.1 Baseboard ............................................................................................................... 2-1
2.2 PMC/XMC Carrier Boards .................................................................................... 2-3
2.3 Graphics Board ...................................................................................................... 2-4
2.4 Paddle Board .......................................................................................................... 2-4
2.5 Backplane Jumper Settings .................................................................................... 2-5
2.6 System Specifications ............................................................................................ 2-5
2.6.1 Processor & Memory Subsystems ............................................................. 2-5
2.6.2 I/O Subsystem ............................................................................................ 2-6
2.6.3 Auxiliary Functions ................................................................................... 2-8
2.7 Environmental Specifications ................................................................................ 2-9
2.8 Estimated Power Requirements ........................................................................... 2-10
3. Hardware Overview ...................................................................................................... 3-1
3.1 Baseboard ............................................................................................................... 3-1
3.1.1 Turion64 Processor .................................................................................... 3-1
3.1.2 HyperTransport Technology ...................................................................... 3-2
3.1.2.1 AMD 8131 HyperTransport PCI-X Tunnel ................................ 3-2
3.1.2.2 AMD 8111 HyperTransport I/O Hub .........................................3-3
3.1.3 Tundra CA91C142 Universe II .................................................................. 3-4
3.1.4 LSI53C1030 Dual Ultra320 SCSI Controller ............................................ 3-4
3.1.5 BCM5703 Gigabit Ethernet Controller/Transceiver .................................. 3-5
3.1.6 Winbond W83627F LPC Super I/O ........................................................... 3-6
3.1.7 ADM1066 Power Supervisor/Sequencer ................................................... 3-6
3.1.8 XR17D152 Dual UART (DUART) ........................................................... 3-7
3.1.9 ICS950403 System Clock .......................................................................... 3-7
3.1.10 Complex PLD (CPLD) ..............................................................................3-7
3.1.11 FPGA ......................................................................................................... 3-7
3.1.12 Flash Memory ............................................................................................ 3-8
3.2 Memory Subsystem ............................................................................................... 3-8
3.3 PMC/XMC Carrier Boards .................................................................................... 3-9
3.4 BIOS ...................................................................................................................... 3-9

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4. Universe II Description ................................................................................................ 4-1
4.1 Features .................................................................................................................. 4-1
4.2 VMEbus Interface .................................................................................................. 4-2
4.2.1 VMEbus Configuration .............................................................................. 4-2
4.2.2 Universe II as the VMEbus Slave .............................................................. 4-2
4.2.3 Universe II as the VMEbus Master ............................................................ 4-3
4.2.4 VMEbus First Slot Detector ...................................................................... 4-5
4.2.4.1 Automatic Slot Identification ...................................................... 4-6
4.2.4.2 Register Access at Power Up ......................................................4-7
4.2.5 Universe II’s Hardware Power-Up Options ...............................................4-7
4.3 Slave Image Programming ..................................................................................... 4-9
4.3.1 VME Slave Images .................................................................................... 4-9
4.3.1.1 VMEbus Fields ........................................................................... 4-9
4.3.1.2 PCI Bus Fields .......................................................................... 4-10
4.3.1.3 Control Fields ........................................................................... 4-11
4.3.2 PCI Bus Target Images ............................................................................ 4-12
4.3.2.1 PCI Bus Fields .......................................................................... 4-12
4.3.2.2 VMEbus Fields ......................................................................... 4-12
4.3.2.3 Control Fields ........................................................................... 4-13
4.3.2.4 Special PCI Target Image ......................................................... 4-14
4.4 Universe II’s Interrupt and Interrupt Handler ...................................................... 4-17
4.4.1 VME and PCI Interrupters ....................................................................... 4-17
4.4.2 VMEbus Interrupt Handling .................................................................... 4-18
4.4.3 Universe II’s Mailbox Registers .............................................................. 4-18
4.4.4 Universe II’s Semaphores ........................................................................ 4-18
4.4.5 Programmable Slave Images on the VMEbus and PCI bus ..................... 4-18
4.4.6 DMA Controller ....................................................................................... 4-19
5. Field-Programmable Gate Array (FPGA) .................................................................. 5-1
5.1 Introduction ............................................................................................................ 5-1
5.2 VME Reset Control ............................................................................................... 5-2
5.3 Watchdog Timer .................................................................................................... 5-3
5.3.1 Watchdog Timers ....................................................................................... 5-3
5.3.2 Watchdog-Related Registers ...................................................................... 5-3
5.3.3 Watchdog Start/Restart .............................................................................. 5-3

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5.4 X-Bus (ISA) Flash ................................................................................................. 5-4
5.5 Register Description .............................................................................................. 5-4
5.5.1 Summary .................................................................................................... 5-4
5.5.2 FPGA_REV Register ................................................................................. 5-5
5.5.3 ISR Control Register .................................................................................. 5-6
5.5.4 Boot Path Control Register ........................................................................ 5-6
5.5.5 LED Control and Watchdog Log Register ................................................ 5-8
5.5.6 VME Reset Register ..................................................................................5-9
5.5.7 On-Board IO Setting Register .................................................................. 5-10
5.5.8 SCSI Setting Register .............................................................................. 5-11
5.5.9 GPIN and GPOUT Register ..................................................................... 5-12
5.5.10 Reserved Register .................................................................................... 5-13
5.5.11 FPGA Interrupt Mask Register ................................................................ 5-14
5.5.12 WATCHDOG_1_COUNTER Register ................................................... 5-14
5.5.13 WATCHDOG_1_LIMIT Register ........................................................... 5-15
5.5.14 WATCHDOG_1_STATUS Register ....................................................... 5-15
5.5.15 WATCHDOG_2_COUNTER Register ................................................... 5-16
5.5.16 WATCHDOG_2_LIMIT Register ........................................................... 5-16
5.5.17 WATCHDOG_2_STATUS Register ....................................................... 5-16
5.5.18 WATCHDOG_INT_MASK Register ...................................................... 5-17
Appendix A. Connector Pinouts and LED Indicators .................................................. A-1
A.1 TA64 Front-Panel Connectors .............................................................................. A-1
A.1.1 VME P1 Connector ................................................................................... A-1
A.1.2 VME P2 Connector ................................................................................... A-3
A.1.3 Gigabit Ethernet (GBE) Port A ................................................................. A-5
A.1.4 Serial Port A (RS232) and Port B (RS232, RS422) ................................. A-6
A.1.5 Default Connector—USB Port A and USB Port B ................................... A-8
A.1.6 Custom Order Only—DIN-8 PS/2 KB/Mouse or Dual USB Port ............ A-9
A.1.6.1 PS/2 and USB Protocols .......................................................... A-10
A.1.7 Ultra320 SCSI B Port ............................................................................. A-11
A.1.8 IDE Port .................................................................................................. A-13
A.1.9 PMC Module Slot 0 ................................................................................ A-15
A.1.10 Push-Button RESET ............................................................................... A-15
A.2 TA64 LEDs ......................................................................................................... A-16

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A.3 PMC/XMC Carrier Boards ................................................................................. A-17
A.3.1 2P2 PMC/XMC Carrier Board .............................................................. A-17
A.3.2 2P3 PMC Carrier Board .......................................................................... A-17
A.4 P2 Paddle Board .................................................................................................. A-19
A.4.1 Ultra320 SCSI Port A Connector ............................................................ A-20
A.4.2 GPIN/GPOUT Header Connector .......................................................... A-20
A.4.3 Floppy-Drive Connector ......................................................................... A-22
A.4.4 I2C Header Connector ............................................................................ A-23
A.4.5 Stereo Audio In/Out Connectors ............................................................. A-23
A.4.6 PS/2 KB/Mouse DIN-8 Connector ......................................................... A-24
A.4.7 Serial Ports A/B and C/D Connectors ..................................................... A-25
A.4.8 USB Port C and USB Port D .................................................................. A-26
A.5 Memory Module Connector ................................................................................ A-27
Appendix B. Jumper Pins and Solder Beads ..................................................................B-1
B.1 Field-Configurable .................................................................................................B-1
B.1.1 TA64 Jumper Pins .....................................................................................B-1
B.1.2 PMC/XMC Carrier Board Jumper Pins .....................................................B-3
B.2 Factory-Configurable .............................................................................................B-5
B.2.1 TA64 Solder Beads ....................................................................................B-5
B.2.2 Memory Module Solder Beads ..................................................................B-8
B.2.3 PMC/XMC Carrier Board Solder Beads ...................................................B-8
Appendix C. Front-Panel I/O Connections and LEDs ...................................................C-1
C.1 Introduction ............................................................................................................C-1
C.1.1 Front-Panel Dimensions ............................................................................C-2
C.1.2 Inserter/Extractor Handles .........................................................................C-2
C.1.2.1 VME64-type Handles .................................................................C-2
C.1.2.2 Triple-E-type Handles .................................................................C-2
C.2 TA64 Front Panels .................................................................................................C-3
C.2.1 TA64/1—Baseboard Only .......................................................................C-4
C.2.2 TA64/2P2—Baseboard and 2-PMC Carrier Board ..................................C-5
C.2.3 TA64/2P3—Baseboard and 3-PMC Carrier Board ..................................C-6
C.3 LEDs ......................................................................................................................C-7

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TA64 Hardware Manual
Appendix D. Board Diagrams ......................................................................................... D-1
D.1 TA64 Baseboard ................................................................................................... D-1
D.2 PMC/XMC Carrier Boards ................................................................................... D-1
D.3 TA64 P2 Paddle Board ......................................................................................... D-1
Appendix E. Glossary .......................................................................................................E-1
Appendix F. VME Slot Configurations ...........................................................................F-1
Index...............................................................................................................................Index-1
Reader Comment Card

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Table of Contents
List of Figures
Figure 1-1 Setting Solder Beads to Enable USB or PS/2.................................................. 1-3
Figure 1-2 TA64 with PMC Carrier and Paddle Boards in a VME Backplane................. 1-4
Figure 1-3 SCSI Termination Configurations ................................................................... 1-5
Figure 1-4 TA64 Paddle Board I/O Connections (Top-Side View).................................. 1-7
Figure 1-5 Location of the TOD/NVRAM Battery......................................................... 1-12
Figure 1-6 TOD/NVRAM Battery Replacement............................................................. 1-13
Figure 2-1 TA64 Block Diagram....................................................................................... 2-2
Figure 3-1 AMD 8131 HyperTransport PCI-X Tunnel..................................................... 3-2
Figure 3-2 AMD 8111 HyperTransport I/O Hub .............................................................. 3-3
Figure 3-3 Custom Memory Module Topology (Side View)............................................ 3-8
Figure 4-1 Universe II Architectural Diagram .................................................................. 4-4
Figure 4-2 Address Translation for VMEbus to PCI Bus Transfers ............................... 4-11
Figure 4-3 Address Translation for PCI Bus to VMEbus Transfers ............................... 4-13
Figure 4-4 Memory Mapping in the Special PCI Target Image...................................... 4-17
Figure 5-1 VME Reset Control through the FPGA........................................................... 5-2
Figure A-1 TA64 VME P1 Connector Pinout................................................................... A-1
Figure A-2 TA64 VME P2 Connector Pinout................................................................... A-3
Figure A-3 Gigabit Ethernet RJ45 Connector Pinout........................................................ A-5
Figure A-4 Dual Serial Ports A and B Connector Pinout.................................................. A-6
Figure A-5 Dual USB Ports A and B Connector Pinout ................................................... A-8
Figure A-6 Combo PS/2–USB Mini-DIN Connector Pinout............................................ A-9
Figure A-7 Setting Solder Beads to Enable USB or PS/2............................................... A-10
Figure A-8 Ultra320 SCSI B and IDE Connector Pinout................................................ A-11
Figure A-9 Ultra320 SCSI B and IDE Ports on the TA64 Front Panel........................... A-13
Figure A-10 PMC Module Slot 0 Connector (3 required) ................................................ A-15
Figure A-11 The 2P2 PMC/XMC Carrier Board (Top and Bottom Views)..................... A-18

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Figure A-12 TA64 Paddle Board I/O Connections (Top-Side View)............................... A-19
Figure A-13 Paddle Board Ultra320 SCSI Port A Connector Pinout ............................... A-20
Figure A-14 GPIN/GPOUT Connector Pinout.................................................................. A-20
Figure A-15 Floppy-Drive Connector Pinout.................................................................... A-22
Figure A-16 I2C Connector Pinout ................................................................................... A-23
Figure A-17 Dual Stereo Audio Connector....................................................................... A-23
Figure A-18 PS/2 Mini-DIN Connector Pinout................................................................. A-24
Figure A-19 Paddle Board Serial A/B and C/D Connector Pinout ................................... A-25
Figure A-20 Dual USB Ports C and D Connector Pinout ................................................. A-26
Figure A-21 Memory Module TA64 Connectors (Socket & Plug)................................... A-27
Figure B-1 TA64 Jumper-Pin Locations (Top Side).......................................................... B-4
Figure B-2 TA64 Solder-Bead Locations (Bottom Side)................................................... B-7
Figure C-1 PMC/XMC Carrier Board Handles.................................................................. C-3
Figure C-2 Placement of Mating Pins on VME64-type Handles....................................... C-3
Figure C-3 TA64 Baseboard .............................................................................................. C-4
Figure C-4 TA64 and 2P2 PMC/XMC Carrier Board ....................................................... C-5
Figure C-5 TA64 and 2P3 PMC/XMC Carrier Board ....................................................... C-6
Figure C-6 TA64 Front-Panel LEDs.................................................................................. C-7
Figure D-1 TA64 Front-Panel, Component, and Connector Diagram (Top View) .......... D-2
Figure D-2 2P2 PMC/XMC Carrier Board Component/Connector Diagram................... D-3
Figure D-3 2P3 PMC Carrier Board Component/Connector Diagram ............................. D-4
Figure D-4 TA64 Paddle Board Connector Diagram (Top-Side View)............................ D-5
Figure F-1 TA64 VME Slot Configurations...................................................................... F-3

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List of Tables
Table 1-1 TA64 Model Configurations............................................................................ 1-1
Table 1-2 PS/2 and USB Protocols and Connectors ........................................................ 1-3
Table 1-3 TA64 P2 Paddle Board I/O Connections......................................................... 1-6
Table 1-4 TA64 Integration Kit 112579-0xx (011/012/001/002).................................... 1-6
Table 2-1 Memory Configurations................................................................................... 2-3
Table 2-2 Processor Specifications .................................................................................. 2-5
Table 2-3 Memory Specifications.................................................................................... 2-5
Table 2-4 TA64 I/O Subsystem Specifications................................................................ 2-6
Table 2-5 Auxiliary Functions Specifications.................................................................. 2-8
Table 2-6 TA64 Operating Environmental Specifications............................................... 2-9
Table 2-7 TA64 Non-Operating Environmental Specifications ...................................... 2-9
Table 2-8 Estimated Power Requirements..................................................................... 2-10
Table 4-1 Universe II Miscellaneous Control Register (MISC_CTL)............................. 4-5
Table 4-2 Universe II Power Up Options......................................................................... 4-7
Table 4-3 PCI Configuration Base Address 0 Register (PCI_BS0)................................. 4-8
Table 4-4 PCI Configuration Base Address 1 Register (PCI_BS1)................................. 4-9
Table 4-5 VMEbus Fields for VMEbus Slave Image .................................................... 4-10
Table 4-6 PCI Bus Fields for VMEbus Slave Image ..................................................... 4-10
Table 4-7 Control Fields for VMEbus Slave Image ...................................................... 4-11
Table 4-8 PCI Bus Fields for PCI Bus Target Image..................................................... 4-12
Table 4-9 PCI Bus Fields for PCI Bus Target Image..................................................... 4-13
Table 4-10 Control Fields for PCI Bus Target Image...................................................... 4-14
Table 4-11 PCI Bus Fields for Special PCI Bus Target Image........................................ 4-14
Table 4-12 Control Fields for Special PCI Bus Target Image......................................... 4-15
Table 4-13 Special PCI Target Image Register (Offset 188)........................................... 4-15
Table 5-1 TA64 FPGA Register Address Map................................................................ 5-4

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Table 5-2 FPGA_REV Register 0xFB00.0000................................................................ 5-5
Table 5-3 ISR control register 0xFB00.0001................................................................... 5-6
Table 5-4 Boot Path Control Register 0xFB00.0002....................................................... 5-7
Table 5-5 LED Control and Watchdog Log Register 0xFB00.0003................................ 5-8
Table 5-6 VME Reset Register 0xFB00.0004 ................................................................. 5-9
Table 5-7 On-Board IO Setting Register 0xFB00.0005................................................. 5-10
Table 5-8 SCSI Setting Register 0xFB00.0006 ............................................................. 5-11
Table 5-9 GPIN and GPOUT Register 0xFB00.0007.................................................... 5-12
Table 5-10 Reserved Register 0xFB00.0008 ................................................................... 5-13
Table 5-11 FPGA Interrupt Mask Register 0xFB00.0009............................................... 5-14
Table 5-12 Watchdog_1_Counter Register 0xFD00.0010............................................... 5-14
Table 5-13 Watchdog_1_Limit Register 0xFD00.0014................................................... 5-15
Table 5-14 Watchdog_1_Status Register 0xFD00.0018.................................................. 5-15
Table 5-15 Watchdog_2_Counter Register 0xFD00.0020............................................... 5-16
Table 5-16 Watchdog_2_Limit Register 0xFD00.0024................................................... 5-16
Table 5-17 Watchdog_2_Status Register 0xFD00.0028.................................................. 5-16
Table 5-18 Watchdog_Int_Mask register 0xFD00.0040.................................................. 5-17
Table A-1 TA64 VME P1 Connector-Pin Signals........................................................... A-2
Table A-2 TA64 VME P2 Connector-Pin Signals........................................................... A-4
Table A-3 Gigabit Ethernet Connector-Pin Signals and LED Interpretation .................. A-5
Table A-4 Serial Ports A and B Connector-Pin Signals .................................................. A-7
Table A-5 The Effects of Setting Solder-Beads SB13 and SB20.................................... A-7
Table A-6 USB Ports A and B Connector-Pin Signals................................................... A-8
Table A-7 Combo PS/2–USB Connector Pin Signals...................................................... A-9
Table A-8 PS/2 and USB Protocols and Connectors ..................................................... A-10
Table A-9 SCSI Port B Connector Pin Signals.............................................................. A-12
Table A-10 IDE Port Connector Pin Signals ................................................................... A-14
Table A-11 Color Interpretation of Front-Panel LEDs.................................................... A-16

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Table A-12 GPIN/GPOUT Connector-Pin Signals.......................................................... A-20
Table A-13 Paddle Board Ultra320 SCSI Port A Connector-Pin Signals ....................... A-21
Table A-14 Floppy-Drive Connector-Pin Signals............................................................ A-22
Table A-15 I2C Connector-Pin Signals ........................................................................... A-23
Table A-16 PS/2 Mini-DIN Connector-Pin Signals......................................................... A-24
Table A-17 Paddle Board Serial A/B and C/D Connector-Pin Signals ........................... A-25
Table A-18 USB Ports C and D Connector-Pin Signals................................................. A-26
Table B-1 TA64 Jumper-Pin Settings (Top Side)............................................................. B-2
Table B-2 SCSI A Access Definition ............................................................................... B-3
Table B-3 TA64 Solder-Bead Settings (Bottom Side) ..................................................... B-5
Table B-4 PS/2 and USB Protocols and Connectors ........................................................ B-6
Table C-1 TA64 Model Configurations............................................................................ C-1
Table C-2 Front-Panel LED Interpretation....................................................................... C-8
Table D-1 Paddle Board Connector J0206 Pinout........................................................... D-6
Table F-1 TA64 Model Configurations............................................................................ F-1

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How to Use This Manual
The Themis TA64 (see following photo) is a high-performance single-board com-
puter with an Advanced Micro Devices 800-MHz/1.6-GHz Turion64 processor and
high-speed I/O throughput (including gigabit ethernet, Ultra320 SCSI, IDE, and four
serial ports—or six serial ports with the optional 2P2 PMX/XMC Carrier Board). Up
to 4 GB of DDR333 SDRAM memory—as well as a standard PMC Module card (64
bit @66 MHz)—can be installed on the TA64, which can be ordered with either a
default dual-USB connector (dual-USB interface only) or a DIN-8 connector (PS/2
or dual-USB interface). Access to signals on the VME P2 backplane can be made
through an optional Themis paddle board.
This TA64 Hardware Manual describes existing models (see Table 1, next page) of
the TA64, including PMC/XMC Carrier Boards, all resident on a VME64 bus.
TA64 Single-Board Computer
Preface
Section

TA64 Hardware Manual
xviii Themis Computer
ThemisComputer values its customer comments and opinions; therefore, a “Reader
Comment Card” is located at the end of this manual for your use. Please take the
time to fill out this card with any comments concerning Themis products and ser-
vices, and return it to Themis Computer. Your comments may also be forwarded to
Before you begin, carefully read each of the procedures in this manual and the asso-
ciated Software manual. Serious damage can be caused by improper handling of the
equipment.
TA64 Models
The TA64 has a total of three models (see Table 1).
All models are based on a combination of three different VME64 boards: the TA64
Baseboard, the 2P2 PMC/XMC Carrier Board with two PMC Module slots, and the
2P3 PMC Carrier Board with three PMC Module slots. Users may obtain graphics
capability by installing a TGA-7000 PMC graphics accelerator card in an available
PMC/XMC Module slot.
Table 1. TA64 Model Configurations
Modela
Baseboard TGA3D/3D+
Graphics BoardbPMC/XMC Carrier Board
(1 only)
VME Slot 1 VME Slot 2 VME Slot 3 2 Modulesc
VME Slot 2 3 Modulesd
VME Slot 2
TA64 / 1 Yes
Not SupportedTA64 / 2P2 Yes 2P2 PMC/XMC
TA64 / 2P3 Yes 2P3 PMC
a—The TA64 does not support PCI Express; hence XMC Modules are not supported.
b—TGA3D/3D+ Graphics Boards are not supported by the TA64. Instead, a TGA-7000 PMC Graphics Card is recommended.
c—New 2P2 PMC/XMC Carrier Board (P/N 112794-001) only; the standard version 2P2 PMC Carrier Board is not compatible.
d—The standard version 2P3 PMC Carrier Board is supported.
Caution: A new 2P2 PMC/XMC Carrier Board has been designed to operate with
the TA64 system, which does not support the original 2P2 PMC Carrier Board. DO
NOT ATTEMPT to operate the original 2P2 PMC Carrier Board with the TA64.

How to Use This Manual
Intended Audience
xix
Themis Computer
The front panel of the TA64 supports the following connections and indicators:
• Gigabit Ethernet Port A (with two embedded LEDs and a transformer for sig-
nal conversion)
• Serial Port A (RS232) and Serial Port B (RS232/RS422)
• Dual USB ports (A and B) or PS/2 Keyboard/Mouse
• Ultra320 LVD SCSI Port B
•IDEPort
• Four VME Status LEDs and four System Status LEDs
• PMC Module 0 (if installed)
Additional I/O connections are available through the VME P2 backplane by attach-
ing a single-connector (P2), single-slot Paddle Board that supports an LVD (5 row)
or SE (3 row) SCSI port (A), a floppy-drive port, a I2C port, GPIN/GPOUT signals,
a PS/2 keyboard/mouse port, four serial ports (A, B, C, and D), dual USB ports (C
and D), and AC97 audio input/output signals.
Routing of some I/O connections may require reconfiguration of jumper pins (for
example, alternating audio signals between the VME P2 backplane and the PCI
extension Carrier Board) or solder beads (for example, switching serial ports A/B
between the front panel and the VME P2 backplane).
Intended Audience
This manual is written for system integrators and programmers. It contains all neces-
sary information for installation and configuration of the TA64 and assumes the
BIOS program code is installed in the system Flash memory. The TA64 has been
tested with Solaris 9 and 10, Linux Redhat v4, Windows XP, and Windows Server
2003 operating systems.
Although all specific hardware and software features are described in the Hardware
and Software manuals, programmers wishing to write code for the TA64 without the
benefit of an operating system or real-time kernel will require additional data sheets.
Please refer to the section “Related References” on page xxii for information con-
cerning this documentation.
The reader should have a working knowledge of VMEbus and PCI local bus specifi-
cations, AMD CPU architecture, HyperTransport technology, and Ethernet and
SCSI (ANSI 3.131-1994) specifications.

TA64 Hardware Manual
xx Themis Computer
Unpacking
Remove the TA64 and all accessories from the shipping container and check the
contents against the packing list. Be certain to observe industry-standard ESD pro-
tection procedures when handling static-sensitive components. The package should
include all elements of your order.
Please report any shipping discrepancies to the Themis Computer Customer Support
group immediately: support@themis.com or 1-510-252-0870.
How to Start Quickly
To start making the TA64 operational quickly, Themis Computer recommends that
you read the following sections:
• Chapter 1, "TA64 Installation". This chapter contains vital information on con-
figuring the TA64 and the design and setup of VMEbus-based systems.
• Appendix B, "Jumper Pins and Solder Beads". This appendix contains a com-
plete listing of all jumper pins and solder beads, along with default settings.
Verify that the jumpers pins and solder beads on your system are set to meet
your application requirements.
In addition to the information contained in this TA64 Hardware Manual (Themis
P/N-111999-022), additional software information is contained in the TA64 Soft-
ware Manual (Themis P/N-111999-023).
Caution: The TA64 contains statically sensitive components. Industry-standard an-
tistatic measures must be observed when removing the TA64 from its shipping con-
tainer and during any subsequent handling. A wrist strap provides grounding for
static electricity between your body and the chassis of the system unit. Electric cur-
rent and voltage do not pass through the wrist strap.
Table of contents
Other Themis Motherboard manuals