Toshiba TA1218N User manual

TA1218N/F
2000-09-11 1/40
TOSHIBA Bipolar Linear Integrated Circuit Silicon Monolithic
TA1218N, TA1218F
Audio/Video Switching IC for TVs
The TA1218N/F is an audio/video switching IC for TV sets.
Conforming to I2C bus standards, it allows you to perform
various switching operations through the bus lines by using a
microcomputer. Thanks to its 2-channel outputs, the TA1218N/F
can also be used for the PIP systems. Furthermore, since the
presence of a signal on its sync signal output pin can be
determined by a microcomputer, it is possible to check each
input/output channel (self-diagnosis).
This IC has the same pin assignments as the TA1219AN
(SDIP36), a 1-channel output version of the TA1218N/F, so
these chips are pin compatible on pins 3 to 20 and 23 to 40.
Features
• I2C bus control
• Video : 5-channel inputs and 2-channel outputs
(2 channels conforming to S system)
• Audio : 5-channel inputs and 3-channel outputs
• Self-diagnostic function
• ADC inputs based on European 21-pin standards
• Switchable subaddress
TA1218N
TA1218F
Weight
SDIP42-P-600-1.78 : 4.13 g (typ.)
QFP48-P-1014-0.80: 0.83 g (typ.)
• TOSHIBA is continually working to improve the quality and reliability of its products. Nevertheless, semiconductor devices in general
can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress. It is the responsibility of th
e
buyer, when utilizing TOSHIBA products, to comply with the standards of safety in making a safe design for the entire system, and
to avoid situations in which a malfunction or failure of such TOSHIBA products could cause loss of human life, bodily injury o
r
damage to property.
In developing your designs, please ensure that TOSHIBA products are used within specified operating ranges as set forth in th
e
most recent TOSHIBA products specifications. Also, please keep in mind the precautions and conditions set forth in the “Handling
Guide for Semiconductor Devices,” or “TOSHIBA Semiconductor Reliability Handbook” etc..
• The TOSHIBA products listed in this document are intended for usage in general electronics applications (computer, personal
equipment, office equipment, measuring equipment, industrial robotics, domestic appliances, etc.). These TOSHIBA products are
neither intended nor warranted for usage in equipment that requires extraordinarily high quality and/or reliability or a malfunction o
r
failure of which may cause loss of human life or bodily injury (“Unintended Usage”). Unintended Usage include atomic energ
y
control instruments, airplane or spaceship instruments, transportation instruments, traffic signal instruments, combustion control
instruments, medical instruments, all types of safety devices, etc.. Unintended Usage of TOSHIBA products listed in this documen
t
shall be made at the customer’s own risk.
• The products described in this document are subject to the foreign exchange and foreign trade laws.
• The information contained herein is presented only as a guide for the applications of our products. No responsibility is assumed b
y
TOSHIBA CORPORATION for any infringements of intellectual property or other rights of the third parties which may result from its
use. No license is granted by implication or otherwise under any intellectual property or other rights of TOSHIBA CORPORATION o
r
others.
• The information contained herein is subject to change without notice.
000707EBA1

TA1218N/F
2000-09-11 2/40
Block Diagram
Note1: ( ): The terminal number of TA1218F.
(6)
Det Select
Det in
VinV1
VinV2
VinTV
Y/VinS1
Y/VinS2
CinS1
CinS2
Sync out
LinS1
LinS2
LinV1
LinV2
LinTV
RinS1
RinS2
RinV1
RinV2
RinTV
VCC
GND
VCC
GND
Vout1
Vout2
Yout
Yin
Cout
Cin
SCL
SDA
Address
I/O1 (3 level)
I/O2 (3 level)
I/O3
O4
O5
LoutTV
Lout1
Lout2
RoutTV
Rout1
Rout2
4
3
33
23
−6dB
10
28
7
12
16
S
S
18
24
25
27
19
20
21
22
41
+
+
14
11
15
8
29
5
26
Pulse
conver-
ter
13
17
9
31
6
1
37
40
39
35
2
38
42
36
30
34
32
Sync
separator
(46)
(45)
(26)
(2)
(8)
(12)
(10)
(15)
(24)
(7)
(11)
(3)
(31)
(47)
(9)
(13)
(5)
(29)
(48)
(33)
(21)
(38)
(42)
(36)
(32)
(34)
(30)
(22)
(23)
(25)
(16)
(17)
(18)
(19)
(41)
(40)
(37)
(43)
(39)
(35)
(44)
24
I2L
Logic
I2C
bus
I/O
Mute

TA1218N/F
2000-09-11 3/40
Pin Assignment
TA1218N
Lout2
Rout2
Det in
Det Select
LinTV
RinTV
VinTV
LinV1
RinV1
VinV1
LinS1
Y/VinS1
RinS1
CinS1
LinS2
Y/VinS2
RinS2
CinS2
I/O1
I/O2
I/O3
Vout2
O5
LoutTV
RoutTV
Vout1
Lout1
Yout
Rout1
Cout
VCC
Cin
RinV2
Yin
LinV2
VinV2
Address
Sync out
SDA
SCL
GND
O4
4
1
2
3
5
9
6
7
8
10
14
11
12
13
15
20
17
18
19
21
16
39
42
41
40
38
34
37
36
35
33
29
32
31
30
28
23
26
25
24
22
27
11 TA1218N

TA1218N/F
2000-09-11 4/40
TA1218F
NC
VinTV
LinV1
NC
RinV1
VinV1
LinS1
Y/VinS1
RinS1
CinS1
LinS2
Y/VinS2
RinS2
NC
Vout1
Lout1
Yout
Rout1
Cout
VCC
NC
NC
Cin
RinV2
Yin
LinV2
VinV2
Address
4
1
2
3
5
9
6
7
8
10
14
11
12
13
15 2017 18 19 2116 23 24
22
38
34
37
36
35
33
29
32
31
30
28
26
25
27
CinS2
I/O1 I/O2 I/O3 O4 NC GND SCL SDA Sync out
3942 41 404346 45 4448 47
R T
V
L T
V
Det Selec
t
Det in
Rout2
Lout2
Vout2
O5
LoutT
V
RoutT
V
TA1218F

TA1218N/F
2000-09-11 5/40
Pin Description (( ): the pin number of TA1218F)
Pin
No. Name Function Interface
1
(43)
Lout2
This pin is for output a sub-channel
left audio signal. The signals fed into
the chip via LinV1, LinV2, LinS1,
LinS2, or LinTV is output from this
pin. The output resistance of this pin
is 45 Ω.
Furthermore, the signal output from
this pin is pulse-converted for use in
self-diagnosis. The converted signal
is output from Sync Out.
This output can be muted in
combination with Rout2 by bus
control.
2
(44)
Rout2
This pin is for output a sub-channel
right audio signal. The signals fed
into the chip via RinV1, RinV2,
RinS1, RinS2, or RinTV is output
from this pin. The output resistance
of this pin is 45 Ω.
Furthermore, the signal output from
this pin is pulse-converted for use in
self-diagnosis. The converted signal
is output from Sync Out.
This output can be muted in
combination with Lout2 by bus
control.
3
(45)
Det in
This pin is for input a sync
separation signal. Input the signal
from Det Select to this pin with
capacitance coupling. The input
resistance of this pin is 18 kΩ.
The sync signal separated from Det
Select is outputted from Sync Out
for use in self-diagnosis.
4
(46)
Det Select
This pin is for output a sync
separation signal.
Signals VinV1, VinV2, VinTV,
Y/VinS1, Vout1, Vout2, Yout, or Cout
are outputted from this pin. The
output resistance of this pin is 35 Ω.
Input the signal from this pin to Det
in with capacitance coupling.
70 kΩ
20 kΩ
1
1.5 mA
100 Ω
Lout2
SW
(43)
70 kΩ
20 kΩ
2
1.5 mA
100 Ω
Rout2
SW
(44)
<Sync out>
1 kΩ
7 µA/1.1 µA
1 kΩ
3
7.3 V
22.5 kΩ
(45)
4
100 Ω
Det Select
SW
200 Ω
(46)

TA1218N/F
2000-09-11 6/40
Pin
No. Name Function Interface
5
(47) LinTV
This pin is for input a left audio
signal from the main demodulator in
the TV set. The signal fed into this
pin is presented to LoutTV, Lout1,
and Lout2.
The input dynamic range of this pin
is 6.5 Vp-p and the input resistance is
70 kΩ.
6
(48)
RinTV
This pin is for input a right audio
signal from the main demodulator in
the TV set. The signal fed into this
pin is presented to RoutTV, Rout1,
and Rout2.
The input dynamic range of this pin
is 6.5 Vp-p and the input resistance is
70 kΩ.
7
(2)
VinTV
This pin is for input a composite
audio signal from the main
demodulator in the TV set. The
signal fed into this pin is presented
to Vout1, Vout2, Yout, and Cout. The
same signal is also output from Det
Select as a sync separation signal.
The input dynamic range of this pin
is 2.0 Vp-p and the input resistance is
30 kΩ.
8
(3)
LinV1
This pin is for input a left audio
signal from an external source (V1
channel). This pin can also be used
for PIP signal input. The signal fed
into this pin is presented to Lout1
and Lout2.
The input dynamic range of this pin
is 6.5 Vp-p and the input resistance is
70 Ω.
<Lout1>
70 kΩ
1.5 kΩ
5
5.2 V
<Lout2>
1.5 kΩ
<LoutTV>
1.5 kΩ
(47)
<Rout1>
70 kΩ
1.5 kΩ
6
5.2 V
<Rout2>
1.5 kΩ
<RoutTV>
1.5 kΩ
(48)
<Vout1>
<Yout>
<Cout>
30 kΩ
1.5 kΩ
7
5.2 V
<Vout2>
1.5 kΩ
<Det Select>
1.5 kΩ
(2)
<Lout1>
70 kΩ
1.5 kΩ
8
5.2 V
<Lout2>
1.5 kΩ
(3)

TA1218N/F
2000-09-11 7/40
Pin
No. Name Function Interface
9
(5) RinV1
This pin is for input a right audio
signal from an external source (V1
channel). This pin can also be used
for PIP signal input. The signal fed
into this pin is presented to Rout1
and Rout2.
The input dynamic range of this pin
is 6.5 Vp-p and the input resistance is
70 kΩ.
10
(6)
VinV1
This pin is for input a composite
video signal from an external source
(V1 channel). This pin can also be
used for PIP signal input. The signal
fed into this pin is presented to
Vout1, Vout2, Yout, and Cout. The
same signal is also output from Det
Select as a sync separation signal.
The input dynamic range of this pin
is 2.0 Vp-p and the input resistance is
30 kΩ.
11
(7)
LinS1
This pin is for input a left audio
signal from an external source (S1
channel). The signal fed into this pin
is presented to Lout1 and Lout2.
The input dynamic range of this pin
is 6.5 Vp-p and the input resistance is
70 kΩ.
12
(8)
Y/VinS1
This pin is for input a luminance
signal or composite video signal
from an external source (S1
channel). The signal fed into this pin
is presented to Vout1, Vout2, Yout,
and Cout. The same signal is also
output from Det Select as a sync
separation signal.
The input dynamic range of this pin
is 2.0 Vp-p and the input resistance is
30 kΩ.
<Rout1>
70 kΩ
1.5 kΩ
9
5.2 V
<Rout2>
1.5 kΩ
(5)
<Vout1>
<Yout>
<Cout>
30 kΩ
1.5 kΩ
10
5.2 V
<Vout2>
1.5 kΩ
<Det Select>
1.5 kΩ
(6)
<Lout1>
70 kΩ
1.5 kΩ
11
5.2 V
<Lout2>
1.5 kΩ
(7)
<Vout1>
<Yout>
<Cout>
30 kΩ
1.5 kΩ
12
5.2 V
<Vout2>
1.5 kΩ
<Det Select>
1.5 kΩ
(8)

TA1218N/F
2000-09-11 8/40
Pin
No. Name Function Interface
13
(9) RinS1
This pin is for input a right audio
signal from an external source (S1
channel). The signal fed into this pin
is presented to Rout1 and Rout2.
The input dynamic range of this pin
is 6.5 Vp-p and the input resistance is
70 kΩ.
14
(10)
CinS1
This pin is for input a chroma signal
from an external source (S1
channel). It also functions as an
S-mode select switch for the S1
channel. The S mode is selected
when the pin voltage is 2.25 V or
less. The signal fed into this pin is
presented to Cout directly and to
Vout1 and Vout2 after being
combined with the YinS1 signal.
The input dynamic range of this pin
is 2.0 Vp-p and the input resistance is
30 kΩ.
15
(11)
LinS2
This pin is for input a left audio
signal from an external source (S2
channel). The signal fed into this pin
is presented to Lout1 and Lout2.
The input dynamic range of this pin
is 6.5 Vp-p and the input resistance is
70 kΩ.
16
(12)
Y/VinS2
This pin is for input a luminance
signal or composite aoudio signal
from an external source (S2
channel). The signal fed into this pin
is presented to Vout1, Vout2, Yout,
and Cout.
The input dynamic range of this pin
is 2.0 Vp-p and the input resistance is
30 kΩ.
<Rout1>
70 kΩ
1.5 kΩ
13
5.2 V
<Rout2>
1.5 kΩ
(9)
<Vout1>
<Cout>
30 kΩ
1.5 kΩ
14
5.2 V
<Vout2>
1.5 kΩ
S Mode
SW
2.25 V
1.5 kΩ
(10)
<Lout1>
70 kΩ
1.5 kΩ
15
5.2 V
<Lout2>
1.5 kΩ
(11)
<Vout1>
<Yout>
<Cout>
30 kΩ
1.5 kΩ
16
5.2 V
<Vout2>
1.5 kΩ
(12)

TA1218N/F
2000-09-11 9/40
Pin
No. Name Function Interface
17
(13) RinS2
This pin is for input a right audio
signal from an external source (S2
channel). The signal fed into this pin
is presented to Rout1 and Rout2.
The input dynamic range of this pin
is 6.5 Vp-p and the input resistance is
70 kΩ.
18
(15)
CinS2
This pin is for input a chroma signal
from an external source (S2
channel). It also functions as an
S-mode select switch for the S2
channel. The S mode is selected
when the pin voltage is 2.25 V or
less. The signal fed into this pin is
presented to Cout directly and to
Vout1 and Vout2 after being
combined with the YinS2 signal.
The input dynamic range of this pin
is 2.0 Vp-p and the input resistance is
30 kΩ.
19
(16)
I/O1
This is an ADC input/DAC output
pin.
The ADC is a 3-level detection type
(2 bits). The threshold levels are 7.0
V and 2.25 V.
The DAC (1 bit) is an open-collector
output. Make sure that the current
flowing into this pin is 2.0 mA or
less.
20
(17)
I/O2
This is an ADC input/DAC output
pin.
The ADC is a 3-level detection type
(2 bits). The threshold levels are 7.0
V and 2.25 V.
The DAC (1 bit) is an open-collector
output. Make sure that the current
flowing into this pin is 2.0 mA or
less.
19
7.0 V
2.25 V
Logic
(16)
20
7.0 V
2.25 V
Logic
(17)
<Rout1>
70 kΩ
1.5 kΩ
17
5.2 V
<Rout2>
1.5 kΩ
(13)
<Vout1>
<Cout>
30 kΩ
1.5 kΩ
18
5.2 V
<Vout2>
1.5 kΩ
S Mode
SW
2.25 V
1.5 kΩ
(15)

TA1218N/F
2000-09-11 10/40
Pin
No. Name Function Interface
21
(18) I/O3
This is an ADC input/DAC output
pin.
The ADC is a 2-level detection type
(1 bit). The threshold level is 2.25 V.
The DAC (1 bit) is an open-collector
output. Make sure that the current
flowing into this pin is 2.0 mA or
less.
22
(19)
O4
This pin is for a 1 bit DAC output.
This is an open-collector output.
Make sure that the current flowing
into this pin is 2.0 mA or less.
23
(21)
GND This is the GND pin. 
24
(22)
SCL
This pin is for input an I2C bus clock.
The input threshold level of this pin
is 2.25 V.
25
(23)
SDA
This is an I2C bus data input/output
pin. The input threshold level of this
pin is 2.25 V.
Make sure that the current flowing
into this pin is 3.0 mA or less.
21
2.25 V
Logic
(18)
22
Logic
(19)
2.25 V
24
Logic
Surge
protection
circuit
(22)
25
2.25 V
LogicSurge
protection
circuit
(25)

TA1218N/F
2000-09-11 11/40
Pin
No. Name Function Interface
26
(24)
Sync out
This pin is for output a
self-diagnostic sync signal. The
signal separated from VinTV VinV1,
VinV2, Y/VinS1, Vout1, Vout2, Yout,
or Cout is outputted from this pin. In
addition, the signal derived from
Lout1, Rout1, Lout2, or Rout2 is also
output from this pin for use in audio
block diagnosis.
This is an open-collector output.
Make sure that the current flowing
into this pin is 2.0 mA or less.
27
(25)
Address
This is for an I2C bus slave address
select switch. The threshold level of
this pin is 2.25 V. The following lists
the addresses :
High : 92H (write), 93H (read)
Low : 90H (write), 91H (read)
28
(26)
VinV2
This pin is for input a composite
video signal from an external source
(V2 channel). This pin can also be
used for PIP signal input. The signal
fed into this pin is presented to
Vout1, Vout2, Yout, and Cout. The
same signal is also output from Det
Select as a sync separation signal.
The input dynamic range of this pin
is 2.0 Vp-p and the input resistance is
30 kΩ.
29
(27)
LinV2
This pin is for input a left audio
signal from an external source (V2
channel). This pin can also be used
for PIP signal input. The signal fed
into this pin is presented to Lout1
and Lout2.
The input dynamic range of this pin
is 6.5 Vp-p and the input resistance is
70 kΩ.
26
1.5 V
<Det in>
<Sound>
Output select
SW
(24)
30 kΩ
60 kΩ
27
Address
select SW
(25)
<Vout1>
<Yout>
<Cout>
30 kΩ
1.5 kΩ
28
5.2 V
<Vout2>
1.5 kΩ
<Det Select>
1.5 kΩ
(26)
<Lout1>
70 kΩ
1.5 kΩ
29
5.2 V
<Lout2>
1.5 kΩ
(27)

TA1218N/F
2000-09-11 12/40
Pin
No. Name Function Interface
30
(28) Yin
This pin is for input a luminance
signal from an external comb filter.
The signal fed into this pin is
presented to Yout.
The input dynamic range of this pin
is 5.5 Vp-p and the input resistance is
60 kΩ.
31
(29)
RinV2
This pin is for input a right audio
signal from an external source (V2
channel). This pin can also be used
for PIP signal input. The signal fed
into this pin is presented to Rout1
and Rout2.
The input dynamic range of this pin
is 6.5 Vp-p and the input resistance is
70 kΩ.
32
(30)
Cin
This pin is for input a chroma signal
from an external comb filter. The
signal fed into this pin is presented
to Cout.
The input dynamic range of this pin
is 5.5 Vp-p and the input resistance is
60 kΩ.
This pin also functions as a audio
mute switch. The entire audio output
can be muted by pulling the voltage
on this pin below 2.25 V.
33
(33) VCC
This is the power supply pin. Apply 9
V to this pin. The current
consumption of this pin is 47 mA.

34
(34)
Cout
This pin is for output a chroma
signal. The signal fed into Cin,
CinS1, CinS2, VinV1, VinV2,
Y/VinS1, Y/VinS2, or VinTV is
outputted from this pin. The output
resistance of this pin is 25 Ω.
The same signal is also outputted
from Det Select as a sync
separation signal.
<Yout>
60 kΩ
1.5 kΩ
30
5.2 V
(28)
<Rout1>
70 kΩ
1.5 kΩ
31
5.2 V
<Rout2>
1.5 kΩ
(29)
<Cout>
60 kΩ
1.5 kΩ
32
5.2 V
1.5 kΩ
Sound
Mute
2.25 V
(30)
34
100 Ω
Cout
SW
<Det Select>
1.5 kΩ
1.8 mA
(34)

TA1218N/F
2000-09-11 13/40
Pin
No. Name Function Interface
35
(35)
Rout1
This pin is for output the main
channel right audio signal. The
signal fed into RinV1, RinV2, RinS1,
RinS2, or RinTV is outputted from
this pin. The output resistance of this
pin is 45 Ω.
Furthermore, the signal outputted
from this pin is pulse-converted for
use in self-diagnosis. The converted
signal is outputted from Sync Out.
This outputted can be muted
independently of Lout1 by bus
control.
36
(36)
Yout
This pin is for output a luminance
signal. The signal fed into Yin,
Y/VinS1, Y/VinS2, VinV1, VinV2, or
VinTV is outputted from this pin. The
output resistance of this pin is 25 Ω.
The same signal is also outputted
from Det Select as a sync
separation signal.
37
(37)
Lout1
This pin is for output the main
channel left audio signal. The signal
fed into LinV1, LinV2, LinS1, LinS2,
or LinTV is outputted from this pin.
The output resistance of this pin is
45 Ω.
Furthermore, the signal outputted
from this pin is pulse-converted for
use in self-diagnosis. The converted
signal is outputted from Sync Out.
This output can be muted
independently of Rout1 by bus
control.
38
(38)
Vout1
This pin is for output the main
channel composite video signal. The
signal fed into VinTV, VinV1, VinV2,
VinS1, VinS2, YinS1 +CinS1, or
YinS2 +CinS2 is outputted from this
pin. The output resistance of this pin
is 25 Ω
The same signal is also outputted
from Det Select as a sync
separation signal.
70 kΩ
20 kΩ
35
1.5 mA
100 Ω
Rout1
SW
(35)
36
100 Ω
Yout
SW
<Det Select>
1.5 kΩ
1.8 mA
(36)
70 kΩ
20 kΩ
37
1.5 mA
100 Ω
Lout1
SW
(37)
38
100 Ω
Vout1
SW
<Det Select>
1.5 kΩ
2.0 mA
(38)

TA1218N/F
2000-09-11 14/40
Pin
No. Name Function Interface
39
(39)
RoutTV
This pin is for output only the signal
that is forwarded from RinTV. The
output resistance of this pin is 45 Ω.
This output can be muted in
combination with LoutTV by bus
control.
40
(40)
LoutTV
This pin is for output only the signal
that is forwarded from LinTV. The
output resistance of this pin is 45 Ω.
This output can be muted in
combination with RoutTV by bus
control.
41
(41)
O5
This is a 1 bit DAC output pin. This
is an open-collector output. Make
sure that the current flowing into this
pin is 2.0 mA or less.
42
(42)
Vout2
This pin is for output a sub-channel
composite video signal. The signal
fed into VinTV, VinV1, VinV2, VinS1,
VinS2, YinS1 +CinS1, or YinS2 +
CinS2 is outputted from this pin. The
output resistance of this pin is 25 Ω.
The same signal is also outputted
from Det Select as a sync
separation signal.
70 kΩ
20 kΩ
39
1.5 mA
100 Ω
RoutTV
SW
(39)
(40)
70 kΩ
20 kΩ
40
1.5 mA
100 Ω
LoutTV
SW
(41)
41
Logic
(42)
42
100 Ω
Vout2
SW
<Det Select>
1.5 kΩ
2.0 mA

TA1218N/F
2000-09-11 15/40
Bus Data Specifications
Data Structure
(1) Write
S Slave address
(90H or 92H)
W
(0) A Data 1 A Data 2 A Data 3 A P
(2) Read
S Slave address
(91H or 93H)
R
(1) A Data 4 A P
Note2: Slave address is switched by the voltage applied to pin 27 (address). Switched to 90H when low (GND);
switched to 92H when high (VCC) during write mode.
Contents of Data
Mode Data No. Contents of Data
B07 B06 B05 B04 B03 B02 B01 B00
Audio mute YC output switching
Data 1
[F0H] LoutTV
RoutTV
Lout2
Rout2
Rout1 Lout1
Forced TV
Audio
Yout Cout
B17 B16 B15 B14 B13 B12 B11 B10
Data 2
[1FH]
Sync
detection
sensitivity
switching
Sync
output
switching
Sync (diagnosis) detection switching Input select (main)
B27 B26 B25 B24 B23 B22 B21 B20
DAC output switching
Write
Data 3
[07H]
O5 O4 I/O3 I/O2 I/O1
Input select (sub)
B37 B36 B35 B34 B33 B32 B31 B30
ADC input discrimination S input discrimination
Read Data 4
I/O3 I/O2
Hi
I/O2
Low
I/O1
Hi
I/O1
Low CinS1 CinS2
Power-on
reset
Note3: Shown in [ ] are reset data.
Note4: The data contents marked by a slash (/) are an unused bit (data free).

TA1218N/F
2000-09-11 16/40
Main Video Select: Terminal 38 (38) Output Signal
Bus Data
Mode Output Signal
S Input
Discrimination Input Select (main)
Input S/V Vout1CS1 CS2 B12 B11 B10
V Y/VinS1 Low
S Y/VinS1 +
CinS1
0
S1
FV Y/VinS1
Open
*0 0
1
V Y/VinS2 Low
S Y/VinS2 +
CinS2
0
S2
FV
(Note5)
Y/VinS2
*
Open
0 1
1
V1 V VinV1 **1 0 1
V2 V VinV2 **1 1 0
TV V VinTV **1 1 1
Do not use [100] for the input select data.
Note5: FV: Forced Video Mode.
Main L/R Select: Terminal 37 and 35 (37 and 35) Output Signal
Bus Data
Mode Main L/R
Output Signal Forced TV
Voice Input Select (main)
Input Lout1 Rout1 B03 B12 B11 B10
S1 LinS1 RinS1 0 0 *
S2 LinS2 RinS2 0 1 *
V1 LinV1 RinV1 1 0 1
V2 LinV2 RinV2 1 1 0
TV LinTV RinTV
0
1 1 1
TV LinTV RinTV 1 ***
Do not use [100] for the input select data.

TA1218N/F
2000-09-11 17/40
Sub (PIP) Video Select: Terminal 42 (42) Output Signal
Bus Data
Mode Output Signal
S Input
Discrimination Input Select (sub)
INPUT S/V Vout2 B22 B21 B20
V Y/VinS1 Low
S Y/VinS1 +
CinS1
0
S1
FV Y/VinS1
Open
*0 0
1
V Y/VinS2 Low
S Y/VinS2 +
CinS2
0
S2
FV Y/VinS2
*
Open
0 1
1
V1 V Vin1 **1 1 1
V2 V Vin2 **1 1 0
TV V VinTV **1 1 1
Do not use [100] for the input select data.
Sub L/R Select: Terminal 37 and 35 (37 and 35) Output Signal
Bus Data
Mode SUB L/R
Output Signal Forced TV
Voice Input Select (sub)
Input Lout2 R
out2 B03 B22 B21 B20
S1 LinS1 RinS1 0 0 *
S2 LinS2 RinS2 0 1 *
V1 LinV1 RinV1 1 0 1
V2 LinV2 RinV2 1 1 0
TV LinTV RinTV
0
1 1 1
TV LinTV RinTV 1 ***
Do not use [100] for the input select data.

TA1218N/F
2000-09-11 18/40
Y Output Select: Terminal 30 (32) Output Signal
Bus Data
Mode Y Output
Signal Y Output Switching
Input Through Yout
Main V Select Mode
(see table 2-2.)
B01
Yin Yin 0
V through Y/VinS1
V or FV
1
S1
Y through Y/VinS1
S1
S *
Yin Yin 0
V through Y/VinS2
V or FV
1
S2
Y through Y/VinS2
S2
S *
Yin Yin 0
V1
V through VinV1
V1 V
1
Yin Yin 0
V2
V through VinV2
V2 V
1
Yin Yin 0
TV
V through VinTV
TV V
1
C Output Select: Terminal 34 (34) Output Signal
Bus Data
Mode Y Output
Signal C Output Switching
Input Through Cout
Main V Select Mode
(see table 2-2.)
B00
Cin Cin 0
V through Y/VinS1
V or FV
1
S1
C through CinS1
S1
S*
Cin Cin 0
V through Y/VinS2
V or FV
1
S2
C through CinS2
S2
S*
Cin Cin 0
V1
V through VinV1
V1 V
1
Cin Cin 0
V2
V through VinV2
V2 V
1
Cin Cin 0
TV
V through VinTV
TV V
1

TA1218N/F
2000-09-11 19/40
Sync Detection Select: Terminal 4 (46) Output Signal
Bus Data
Detection
Select Sync Output
Sync Switching Sync Detection Switching
Mode
Det Select Sync Out B16 B15 B14 B13
TV VinTV 1 1
V1 VinV1 0 1
V2 VinV2 1 0
Video Input
S1 Y/VinS1
Sync 0 0
0 0
Vout1 Vout1 1 1
Vout2 Vout2 0 1
Yout Yout 1 0
Video Output
Cout Cout
Sync 0 1
0 0
Rout1 ★R
out1 1 1
Lout1 ★L
out1 0 1
Rout2 ★R
out2 1 0
Audio Output
Lout2 ★L
out2
1 *
0 0
For Det Select marked by ★, the video input or video output corresponding to data B15, B14, and B13 is
selected.
Sync Detection Sensitivity Switching
Bus Data
Detection Sensitivity Switching
Mode
B17
High 1
Sensitivity
Low 0

TA1218N/F
2000-09-11 20/40
Audio Mute
Bus Data
Mode
Audio Mute
Output Mute B07 B06 B05 B04
off 0
Lout1
on
***
1
off 0
Rout1
on
**
1
*
off 0Lout2
Rout2 on
*
1
**
off 0LoutTV
RoutTV on 1
***
DAC Output Switching
Bus Data
Mode
DAC Output Switching
Output State B27 B26 B25 B24 B23
Open 0
I/O1
Low
****
1
Open 0
I/O2
Low
***
1
*
Open 0
I/O3
Low
**
1
**
Open 0
O4
Low
*
1
***
Open 0
O5
Low 1
****