Unitron U-2200 User manual

U 2200
U 2200
U-2200
U-2200
U-2200

Digitalizzazione di
Tiziano Garuti
www.1000bit.net
CONTENTS
CHAPTER 1INTRODUCTION ....•.......•..•.. PAGE 1
CHAPTER 2INSTALLATION
...........•...... PAGE 6
CHAPTER 3U·2200 OPERATION
..........••.... PAGE 8
CHAPTER 4VIDEO
..•••••..•...••...••..... PAGE 17
CHAPTER 5INPUT/OUTPUT
••••••......••..... PAGE 24
APPENDIX ••••••••••.•.•.••.••••.•••...• PAGE 33

UNITRON 2200 PERSONAL COMPUTER
The U·2200 is a CP/M~ compatible microcomputer. This manual covers
the infonnation on the config.n8tion. installation and operation. The bibliography
in APPENDIX Alists several references which may aid you in use of various
la~ages and operating systems.
CHAPTER 1
INTRODUCTION:
The U-2200 system has two major parts: Computer chassis and detached
keyboard. Acoiled cable connects between them.
In this manual all descriptions of direction are based on your facing the
machine, in fiG. '·1.
FIG. ,.,
On the front of the chassis, as shown in fiG. 1-2, there are apower indicator
and akeyboard connector.
FIG. 1-2
Front P8ne4
I

The rear panel has several connectors (Fig. 1-3) for Disk Drives, Video
Monitor, Cassette Recorder and Joy stick. required
to make afunctional computer. It also has 5extention slots compatible
with Apple
II peripherals. These slots are numbered #1, #3, #4, #5 and #7.
The chassis contains the computerboard and power supply. Open the cover
of chassis. and you will see the power supply on the ri~t side above the computer·
board. The power supply is ahigh frequency switching mode and proYides four
DC Voltages: +5V, +12V, -5V, -12V. The source of power can be either 110V
AC or 220V AC, switch selectable (FIG. 1-4). The output of power supply connects
to the computerboard via a G-pin connector. The connector pinout is shown in
Fig.ne 1-5.
FIG. 1-4
,...-------------------_.----------------------_ ~
1GND +12V -5V -12V +5V +5V:
, ,
~ - ----- --.--------------- -------- -- -. -_._~
GAME TAPE TAPE
I/O OUT IN
.[][].
220V 110V
VIDEO DRIVE
1
::[J]
DRIVE
2
FIG,1-6 Computerboard
VIDEO DISPLAY:
Display type: Memory mapped display
Displaymode: Text, Low-resolution Graphics, High.Resolution Graphics.
Text capacity:
960 characters (24 lines, 40 columns)
Character type: 5x7
dot matrix
Character_set: Upper/Lower case ASCII
Character modes: Nonnal, Inverse, Flashing
Graphics capacity: 1920 blocks (Low-Resolution)
in a 40 by 4S array.
53760 dots (High·Resolution)
in a2S0 by 192 array.
FIG. 1-5 Power Pinout
COMPUTERBOARD:
The U·2200
is asingle board computer. The computerboard (Fig. 1-6)
includes the 6502 and Z·80 microprocessors, RAM (Random Access Memory),
ROM (Read only Memory). IC's (Integrated Circuits) and other components
2
In the center of rear side of the computerboard there is ametal connector
marked "VIDEO". This connector allows you to attach a-rable between
the U.2200
and aclosed-<:ircuit video monitor. It
is afemale RCA phono jack. On the right
rear conner, there
is a 4·pin.connector (ie. auxiliary video connector) for an RF
"?odulator that can connect to either TV set or video mointor. The U-2200 has
Video soft-switch functions. If you have an SO-<:olumn card plugged in slot #3,
you can plug the output of an SO-<:olumn video into a2-pin Connector marked
"SO-<:ol input" giving you automatic video switching.
3

THE CASSETTE INTERFACE:
On the right of the rear edge of computerboard are two small black packages
labeled "Tape in" and "Tape out".
These are miniature earphone jacks into which you can plug two cables,
one for recording and the other for play back, which has apair of miniature
earphone plugs on each end. The other end of this cable can be connected to a
standard cassette tape recorder so that your U-2200 can save information on
audio cassette tape and read it back again_
THE DISK DRIVE CONNECTORS:
The U-2200 computerboard includes the disk controller's functions which
made by the advanced technology of PAL@ sequencer, so you can directly
connect two drives. The connectors are located at the rear left of the computer-
board. This controller lin dedicated slot #61 can drive two 5%" floppy disk drives.
If you wish to use more than two disk drives, plug extra disk interface cards in
extention slots and connect drives as you need.
THE GAME I/O CONNECTOR:
To the right of cassette connectors is a16-pin socket for game I/O. The
purpose of the Game I/O connector is to connect special input and outpUt devices
to enhance the effect of programs, especially in game programs. This connector
allows you to connect three one-bit inputs, four one·bit outputs, adata strobe,
and four analog inputs, all of which can be managed by your programs.
KEYBOARD:
The U·22OO has adetached keyboard which connects to the computerboard
with acoiled cable by a15·pin female connector. Most of your contact with
U·2200 will be through the keyboard. In the keyboard case there is an 8ohm
speaker controlled by asoft-switch. This soft·switch is associated with memory
location number 49200. Any reference to this address lor the equivalent address
-16336 or hexadecimal SC030HI will cause the speaker to emit aclick.
4
Keyboard
Number of Keys: 72
Coding: Upper/Lower case ASCII
Output: Seven bits plus strobe
Power requirements: +5V at 300 MA
Special key: Numeric Keypad and
function keys
FIG. '-7 Keyboard
VIDEO MONITOR
To operate the U-2200 system, you will also need avideo monitor or a
TV se~. If you do not have amonitor and your TV set does not have avideo input,
you Will need an RF modu!ator to modulates the video output signal on astandard
!V channel frequency for display on aTV receiver. Remember, when atelevision
IS u~d, the quality of the display will not be as good as the display on avideo
monitor.
5

CHAPTER 2
INSTALLATION:
There are four connections you must make. They are power. video outPUt,
keYboard, and disk drive. They are normally made on the computer rear panel.
The power supply
is 110/220V AC selectable. check your power source
and set the switch to suit. The power receptacle
is located in the upper right corner.
Insert the end
of the supplied power cord into this connector.
Video
output is provided at either the RCA connector or the 4-pin connector
for RF modulator. If anormal video monitor is being used, it can connect to
the RCA connector or the video CM,ltput of an RF modulator. If you use a ·TV
set, connect it to the RF output of an RF modulator.
The keyboard has acoiled cable ended with a15·pin O·type connector.
Plug this connector
to the male connector on the front panel.
On
the left rear of the computerboard are two 20-pin connectors for disk
drives. Connect
your master drive in the connector labeled "drive 1".
If the 80<:01umn card is used. plug it into slot #3, and the video output
of the 8O<:0lumn card connects to the 2-pin connector on the riltlt of slot #7.
The U·2200 provides an auto-switching function between 80/40 character Text
display.
If aprinter is used, plug the printer interface card into slot #1. Other cards
can be plugged into any
empty slots according to their instruction manuals.
GETTING STARTED
The U-2200
is adual processor computer system. Both the 6502 and Z-80
microprocessors are supported for full, compatible operation
in one computer.
Turn
the power' on after set-up. You will hear a "beep" from the speaker.
The screen
will show the message in FIG. 2-1.
6
UNIT RON DUAL PROCESSORS COMPUTER SYSTEM
WITH AUTO·BOOTING CP/M.
CONNECT
DISK DRIVE IN DRIVE 1CONNECTOR
AND INSERT
CP/M SYSTEM DISKETIE.
PRESS ANY
KEY TO START!
FIG. 2·'
If there i, no response or something strange happens, please turn the power
off and check
the following:
1: Keyboard connector and its direction.
2: Power connector and power source switch.
3: Video connector and 80<:01umn video if installed.
4: Peripheral cards
in slots.
5: Disk drive connections.
make sure every connection
is correct, then turn the power on again. If it still
does not work, press "control-reset"
or check the connections again.
Once the correct message appears on
the screen, insert the CP/M system
diskette into drive 1and press any key
to boot CP/M.
If amessage appears as FIG. 2-2, it means th'at the computer can not find
the disk controller. You can press any key to try again.
···CAN NOT FIND DISK CONTROLLER.
PRESS ANY
KEY TO RETRY
FIG. 2-2
The U-2200 has one
ROM on the computerboard. This ROM is a boater.
It boots the system from diskette.
The U·2200 has 24K
ROM space split into two banks, switched by soft-
switches. Referercing
the address $COAO will switch to bank 1, address $COAF
to bank O. You can add a ROM CARD for your applicatons.
7

CHAPTER 3
U-2200 OPERATION
The U-2200 is adual processor computer. Both the 6502 and Z-80
microprocessors are supported for full, compatible operation
in one computer.
All circuitry except the power supply is located on asingle computerboard.
~
•w•
0•0
•a•
•
~
a"
0•a
•w•
••a
~
~
awz
•aaa
SO·COLUMN a•;; u
MEMORY
TIMING
System timing is derived from the 14.318 MHZ crystal located at Al on
the computerboard.
Memory
in U-2200 consists of Random Access Memory (RAM), Read-only
Memory (ROM), and I/O locations. The memory map is shown as Fig. 3·2. The
RAM memory range $DOOO·$FFFF can be accessed like alan!J.lage carel. ROM
space is 24K and is split into 2banks. Softswitches are used to select the Bank
oor Bank 1 ROM area. (Table 3·21. Power-on initialization is in bank O.
VI EO
VIDEO
~
ADDRESSING
>TIMING
SIGNALS
"8O{40 COLUMN
~
~
0
•
•
w
~
VIDEO DATA
0
~
'---
VIDEO
tRAM H
RAM64K
MUX
ADDRESSING
LANGUAGE CARD
r-
CONTROL
KEYBOARD I--
ROM
I--
ZOO
6502
I--
ANALOG
PERIPHERAL I/O
12
~
•
-uw
w
~
~
"•
>w
w0
~
•"•
•a
•w
U"0
a0
Table 3·' TimingSignllb
Master oscillator output. Used to derive other timing signals.
7.159MHz timing signal.
1.023 MHZ phase 0system clock. Complement to ;1. Sometimes
referred
to as;2 in other literature.
1.023
MHZ phase 1system clock.
General purpose timing signal. Twice the fre(JJency of the system
clocks.
but asvmmetrical.
DESCRIPTION
~1
03
The video cootrol and addressing signals are also generated by this circuitry. Video
generation consists
of 192 scan lines on the video screen. These are grouped into
24 lines of eight scan lines each. Fifteen synchronization signals are used. They
consist of
"H" (Horizontal) and "V" (Vertical) groups of signals. The va throu!tl
V4 signals are used to define the vertical line position on the screen. The Va
through Vc signals are used to define the vertical scan line position within the
vertical screen line.
SIGNAL
14M
7M
i>O
FIG.3·' System Block Diagram
89

$6000 ..........••.....•••......•••••.................••..
~ HGR2
$4 .....•••...••••...••......•••....................••.
$FFFF '.' .
$DFFF
~~~ .....•..... ~~~ ~~O .
$0000 ~?~ ~?~ ~~ ~~?~ _
$Cooo ..................•.................. I~~ .
$2000 .....•.....••.....•••......•......... ~~~~ .........••
SOBFF ...........•.......•.......•.•...................••
$0800 .....••......•••....•••.•....•••..... ~~~~~ .......••.
$0400 ......•.•....•.......•......••....... ~~~~' .........••
ROMl SELECT 1
28
ROM2 SELECT
2
27
BANKO!BANKl 3
26
A'2
A7
•
25
vee
A6
5 2.
A8
A5
6
23
A.
A'
All
A3
7 22
DE
A2
8
21
AID
A' •
20
eE
10 I.
AD
11
'8
07
00
06
01
12 17 05
13 16
02
"
15
D.
GNO 03
booter ROM. aligmented at the bottom. which will boot CP/M. It will also accept
the
ROM CARD to use the 24K ROM space. The socket pinout is shown in Fig
3-5. Table 3-6 is the description of the signals.
RAM
ROM
BANK 1
ROM
BANKO
ADDRESS
Table
3·2 Soft Switch Address for ROM Selection
FIG. 3-2 System Memory Map
$0200 ......••......•......••......••.................•.••
STACK
SOl00
..............•..... _ ••.•....••.. _ _.
SYSTEM
USE
$0000 , " .
FIG. 3-5
Description
Table 3-6
Active Lo when the address is $FOOO-$FFFF of BANK 1.
Active Lo when the address is SDOOO-5EFFF of both
banks.
Active
Lo when the address is SFOOO·SFFFF of bank O.
The Booter ROM is enabled by this two signals.
Hi when in Bank O.
Lo when is Bank 1.
Address Bus.
Data Bus.
CE,
DE
BANK O/BANK 1
ROM1 SELECT
ROM2 SELECT
AO·A12
00·07
Signals
$COAO
BANK 1
SCOAF
BANKO
Address
LANGUAGE CARD AREA:
The upper
16K of RAM appears as aLanguage card. Soft switches are used
to enable and disable
ROM and RAM in this address range and are effective for
whichever bank of
ROM is selected. The architecture is such that there are two
4K block of RAM in the SD~-$DFFF memory range.
The system uses
eig,t 4164 dynamic RAM's located in positions E4-El'.
In location F8. there is 28-pin socket for ROM space. This will accept the 24-pin
6502
The 6502 is adynamic microprocessor operating at 1.023 MHz clock rate.
It uses the address and data busses only when the tflJ signal is high or active. When
¢O is low, the microprocessor is doing internal operations and does not need the
address and data busses.
10
11

Z-80
The l-BO microprocessor is located on the computer board and is buffered
to the address and data busses. The Z·80 is configured to allow direct execution
of 8080 and l-BO programs and operate under the CP/M operating system. The
computer supports a56K CP/M confi!J.Iration.
TIMING
ADDRESS BUS INTERFACE
The Z·BO address bus interface is constructed such that the memory conflicts
that exist between the 6502 based system and conventions used by the Z·80
microprocessor and
CP/M are resolved. Table 3·7 shows how memory appears
to the Z·80 versus normal 6502 configJration.
Tlible
3--7
PERIPHERAL I/O
Note
that the Z-80 can address cootigJous memory from $OOOO·$DFFF
without accessing the 6502's Zero page of memory or the peripheral I/O memory
area.
Along
the rear side of the computerboard are five peripheral I/O connectors.
These connectors are used for peripheral interface boards designed for the U-2200
or the Apple II Computer. Peripheral Board I/O space has been set aside for use
with each
of the five slots and there is also a2K common area for use by any
of the boards installed.
,The 2-80 is svr:chronized and phase locked to the 6502 clocks. During
the, video refresh period,
411, the 7 MHZ clock is divided into three half clock
perrods
of 135 nanoseconds. The first half·dock is high the second is low and
the third
is high. At the end of the third half clock the sig'nal goes low and re~ains
low until the start of the next tP1. Thus, the Z·80 clock is low during all of tfAJ
and asmall part of ,1. This timing scheme creates an effective 2-80 clock rate
of 2.041 MHZ.
Each type. of ~achi~e cycle contains one memory access period during
¢(J. The. read/wr~te signal IS synchronized ensuring that the write can only go
tow during the time the 2-80 clock is high. Because all address transitions from
t~e Z·80 occur when the clock is high, they must all occur during ¢l while the
Video update access is occurring. Thus, each ¢(J has stable addresses on the bus
for
the entire duration of the cycle.
CONTROL
The Z-80.
is contr~lIed by write commands to the area of memory that
normally contains aperipheral ROM. It is nec:essay to use write commands to
ensure that the 6502 will not perform two accesses in succession which would
prevent switching back
to the 6502. •
When the U·2200 power
is turned on, the RESET signal forces the Z.80
to
the off state. The RESET signal is synchronized to the system clock to ensure
~at awrite operation cannot be interrupted. The Z-80 is immediately placed
In the WAIT mode and remains in this mode until activated.
Upon receipt of awrite to the SC2oo-SC2FF area the Z-80 is enabled
The Z·80 remains
in the wait mode until one memory dycle occurs with z-aO
address infonnaton on the bus. At this point the Z-80 is allowed to run with
no further wait cycles required. Receipt
of another write to the $C200.$C2FF
area
of memory, by the Z-80. will return the Z·80 to the WAIT mode.
2-80 address
$0000 -$OFFF
$1000 -$1FFF
$2000 - $2FFF
$3000 - $3FFF
$4000 -$4FFF
$5000 -S5FFF
$6000 - $6FFF
$7000 - $7FFF
$8000 - $8FFF
$9000 - $9FFF
$AOOO - $AFFF
$BOoo - $8 FFF
$COOO -$CFF F
$0000 - $OFFF
$EOOO - SE FF F
SFOOO -$FFFF
6502 address
$1000 - $1 FFF
$2000 -$2FFF
$3000 - $3FFF
$4000 - $4FFF
$5000 - $5FFF
$6000 - $6FFF
$7000 - S7FFF
$8000 -$8FFF
$9000 - $9FFF
$AOoo - $AFFF
$8000 -$8FFF
$0000 - $OFFF
$EOOO - $EFFF
$FOOO-$FFFF
$COOO -$CFFF
SOOOO -SOFFF
12 13

Each of the slots is numbered. They are #1, #3, #4, #5 and #7. Each of
the five 5O-pin connectors is individually selected by control circuitry. Table
3·8 provides detail on the signals available
at these connectors. The pinout is
shown in FIG. 3-6.
I/O SELECT This signal
is normally high. It becomes low during
q,o when areference is make to SCnXX, where 'n' is
the slot number.
29
PIN
2-17
18
SIGNAL
AO·A15
RIW
Table 3-8 peripheral I/O signal descriptions
DESCRIPTION
The buffered address bus. The address on these pins
becomes valid through ¢(J.
Buffered ReadflNrite signal. This signal become valid
the same time the address bus does, and goes high during
aread cycle and tow during awrite cycle.
30
31
32
33
34
RES
-12V
-5V
Non.Maskable Interrupt. When this line is pulled low
the U-2200 begins an. interrupt cycle.
Interrupt Request. When this line
is pulled low the
U-2200 begins an interrupt cycle if 6502's interrupt
disable (I) flag
is not set.
When this line is pUlled low the 6502 begins aRESET
cycle.
This line
is ainput signal from peripheral cards. When
this line
is pulled low the ROM address range of $0000-
$FFFF is disabled on the slots.
-12 volt powtlr supply, 0.5 Amps is available for all
peripheral slots.
-5 volt power supply, 0.5 Amps is available for all
peripheral slots.
I/O STROBE Normally high, this line goes low during ¢(J when
the
address bJs contains an address between $caoo and
$CFFF.
50 +12V
42-49 DO·D7
40 '"
~~
41 DEViCE
SELECT
Phase 0clock.
This signal becomes active -low, on aconnector when
the address bus holds an address between SCOnO and
$cOnF, where
'n' is the slot number plus $B.
Buffered bidirectional data bus. The data on these lines
become valid
300 nsec into ¢(J on awrite cycle, and
should be stable no less
_~an 100 nsec before the end
of q,o on aread cycle.
+12 volot power supply,
'2:.5 Amps is available for all
peripheral slots.
7
MHZ clock.
Asymmetrical 2
MHZ clock.
Phase 1clock.
When this line is pulled low, all $COXX-C7XX address
decoding
is inhibited.
7M
OJ
,11
USER 1
36
37
38
39
Daisy-<:hain interrupt output to lower priority devices.
This pin
is usually connected to pin 28 (lNT IN).
Daisy chain
DMA output to lower priority devices.
This pin
is usually connected to pin 27 (DMA IN).
+5V volt power supply. 3Amps
is available for use
at the peripheral slots.
System electrical ground.
Daisy-<:hain DMA input from hiltler priority devices.
Usually connected
to pin 24.
The
6502's RDY input. This signal is going low during
1/11 halts the 6502 with the address bus holding the address
of the current location being fetched.
Pulling this line low disables the 6502's address bus
and halts
the 6502. The line is held high by a 1Kohm
resistor to +5V.
DMA OUT
ROY
INTOUT
GROUND
DMAIN
+5V
21
20
24
25
22
26
27
23
28
INT IN Daisy-<:hain interrupt input from higher priority devices.
Usually connected
to pin 23 (INT OUT).
14
IS

0
GNO "" .5V
DMAIN
27
"
DMAOlJT
INTIN
"
2J
INTOUT
N"'
""0
....
'Ra
JO " ROY
RES
"
20 110 STROBe
INH
~I§
"
N.C.
-1211
"
ArN
-sv ""."
N.C. " "
."
7"
3S I~
l~
"
'"
OJ
" I~
"
."
0'
3S OJ
'"
USER 1
J9
"
"0
00
'0 I~
"
A9
DEVICE SELECT
" I~
13
"
A9
07
"9
'7
06
",
'6
OS
",
AS
O'
'S I~
13
6"
03
"SAJ
02
.,
•
A2
0'
"I~
~
,"
DO
~l~
2
All
.. 1211
,1/0 SELeCT
01
FIG. 3-6 Peripheral Connector Pinout
16
CHAPTER 4
VIDEO
SCREEN FORMAT
Three different kinds of information can be shown on the video display
to which your U-2200 is connected (without 8O-column card);
, I Text. U-2200 can display 24 lines of numbers, special symbols, and
upper/lower case letters with 40 of these characters on each line. These characters
are formed
in a dot matrix 7dots high and 5dots wide. There is aone-dot wide
space on either side
of the character and aone-dot hig, space above each line.
2) Low-Resolution Graphics.
The" U·2200 can present 1,920 squares in an
array
40 blocks wide and 48 blocks hi!tl.
3) Hi!tl-Resolution Graphics. The U-22DO can also display a dot matrix of
280 dots wide by 192 dots high.
SCREEN MEMORY
The video display uses information in the system's RAM to generate its
display, The value
of asingle memory location controls the appearance of a
particular fixed object on
the screen. This object can be acharacter, two stacked
blocks, or aline
of seven dots. In Text and Low-Resolution Graphics mode, an
area of memory containing 1024 locations is used as the source of the screen
infonnation.
Text and Low-Resolution Grahics share this memory area. In Hi!tl
Resolution Graphics mode, aseparate, larger area (8,192 locations) is needed
because of tile greater amount of infonnation which is being displayed. These
areas
of memory are usually called "pages",
SCREEN PAGES
There are actually two areas from which each mode can draw its information.
The first area
is called the "primary page" or "page 1". The second area is called
the "secondary page" or "page 2" and is an area of the same size immediately
following
the first area.
The secondary page
is useful for storing pictures or text which you wallt
to be able to display instantly, Aprogram can use the two pages to perfonn
animaion by drawing on one page while displaying the other and suddenly flipping
pages.
17

Text and Low-Resolution Graphics share the same memory range tor the
secondary page, just as they share the same range for the primary page, Both
mixed modes which were described above are also available on the secondary
page, but there is no way to mix the twO pages on the same screen.
VIDEO DISPLAY MEMORY RANGE
Screen P
...
Begins 8t: Ends at:
H.x
0"
Hex Ooc
Textllo·Res
Primary $400 1024
$7FF
2047
Secondary
$800
2048 SBFF 3071
Hi·Res Primary $2000 B192
$3FF
16383
Secondary $4000 16384
$5FF
24575
SCREEN SWITCHED
ASCII SCREEN CHARACTERS
I""., ..
FI_ino
.. No,m,1
IConuoU
~_"" .. l
0«_
,""
..
.. O'
..
'"
".
,~ , ..
,~
'" '" ". ,
..
-
"" '" ""
'"
... ...
...
'"
...
...
..... ...
=
"'"
."
.~
,O'
••,••,••,•• •
", ,,,,,,,,,,,
'"
•,
..
, , ,•,
, , , , •,
..
,•, , ,
'"
,,#,, , #, , , #,
...
,,•, , ,•
•, , ••,,••,,,
", ,u, ••,u••,u•,
, ..
,•u•" ,••, , ••,,••
..
,,,•
'"
GW,GW,GWG
,W••
...
",,•",,•",,•
0 ..
"x••
,•,0,•,0,y,0,y,•
10$ ....
,, , ,
.. ,,
..
,,
11 $8
,(·,((,
..
,(•
..
,(•(
12$C
,,<,,<,,<,,,I
''''
M(-
..
M(-
..
M,-
..
M,m1
....
"·
..
>·
">".>".
""
0"-
-I,0-,,0I,
-0-,,y'
Screen Soft Switches
There are eight special memory locations which control the setting of the
soft switches for the screen. They are set up
in pairs; when you reference one
location
of the pair yoo turn its corresponding mode "on" and its companion
mode "off". The pairs are:
The devices which decide between the various modes, pages, and mixes
are called "softswitches", They are switches because they have two positions
(for example: on
or off, text or graphics) and they are called "soft" because they
are controlled by
the software of the computer. Aprogram can "throw" aswitch
by referencing the special memory location for that switch. The data which are
read from
or written to the location are irrelevant; it is the reference to the address
of the location which throws the switch.
19
FIG. 4-1 Map of the Text screen
1124
1152
128111
1408
IS36
166.
1792
192111
10"
1192
1328
1448
1576
171114
1832
196f
110.
1232
1361
1488
1616
1744
1872
,,..
" ..
" ..
" ..
SSSI
" ..
" ..
Sl ..
$7S1
""
"AI
$S28
5SA8
S62S
S6AS
5728
51AS
""
"DO
ssse
SSDe
S6Se
"DO
$7S1
SlDO
Display aGRAPHICS mode
Display TEXT mode
Display
all TEXT or GRAPHICS
Mix TEXT and aGRAPHICS mode
Display
the Primary page
Display the Secondary page
Display
lO·RES GRAPHICS mode
Display HI-RES GRAPHICS mode
Description
-16304
-16303
-16302
-16301
-16300
-16299
-16298
-16297
49232
49233
49234
49235
49236
49237
49238
49239
Decimal
Hex
SC050
$eaSl
$C052
SCOS3
$C054
SC055
$C056
$C057
Location:
18

The TEXT Mode
In the Text mode, the U-2200 can display 24 lines of characters with up
to 40 characters on each line. Each character on the screen represents the contents
of one memory location from the memory range of the page being displayed.
The character set includes the 26 upper-case letters, the 26 lower-case letters,
the 10 digits, and 33 special characters.
The area of memory wh ich is used for the primary text page starts at location
number 1024 and extends to location number 2047. In machine language, the
primary page is from hexadeciaml address $400 to address $7FF; the secondary
page is from $800 to $BFF. Each of these pages is 1024 bytes long. Those of
you intrepid enough to do the multiplication will realize that there are only 960
characters displayed on the screen. The remaining 64 bytes in each page which
are not displayed on the screen are used as temporary storage by programs stored
in PROM on interface peripheral boards.
Fi~re 4·1 is amap of the U-2200 display in text mode, with the memory
location addresses for each character position on the screen.
THE LOW-RESOLUTION GRAPHICS ILO·RES) MODE
In the Low-Resolution Graphics mode, the U·2200 presents the contents
of the same 1024 location of memory as for the Text mode, but in adifferent
format. In this mode, each byte of memory is displayed not as an ASCII character,
but as two blocks, stacked one atop the other. The screen can show an array
of blocks 40 wide and 48 high, each block can be white or black.
Since each byte in the page of memory for Low-Resolution Graphic represent
two blocks on the screen, stacked vertically, each byte is divided into two equal
sections, called "nibbles", Each nibble can hold avalue from zero to 15. The
value which is in the lower nibble of the byte determines the color for the upper
block of that byte on the screen, and the value which is in the lower nibble
determines the color for the lower block on the screen. Value 0 is black, the others
are white.
Fi!J.lre 4-2 is amap of the U-2200's display in Low-Resolution Graphics
mode, with the memory location addresses for each block on the screen.
20
.."
5480
""
5580
5600
5680
""
5780
5428
54A8
5528
55A8
5628
5M8
5728
51A8
$450
$400
$550
55Dlt
5650
$6D0
$150
57D0
1024
11 52
1280
1408
1536
1664
1792
1921'
1064
1192
1320
1448
1576
1704
1832
1960
1104
1232
1361'
1488
1616
1744
1872
2000
FIG.4-2 Map of Low-Resolution Graphics Mode
21

SlIM '191
Sleae
Ine
SliM '44'
S11se 1516
snM Ill(
Sl2M un
su.. 1961
SUM '*'
S2t1l un
SllA' .J6t
12m ",u
511.... 1616
un, '144
121 ... 1 un
UnI .,.
12) ... 1911'
S2t541 Inl
S2tDl ....
121541 '511
UIDI 1656
512541 1114
n1D1 '912
12)541 91441
SllDl 9161
If _
IIU._
1_-
l)fll_
1_,1_
111~11_
1'1" 11'"
111 ... 1101
FIG. 4-3 Map of the High·Resolution Graphics Screen
22
THE HIGH·RESOLUTION GRAPHICS (HI-RES) MODE
The U·2200 has asecond type of graphic display, called High-Resolution
Graphics. When
your U-2200 is in the High Resolution Graphics mode, it can
display 53,760 dots
in amatrix 280 dots wide and 192 dots high. The screen
can display black and white dots.
The High-Resolution Graphics mode takes its data from an 8,192-byte
area
of memory, usually called a "picture buffer". There are two separate picture
buffers:
one for the primary page and one for the secondary page. Both of these
buffers are independent
of and separate from the memory areas used for Text
and Low-Resolution Graphics. The primary page picture buffer for the High·
Resolution Graphic mode begins
at memory location number 8192 and extends
up to location number 16384; the secondary page picture buffer follows on the
heels of
the first at memory location number 16384, extending up to location
number 24575.
Each
dot on the screen represents one bit from the picture buffer. Seven
of
the eight bits in each byte are displayed on the screen. Forty bytes are displayed
on each line
of the screen. The least significant bit (first bit) of the first byte in
the line is displayed on the left edge of the screen., followed by the second bit,
then the third, etc. The most significant (eighth) bit of each byte is not displayed.
After one
byte then follows the first bit of the next byte, and so on. Atotal of 280
dots are displayed on each of the 192 lines of the screen.
The
dots whose corresponding bits are "on" (or ~al to 1) appear white;
the dots whose corresponding bits are "off" (or equal to OJ appear black. Fi!JJre
4-3 shows the U-2200's display screen in High·Resolution Graphics mode with
the memory addresses of each line on the screen.
BO-COLUMN SOFTSWITCH
The U-2200 has an 80-<:ol video Auto-switching function worked by two soft.
switches. Referencing the addresses SC051 and $C059 will switch to
80 column
Text display if you have the 80-<:01 card in its slot. Referencing the address $C058
or $C050 will return to 40 column display. Most CP/M software will search for
the
80-<:01umn card and automatically switch to 80-<:01 display if the card is found.
23

CHAPTER 5INPUT/OUTPUT Table 5·1 The
ASCII Character Set
KEYBOARD SPECIAL lOCATIONS
READING THE KEYBOARD
These Ire the special memory locations used by the keyboard:
The U-2200 has several built-in Input and Output (110) capabilities. Details
of these I/O features are found in the remainder of this chapter.
Table 5-2 Keys and their associated ASCII codes
Upper case Mode
X.y Alone CTRL
SHIFT 80lh Koy Alone CTRL
SHIFT 80th
_.
'AO 'AO 'AO 'AO
RETURN $80 $80 $SO $80
0
'BO 'BO
'CO 'CO
GSC7
$87 SC7 $87
11
'B'
'Bl
'Al
'A'
H
,ea
$8B
,ea
$8B
2"
'B2 'B2
'A2 'A2
,
$C9 ...
'CO
$8.
3#
'B3
'B3 'A3 'A3
J
'CA
saA
,CA
$8A
.,
'B' 'B'
, ..
'A'
X
'CB
$8B
'CB
$8B
S%
,BS
'BS 'AS
'AS
L
'CC
$8C
'CC
$8C
50
'B. 'B. 'A.
'A.
M
'CD
saD
'CD
$80
7'
'B7 'B7 'A7 'A7
N
,CE
saE
,CE
$8E
B,
'BB 'BB 'A8
'AS
0
,CF saF
'CF '8F
.1
'B. 'B.
'A.
'AO
P@
'DO
$90
'DO
$90
.
'BA
,BA
'AA
,AA 0
'0'
$91
'0'
'"
~
,BB
'BB 'AB 'AB
R
'02
'92
'02
$92
.<
'AC 'AC 'BC 'BC
S
'03 '.3 '03
$93
-" 'AD 'AD
'Bo 'Bo
T
'D.
, ..
'D.
$9'
>
'AE
,AE
'BE 'BE
U
'OS
$OS
'OS
$9S
"
'AF
'AF 'BF 'BF
V
'D.
'96
'D.
'96
A
'C,
sa'
'Cl
sa,
W
'07
$97
'07
'.7
B
'C2 '82 'C2
sa2
X
'DB
'98
'08
,.B
C
'C3
sa3
'C3
$83
y
'D.
'99
'D.
,.,
0
'C,
$8'
'C.
sa.
Z
,DA
$9A
,oA
$9A
E
,CS
sas
'CS
$8S
~
$8B saB sa8
$8B
F
'CO
'86
'CO
$8B
~
,.S
,.S
'.S
,.S
ESC
'.B
,.B
$9B
'.B
-,
'DE
S.E
'DO '.0
Decimal:
'28 14'
160
".
,.2
208 22. 2.0
Hell:
$80
'90
'AO '.0 'CO 'DO
$EO
'FO
0
$0
00'
dI.
0
~
pp
,$1
~h
""
, , A0••
2$2
••
",2 "2 B Ab,
3
$3 ~. .oJ
#3 C S,•
•
$4
~,
"'.
,•0T•,
S $5 ~q
Mk % S E U•"
•
SO
~k
"'"
• • FV f •
7 $7
bo'
~b
7GW,w
B $8
..
Q"
,BHXh•
•
$9 h<
-I•,y;Y
10
'A
If
wb
·,JZI,
11
'B
~ ~
•XIkI
12
'C
If ..
<LI,I
13
'0
""-"MJm
,.
$E ~
">N-")
'S
SF
.;
"' I,0-0
Nb
Description
Keyboard Data
Clear Keyboard Strobe
-16384
-16368
Decimal
49152
49168
location
The keyboard sends seven biu of information which together form one
character. These seven bits, along with another
sjgnal which indicates when a
key has been pressed, are available to most programs as the contents of amemory
location. When you press a key on the keyboard, the value in this location becomes
128 or greater, and the particular value it assumes is the numeric code for the
character which was pressed. Table
5-1 shows the ASCII characters and their
associated numeric codes. The location will hold this one value until you press
another key, or until your program tells the memory location to forget the
character it's holding.
Keyboard
Disk I/O
Speaker
Cassette
I/O
Game I/O
Once your program has accepted and understood akeypress, it should tell
the keyboard's
memOfY location to "release" the character it is holding and prepare
to receive anew one. Your program can do this by referencing another memory
location. When you reference this other location, the value contained
in the first
location will drop
below 128. This value will stay low until you press another
key. This action
is called "clearing the keyboard strobe". Your program can either
read or write to the special memory location; the data which are written to or
read from that location are irrelevant. Once you have cleared the keyboard strobe,
you can still recover
"the code for the key which was last pressed by adding 128
($801 to tt1e value in the keyboard location.
H ..
seooo
SC010
24
25

A
a
C
o
E
F
G
H
I
J
K
L
Alone
El
E2
E3
E.
E5
E6
E7
Ea
E9
EA
Ea
EC
lower case Mode
Shift
C, M
C2 N
C3 0
C4 P
C5 Q
C6 R
C7 S
ca T
C9 U
CA V
ca w
cc X
y
Z
Alone
ED
EE
EF
FO
F,
F2
F3
F'
F5
F6
F7
Fa
F9
FA
Shift
CD
CE
CF
00
01
02
03
D'
05
06
07
08
DO
OA
The RESET key at the upper right corner of the main section does not
generate
an ASCII code, but instead is directly connected to the microprocessor.
When the RESET and CTRL keys are pressed together, all prlXessing stops. When
the key is released, the computer starts areset cycle.
The CTRL
and SHIFT keys generate no codes by themselves, but only
alter the codes produced by other keys.
The power li!tlt at the lower left-hand corner
is an indicator lamp to show
when the power
is on. This key is also aswitch to set aflip-flop for upper!lower
case characters.
DISK I/O
The U·2200 has two disk I/O connectors on the rear panel. The booter
will boot CP/M from the drive 1connector. Table 5-3 lists the pin out of the
connector which
is compatible with Apple disk drives.
The U·2233 Keyboard has many predefined
and user-defined function
keys and each key has autorepeat function. The operation will be found in Key·
board operation sheet.
26
pin
'.3,5,7
2
•
6
8
o
10
1" 12
13,15,17,19
,.
16
18
20
Table 5-3
description
GROUND
QO
Q1
Q2
OJ
-12V
WR REO
+5V
+12V
ENABLE
READ
DATA
WRITE DATA
WRITE PROTECTION
27

SPEAKER
I~side the keyboard case, there is asmall 8ohm speaker. It is connected
to
t~e Internal electronics of the U·2200 so that aprogram can cause it to make
avanety
of sounds.
T~e speaker is controlled by asoft switch. This soft switch is not like the
~ft switches controlling the video modes, but is instead atoggle switch. Each
tIme aprogram references the memory address associated with the speaker switch
the speak~r will change state: change form "in" to "out" or vice·versa. Each tim~
the state IS changed; the speaker produces atiny "click". By referencing the address
of the speaker switch frequently and continuously, aprogram can generate a
steady
tone from the speaker.
The soft switch for
the speaker is associated with memory location number
4~200. Any reference to this address (SC030J will cause the speaker to emit a
clICk.
CASSETTE I/O
There are two small black packages labelled "TAPE
IN" and "TAPE OUT"
for cassette I/O. The connector marked "out" is wired to another soft switch on
the U.2?OO board, This is another toggle switch, like the speaker switch. The
soft ,switch for the cassette
output plug can be toggled by referencing memory
location .
num~r 491.84 (or the equivalent -16352 or hexadecimal SC0201.
Referencing ~I~ location will make the voltage on the out connector swing from
zero to 25 millivolts,
or return from 25 millivolts back to zero. If the other end
of ~e ~able is ~IUgged into the MICROPHONE input of the cassette tape recoder
wtllC~ .'s recording onto atape, this wilt produce atiny "click" on the tape. By
repetl.tlon the program produces a tone on the tape. By varying the pitch and
duration
of this tone, information may be encoded data on atape and saved for
later use.
Be forewarned that if you attempt to flip the soft switch for the cassette
output by w~iting to its special location you will actually generate two "clicks"
on
the recording. You should only use "read" operations when toggling the cassette
output soft switch.
The other connector, marked "TAPE IN", can be used
to "listen" to a
cassette tape recording.
I.ts main p:urpose is to provide ameans of listening to
tones on
the tape, decoding them Into data, and storing them in memory Thus
pro~rams or data which were stored on cassette tape may be read back and used
again.
28
The input circuit takes a 1 volt (peak-to-peakJ signal from the cassette
recorder's EARPHONE jack and converts it into astring
of ones and zeroes. Each
time the signal
is applied to the input circlJit swings from positive to negative,
or vice,versa, the input circuit changes state: if it was sending ones, it will start
sending zeroes, and vice versa. Aprogram can inspect the state
of the cassette
input circuit by looking at memory location number 29248 or the equivalents
-16288 or hexadecimal SC060. 1f the value which is read from this location
is greater than or equal to 128, then the state is a "one", if the value in the memory
location
is less than 128, then the state is a "zero". Although BASIC progr<ms
can read the state of the cassette input circuit, the speed of aBASIC program
is usually much too slow to be able to make any sense out of what it reads.
GAME I/O
The purpose
of the Game I/O connector is to allow you to connect special
input and
output devices to heighten the effect of programs in general, specifical-
ly game progrin1s. The connector allows you to connect three one-bit inputs,
four one-bit outputs, adata strobe, and four analog inputs to
the U·2200, all
of which can be controlled by your progr<ms. The Game controllers connected
to cables can plug into the Game I/O connector. The two rotary dials on the
controllers are connected
to two analog inputs on the connector. The two push
buttons are connected to two of the one-bit inputs.
ANNUNCIATOR OUTPUTS
The four one-bit
outputs are called "annunciators". Each annunciator output
can be used as an input to some other electronic device, or the annunciator outputs
can be connected to circuits
to drive l<mps, relays. speakers. etc.
Each annunciator
is controlled by asoft switch. The addresses of the soft
switch for
the annunciators are arranged into four pairs, one pair for each
annunciator.
If you reference the first address in apair, you turn the output of
its corresponding annunciator
"off", if you reference the ~ond address in the
pair, you rurn
the annunciator's output "on", When an annunciator is "off",
the voltage on its pin on the G<me I/O connector is near 0volts; when an
annunciator
is "on", the voltage is near 5volts. There is no inherent means to
determine
the current setting of an annunciator bit. The annunciator soft switches
are:
29

TABLE 5-4 ANNUNCIATOR SPECIAL lOCATION STROBE OUTPUT
ANALOG INPUTS
ONE-BIT INPUTS
The three one-bit inputs can each be connected to either another electronic
device or to apushbutton. You can read the state of any of the one-bit input
from amachine language or BASIC program in the same manner as you read
the Cassette Input Addresses 49249 through 49251 (16287 through -16285
or hexadeciaml $C061 through $C063).
The four analog inputs can be connected to 150K ohm variable resistors
or potentiometers. The variable resistance between each input and the +5 Volt
supply is used in aone-shot timing circuit. As the resistance on an input varies,
the timing characteristics of its corresponding timing circuit change accordingly.
Machine lan!1Jage programs can sense the changes in timing loops and obtain
anumerical value corresponding to the position of the potentiometer.
Read/Write
R
R
R
R
RNI
R
R
R
RNI
R$C040
-16320 49216
Address Decimal
Hox
49200 -16336
$C030
49184 -16352 $C020
49256
-16288
$C060
49240 -16296
$C058
throug, through through
49247
-16289
$caSF
49249 -16287
$C061
49250
-16286
$C062
49251 -16285 $C063
49252
-16284
$C064
49253 -16283
$C065
49254 -16282
$C066
49255 -16281 $C067
49264 -16272 $C070
TABLE 5-5: INPUT/OUTPUT SPECIAL LOCATIONS
There is an additional output, called C040STROBE. which is normally
+5 Volts but will drop to zero volts for aduration of one-half microsecond under
the control of amachine lan!1Jage or BASIC program. You can trigger this "s~rObe"
by referring to location number 49216 (-1632 or $C04F). Be aware th.at If you
perform a "write" operation to this location, you will trigger the strobe tWice.
cassette out
cassette In
Flag.inputs
speaker
Function
Annunciators
Analog
inputs
Analog
Clear
Utility
Strobe
Ann
State Address
Hox
Decimal
off 49240
-16296
$Ca58
on
49241
-16295
$C059
off 49242
-16294
$C05A
on 49243
-16293
$C05B
off 49244
-16292
$C05C
on
49245
-16291
$C05D
off 49246
-16290
$C05E
on
49247
-16289
$C05F
3
a
2
Before aprogram can start to read the setting of apotentiometer, it must
first reset the timing circuits. location number 49264 (-16272 or hexadeciaml
$C070l does just this. When you reset the timing circuits, the values contained
in the four locations 49252 through 49255 become greater than 128 (their high
bits are set). Within 3.060 milliseconds, the values contained in these four locations
should drop below 128. The exact time it takes for each location to drop in value
is directly proportional to the setting of the game paddle associated with that
location. If the potentiometers connected to the analog inputs have agreater
resistance than 150K ohms, or there are no potentiometers connected, then the
values in the game controller locations might never drop to zero.
30
31

THE GAME I/O CONNECTOR APPENDIX A
+5V
PBO
PBl
PB2
C040 STROBE
GCO
GC2
Gnd
116
2
'5
3"
•13
5 12
6
11
7
'A
89
NC
ANa
AN'
AN2
AN3
GC3
GC'
NC
REFERENCE
1. Apple II Reference Manual
(product number A2LOO01A)
2. Basic Programming Reference Manual
(product
number A2LOOO6)
3. Apple 1\ Basic Programming Manual
(product
number A2LOO5Xl
FIG. 5·1 Game 1/0
Connector Pinouts
Tibia 506 Gwn8 I/O Signal Descriptions
4. The DOS Manual
(product
number A2l0036)
5. Apple Pascal Operating System Manual
{product number A2l00281
Pin:
,
2-4
Name:
+5V
PBO·PB2
Description:
+5 volt pOW'er supply. Total current drain
on this pin must be less than l00mA.
Single-bit (Pushbutton) inputs. These are
standard 74LS series TTL inputs.
6.
6502 Assembly lan!J.lage Progr<mming by lance A. levonthal
7. Programming The Z·BO by Rodnay Zaks
8. Softcard Manual
9.
The CP/M Handbook with MP/M by Rodnay Zaks
5
6,7.10,1'
8
12·15
9,16
C040 STROBE
GCQ·GC3
Gnd
ANO-AN3
NC
Ageneral-purpose strobe. This line, nor·
mally hi1tl. goes low during tjJJ of aread or
write cycle to any address from $C040
through $C04F. This is astandard 74LS
TTL outPut.
Game controller inputs. These should
each be connected throu!1l a lOOK Ohm
variable resistor to +5\1.
System electrical ground.
Annunciator outPuts. These are standard
74LS serie'S TTL outPuts and must be
buffered if used to drive other than TTL
inputs.
No internal connection.
32
•
•
•
Apple n is atrade mark of Apple, Inc.
CP/M is atrade mark of Digital Research, lne.
Z·BO is atrade mark of Zilog, Inc.
33