VESA 80486VESA User manual

Part No. 03-0023X-00

Copyright Notice
0
Copyright
1992
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E
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AMI
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m
Table Of Contents
Chapter
1
Introduction
What is
VESA
VL-Bus?
Advantages
of
VESA
VL.-Bus
80486VESA Motherboard Overview
80486VESA Features
Performance Report
Chapter
2
Configuration
and
Layout
Connector and Jumper Settings
CPU Selection
Cache
Memory
Configuration
VESA
VL-Bus Identifier
Motherboard
Diagram
Chapter
3
Installation and Operation
Before
You
begin
Installing
The
SIMM Modules
Memory Configuration
System Speed Change
Memory Caching
5
5
9
IO
10
11
12
12
13
14
15
15
16
16
16
20
24
25

1 Introduction
What is VESA VL-Bus?
The
VESA
VL-Bus is
a
proposal from
the
Video
Electronics
Standard Association committee. The
architecture
of the
VL-Bus
generally follows the 486 CPU local bus. Additional hardware
functions
are added to accommodate VL-Bus master devices
and
intrractinn
with
the system I/O bus. The
VL-bus
extends
the
capabilities of the
16-bit
ISA bus to
32-bus
architecture and
up
to
100Mb/sec
(at
50
MH
z
data transfer rate, while maintaining
compatibility
with
ISA
add-on
boards.
Advantage of VESA VL-Bus

Chapter 1: Introduction
80486VESA Motherboard Overview
The 80486VESA system board is a high performance, function
enchanced computer system board that combines the power of
Intel’s new 80486 CPU and the VESA VL-bus. The
board
design
includes a variety of high-powered features. Its high performance
capability can provide an ideal system board solution for a wide
range of demanding applications like CAD/CAM/CAE, database
management, image processing, artificial intelligence, desktop
publishing, and the environments of network and multiuser
systems. The 80486VESA system board fully utilizes the 32-bit
CPU power.
The 80486VESA system board also incorporates an Intel 80486
microprocessor which has an 8 KByte static RAM cache.
Included
is a four-way set associative cache controller implemented on the
80486 chip
and
an internal enhanced numeric coprocessor unit.
The system also has an option to accommodate
64KB,
128KB,
and
256KB of external cache.
Because of its unique memory subsystem design, the 80486VESA
allows for 1 Megabyte to 32 Megabytes of 32-bit high speed
memory by using
256KB,
1MB,
and/or 4MB SIMM
modules.
80486VESA
User’s Manual
3

Chapter
1:
Introduction
80486VESA Features
l Intel 80486 microprocessor
-
8
KBytes static
RAM with four-way set associative internal cache
-
Internal enhanced numeric coprocessor unit (486DX, 486DX2,
487SX,
486SX2)
l Optional 64/128/256KBytes external cache
l SIMM module memory on system board expandable from 1
Megabyte to 32 Megabytes
l Dual system speed via hardware or software selection
l System and video BIOS relocateable to RAM area for enhanced
performance
l Two 32-bit VL-Bus, two
8-bit
ISA bus and four 16-bit ISA
bus
slots
l Fast A20 implementation to speed-up multitasking operating
system
l Hidden DRAM refresh to boost system performance
l SiS-460 Single Chip
Performance Report
80486VESA-20 MHz:
l Landmark Speed Rating
l Power Meter MIPS
80486VESA-25 MHz:
l Landmark Speed Rating
l Power Meter MIPS
80486VESA-33 MI-Iz:
l Landmark Speed Rating
l Power Meter MIPS
80486VESA-50 MHz:
l Landmark Speed Rating
l Power Meter MIPS
: 91.2 MHz (Ver. 1.14)
: 8.898 MIPS (Ver. 1.3)
: 114.1
MHz
(Ver. 1.14)
:
11.136 MIPS (Ver. 1.3)
: 151.9
MHz
(Ver. 1.14)
:
14.819 MIPS (Ver. 1.3)
: 200 +
MHz
(Ver. 1.14)
: 22.271 MIPS (Ver. 1.3)
4
80486VESA User’s Manual

Chapter 2: Configuration a Layout
2
Configuration and layout
Connector and Jumper Settings
Before installing the 80486VESA system board, make sure the
connectors and jumper settings are set for your configuration.
The 80486VESA system board has two jumpers (JP9,
JP1O)
for the
CPU Type selection, and two jumpers (JP12, JP13) for the Cache
Size selection. Connectors are also provided for the front panel
interface between the system board and the computer chassis.
The functions and settings of each connector and jumper setting
are explained as follows (see Figure 1, page 11 for locations).
Front Panel Reset Connector
(JP14)
The reset button connector is a 2-pin single in-line BERG strip. It
is used to reboot the system and will allow safe re-initialization of
the system at any time. The connector should always be set in the
OFF position, otherwise the system will continually reset itself.
The pin assignments are:
JP14 Pin#
Assignment
1
Ground
2
Reset Strobe
Front Panel Turbo Connector
(JP15)
Connector
JP15
is a 2-pin single in-line BERG strip. It is the
connector for the “Turbo” processor speed which can allow you to
switch between system speeds. (Please refer to Chapter 3
“Installation
&
Operation” for a detailed description on speed
switching procedures). The pin assignments are:
80486VESA
User’s
Manual
5

JPl5
Pin#
Assignment
1
Ground
2
Turbo Control
Front Panel Turbo LED Connector
(JP16)
Connector JP16 is a
2-pin
single in-line
BERG
strip. It
can
be
connected to an LED display indicating the CPU speed.
The
display lights up when the CPU is running at full speed (Please
refer to Chapter 3 “Installation
&
Operation”for more information
about speed change). The pin assignments arc:
JP16
Pin#
Assignment
1
2
Front Panel Keylock and Power LED Connector
(JP18)
Connector
JP18
is a 5-pin single in-line
BERG
strip which
provides
for the front panel keylock and power LED connection
When
it
is
connected to a lock on your system
case
you
can
enable or
disable
the keyboard by switching
the
key.
The pin
assignments
are:

Chapter 2: Configuration and Layout
Front Panel Speaker Connector (JP17)
Connector
JP17
is a 4-pin single in-line BERG strip which provides
for the front panel speaker connection. The pin assignments are:
JP17
Pin#
Assignment
1
speaker data
2
N. C.
3
ground
4
+5
v
Power Supply Connector
(PW1)
There is a power supply connectors on-board. The pin assign-
ments are:
PWl
Pin#
Assienment
1
power good
2
+5
VDC
3
+12
VDC
4
-12 VDC
5
ground
6
ground
7
ground
8
ground
9
-5VDC
10
+5VDC
11
+5VDC
12
+5VDC

Chapter 2: Configuration and
Layout
External Battery
(JPl)
The 80486VESA motherboard provides one
external
battery
supply connector. The pin assignments are:
JP1
Pin#
Assignment
1
Battery Positive
2
No Connection
3
Ground
4
Ground
Monitor Type
(JP2)
Jumper JP2 is used to set the display type. The motherboard is
designed to work with both monochrome and color display
monitors. The pin assignments are:
JP2
Pin#
Function
1&2
(Closed)
l&2
(Open) Monochrome Monitor
Color Monitor
Keyboard Connector
(KBl)
The keyboard connector is a 5-pin DIN connector. This connector
consist of a 90-degree printed circuit board PCB mounting. The
pin assignments are:
KBl
Pin#
Assignment
8
keyboardclock
keyboarddata
spare
ground
+5
v
80486VESA User’s Manual

Chapter 2: Configuration and Layout
CPU Type Selection
The 80486VESA motherboard can accomodate either the Intel
486DX, 486DX2,486SX, 487SX, 486 Over Drive, 486SX/DX PQFP
or
P24T.
There are two jumpers to be set for the microprocessor
Selection. Configuration of the correct CPU setting will allow
compatibility with various low end and high end applications.
The jumper settings are:
-
486SX/DX-PQFP
1-2,3-4
l-2 Close Open
486SX
-
2-3
Open Open Close
486DX/486DX2
-
l-2,3-4 1-2 Open Close
486 Over Drive 168-pin
487SX/487SX2
486 Over Drive 169-pin
-
l-2,3-4 2-3 Open Close
P24T
486DX/486DX2 486SX/DX-PQFP l-2,3-4 l-2 Open Close
486 Over Drive 168-pin
487SX/487SX2
486 Over Drive 169-pin 486SX/DX-PQFP l-2,3-4 2-3 Open Close
P24T
CPU Clock Selection
The 80486 VESA motherboard uses a CPU frequency generator to
generate the clock instead of oscillator. There are three jumpers to be set
for the CPU clock selection. The jumper settings are:
50
MHz Open
40MHz
Close
33 MHz Close
25 MHz Open
20MI
Close
Close
Close
Open
Close
Close
2-3
2-3
l-2
l-2
1-2
80486VESA
User’s Manual
9

Cache Memory Configuration
There are two jumpers to be set for the cache memory selection
The jumper selections are as follows:
64K
Open
128K
1-2
256K 2-3
Open
Close
Close
Note:
Table 3: Cache Memory Configurations
For
64K
cadre,
install
8Kx8
SRAM
in
locations
1143,
U34,
1135,
U36, U37, U39,
U40,
U41,
and
U42.
For 128K
cache,
install 8Kx8
SRAM
in
locations
1143,
and
32Kx8
SRAM
in
locations U34, U35, U36,
and
U37.
For 256K
cache
install
32Kx8 SRAM in
locations
U43,
U34,
U35, U36, U37, U39,
U40,
U41,
and U42.
VESA VL-Bus Identifier Jumpers
(JP19,
JP20)
The identifier jumpers (JP19,
JP20)
allow VL-Bus slave to identify
the speed of the host CPU.
0 wait write min.
1 wait write min. Open
Close
<=33MHz
>
33MHz Open
Close
10
80486VESA Users Manual


Chapter 3: Installation and Operation
3
Installation and Operation
Before You Begin
Before removing the motherboard from its anti-static bag, you
need to eliminate any static electricity that may be accumulated on
your body. The charge that can build up in your body may be
more than enough to damage integrated circuits on the system
board. Therefore, it is important to observe basic precautions
whenever you will handle or use computer components.
Although areas with humid climate are much less prone to static
build-up, it is best to always safeguard against accidental damage
that may lead to costly repairs. The following measures should
be
sufficient to protect your equipment from static discharge:
l After removing the system cover, discharge any static
electricity that might have accumulated in your body by
touching a grounded or anti-static surface
(e.g.
anti-static
pads). If nothing is available, touch the power supply
hous
ing. This assumes the system unit is plugged in
and
ground
ing
the case. De certain to do this
before
removing
components from their anti-static
coverings
*When handling separate cards, boards or modules, be cau-
tious to avoid contacting with the components on them, and
also with the “gold edge” connectors that plug into the expan-
sion bus. It is best to handle them either
by
their edges or by
mounting brackets that attach to the slot opening in the
system cases.
I
Iowever, the above recommendations arc just
intended to advise reasonable care to
avoid
the static dis-
charge problems.
l Make certain that everything that
connects
to
the system case,
including the power supply, is
unplugged
before doing the in-
stallation work.

Chapter 3: Installation and Operation
Installing The SIMM Modules
The 80486VESA system board can accommodate up to a
maximum of 32 megabytes of memory on board using 8 sockets
for the standard
30-pin
SIMM memory modules. Two banks of
SIMM modules are available for use with 256KB x
9, lMB
x 9 or
4MB x 9
-
80 nanosecond, fast page mode SIMM memory mod-
ules. Each bank contains four SIMM memory sockets. When
installing or removing the SIMM memory modules, extreme care
must be taken to avoid damage to the SIMM sockets. The
80486VESA system board can be configured for various memory
configurations from
1MB
to 32MB. (Refer to Table 4, page 13, for
the memory configurations available).
To install a SIMM memory module, carefully follow the steps
below:
Step 1 Insert the SIMM module’s “gold edge” connectors into the
socket at a 70-degree angle and guide the component side
of the SIMM module to face the edge of the board. The
module can only fit into the socket one way.
Step 2Gently press the SIMM module toward the edge of the
board until it snaps into the socket in a vertical position.
The module should clip into the locking tabs at each end
of the socket. If the pegs do not fit into the holes, the
SIMM is probably not inserted fully into the socket.
To remove a SIMM memory module, carefully follow the steps
below:
Step 1Gently push the edge of the sockets to release the module.
Remove one side of the SIMM module first then the other
side, to prevent from breaking the socket. The module
should fall back at an angle; then it can be removed from
the
socket.

Memory Configuration
Memory can be installed using
256KB,
1MB
or 4MB SIMM mod-
ules. The following are all the available memory configurations:
1MB 256Kx9
----
2MB 256Kx9 256Kx9
4MB
lMBx9
----
8MB
lMBx9
lMBx9
16MB
4MBx9
----
20MB
lMBx9 4MBx9
32MB
4MBx9 4MBx9
Table
4: Memory Configurations
14
80486VESA User’s Manual

System Speed Change
The
80486VESA
system board can be configured for full or low
speeds to accomodate most DOS applications. On power up, the
system will be operating in full speed (factory setting).
You can switch between full and low speeds by toggling the turbo
switch or pressing the keyboard keys.
l Toggling the Turbo Switch
1)
Set the turbo switch to the on position to slow down the
system speed
2)
Set the turbo switch to the off position to speed up the
system speed.
9
Pressing the Keyboard Keys
Note: Before
using
the keyboard
keys
to
control
the system speed,
the
turbo switch
has
to be set to the off position.
1)
2)
Press the
<
CTRL
>
<
ALT
>
keys while simultaneously
pressing the
<
-
>
key to slow down the system speed.
Press the
<
CTRL
>
<
ALT
>
keys while simultaneously
pressing the
<
+
>
key to speed up the system speed.
Memory Caching
The
80486VESA
system board provides an optional 64/128/256KB
external cache memory. The internal and external cache enable/
disable selections in the BIOS Advanced CMOS Setup program,
will turn ON or OFF, either the
80486VESA’s
8K internal cache or
external memory cache.
80486VESA User’s Manual
15

4
BIOS Setup and Diagnostics
Software Setup
After hardware configuration of the 80486VESA system board is
completed, and system hardware has been assembled, the com-
pleted system may be powered-up. At this point, software setup
should be run to ensure that the system information is correct.
The System Setup is sometimes called CMOS Setup or Standard
Setup. Normally, system setup is needed when the system
hardware is not identical with the information contained in the
CMOS RAM, or whenever the CMOS RAM has lost power.
Running AM1 BIOS
When the system is powered on, the BIOS will enter the Power-On
Self Test (POST) routines. These routines are divided into two
phases:
System Test and Initialization (test and initialize system
boards for normal operations)
System Configuration Verification (compare defined
configuration with hardware actually installed)
The
AMI
BIOS performs the various diagnostic checks at the time
the system is powered up; if an error is encountered, the error will
be reported in one of two different ways. If the error occurs before
the display device is initialized, a series of beeps will be
transmitted (See Appendix C).
16
80486 VESA User’s Manual


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