Winbond W6810 User manual

WECA W6810DK
2727 N First Street, San Jose CA 95134
1
Winbond W6810 Codec
Evaluation System
User’s Guide
W6810DK Evaluation Board Rev 1.06
查询W6810_1供应商 捷多邦，专业PCB打样工厂，24小时加急出货

WECA W6810DK
2727 N First Street, San Jose CA 95134
2
Chapter - 1...................................................................................................................................................... 3
General Description........................................................................................................................................ 3
Introduction: ................................................................................................................................................... 3
W6810DK Features:....................................................................................................................................... 3
Figure 1: W6810DK Evaluation System Component Placement ............................................................................. 4
Chapter - 2...................................................................................................................................................... 5
Hardware Description..................................................................................................................................... 5
Clock Generator: ............................................................................................................................................ 5
Frame Sync:.................................................................................................................................................... 5
BIT CLOCK:.................................................................................................................................................. 6
256 KHZ:........................................................................................................................................................ 6
Figure 2: W6810DK Evaluation System Schematics diagram....................................................................... 7
Chapter - 3...................................................................................................................................................... 9
Jumper Descriptions ....................................................................................................................................... 9
J2A: Frame Sync: .................................................................................................................................. 10
J3: Power Supply 5VDC.......................................................................................................................... 10
J4: GND TST points ................................................................................................................................ 10
J5: Side Tone ........................................................................................................................................... 10
J6: VAG CAP ENABLE: ........................................................................................................................ 10
J7: Transmitter......................................................................................................................................... 10
J8: RJ11 Handset connector.................................................................................................................... 10
J9A: 2.5V Reference Voltage ................................................................................................................. 10
J9B: SPKR+ = PAO ................................................................................................................................ 10
J10: A-Law and µ-Law Selection: ........................................................................................................... 10
J11: 2x20 pin Header:.............................................................................................................................. 11
J12A: SPKR- = R0- ................................................................................................................................. 11
J12B: SPKR-=PA0+ ................................................................................................................................ 11
J13: PCMT:.............................................................................................................................................. 11
J14: BCLKT=BCLK................................................................................................................................ 11
J15A: MCLK = 256KHz ......................................................................................................................... 11
J15B: MCLK=BCLK............................................................................................................................... 11
J16A: POWER-UP .................................................................................................................................. 11
J16B: POWER-Down.............................................................................................................................. 11
J17A: BCLKR = BCLK........................................................................................................................... 11
J17B: BCLKR = BCLK........................................................................................................................... 12
J17C: BCLKR = BCLK........................................................................................................................... 12
J18: PCMT = PCMR ............................................................................................................................... 12
J19A: FSR = FSYNC .............................................................................................................................. 12
J19B: FSR = VCC ................................................................................................................................... 12
J19C: FSR = GND................................................................................................................................... 12
J20: FSX= FSYNC .................................................................................................................................. 12
J21: Receiver Path ................................................................................................................................... 12
Chapter - 4.................................................................................................................................................... 13
Operation Modes .......................................................................................................................................... 13
Standalone Operation: .................................................................................................................................. 13
Back-To-Back Operation: ............................................................................................................................ 14

Chapter - 1
General Description
Winbond’s W6810DK Evaluation/Development System is a Stand-Alone unit that serves
as a simple, easy-to-use demonstration board as well as a powerful evaluation system. All
the functions of the W6810 PCM Codec may be selected in real time to allow complete
evaluation of this IC for an end application. The hardware includes many useful
connectors that will allow easy connection to external hardware for use as an evaluation
tool.
Introduction:
The W6810 is a member of the W68XX family of PCM Codecs. This CMOS product
includes a single voice band CODEC. The CODEC complies with the specifications of
the ITU-T G.712 recommendation. The W6810 also includes a complete µ-Law and A-
Law compander. The µ-Law and A-Law companders are designed to comply with the
specifications of the ITU-T G.711 recommendation. The system can work at 256 kHz,
512 kHz, 1536 kHz, 1544 kHz, 2048 kHz, 2560 kHz & 4096 kHz clock rates. The system
clock is supplied through the master clock input and can be derived from the bit-clock if
desired.
User I/O to the W6810DK Evaluation board is provided via a number of connectors.
These connectors are:
• A 40-pin header provides access to W6810 analog and digital signals (J11)
• RJ11 handset jack (J8)
• Analog transmit(J8) and receive path headers.(J7,J21)
W6810DK Features:
• Easy to use (a stand-alone evaluation system)
• Single 5 V power supply
• Single 3v Power Supply for W6811 or W68310
• Prototype area for application development
• Useful connectors that can be used to connect to standard test equipment
• RJ11 jack for standard handset
WECA W6810DK
2727 N First Street, San Jose CA 95134
3

Prototype
Area
J11 Connector for Back-To-
Back Operation Mode
RJ11 Handset connector
J8
Power Jack
J3
Frame Sync Width
Selector
J1 BIT CLOCK
Select
W6810 Socket
01
J2
J5
J9A
Dip Switches Select JX
J9B
J6
J10A
J10B
J12A
J12B
J15A
J15B
J16A
J16B
J13
J14
J18
J19A
J20
J19B
J19C
J17
WECA W6810DK
2727 N First Street, San Jose CA 95134
4
SW5
SW4
SW3
SW2
Figure 1: W6810DK Evaluation System Component Placement

Chapter - 2
Hardware Description
Clock Generator:
All the necessary clock rates such as Frame Sync, Bit Clock and the 256KHz for the
W6810DK evaluation system are driven from a single 4.096MHz crystal oscillator.
Frame Sync:
The Frame Sync is generated on the W6810DK evaluation board. J19 and J20(SW5)
control the FSR (Frame Sync Receive) and FSX (Frame Sync Transmit) routing.
Populating these jumpers also routes the signal to the 40-pin header (J11).
Setting Dip Switches:
Switch SW2 selects the width of the Frame Sync. The pulse width is set as a number of
BCLKs. The following number of BCLKs for Frame Sync can be set with SW2.
• 1-2-3-4-5-6-7-8
The Dip-Switch SW2 configurations are:
Frame Sync = 8 BCLK Frame Sync = 7 BCLK
ON
8
Frame S
y
nc = 6 BCL
K
1
ON
OFF
OFF
Frame Sync = 5 BCLK
ON
ON
OFF
OFF
WECA W6810DK
2727 N First Street, San Jose CA 95134
5