XIA Pixie-16 MZ-TrigIO User manual

User's Manual
Digital Gamma Finder (DGF)
PIXIE-16
Version 1.40, October 2009
XIA LLC
31057 Genstar Rd.
Hayward, CA 94544 USA
Phone: [phone]; Fax: [phone]
http://www.xia.com

Disclaimer
Information furnished by XIA is believed to be accurate and reliable. However, XIA assumes no
responsibility for its use, or for any infringement of patents, or other rights of third parties, which
may result from its use. No license is granted by implication or otherwise under the patent rights
of XIA. XIA reserves the right to change the DGF product, its documentation, and the supporting
software without prior notice.

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Table of Contents
DISCLAIMER ............................................................................................................................................................. I
TABLE OF CONTENTS ...........................................................................................................................................II
SAFETY .................................................................................................................................................................... IV
SPECIFIC PRECAUTIONS ........................................................................................................................................... IV
END USERS AGREEMENT.....................................................................................................................................V
CONTACT INFORMATION .......................................................................................................................................... V
1 OVERVIEW .......................................................................................................................................................1
1.1 APPLICATIONS.............................................................................................................................................1
1.2 FEATURES ...................................................................................................................................................1
1.3 SPECIFICATIONS ..........................................................................................................................................2
2 SETTING UP......................................................................................................................................................4
2.1 INSTALLATION.............................................................................................................................................4
2.2 GETTING STARTED ......................................................................................................................................4
2.2.1 Startup ...................................................................................................................................................4
2.2.2 Settings...................................................................................................................................................5
2.2.3 Run.........................................................................................................................................................5
2.2.4 Results....................................................................................................................................................5
3 NAVIGATING THE PIXIE-16 USER INTERFACE.....................................................................................6
3.1 OVERVIEW ..................................................................................................................................................6
3.2 STARTUP .....................................................................................................................................................7
3.3 SETTINGS ....................................................................................................................................................8
3.3.1 Filter ......................................................................................................................................................8
3.3.2 Analog Signal Conditioning & Acquire ADC Traces ............................................................................9
3.3.3 Histogram Control...............................................................................................................................10
3.3.4 Decay Time ..........................................................................................................................................11
3.3.5 Pulse Shape Analysis ...........................................................................................................................11
3.3.6 Baseline Control & Acquire Baselines ................................................................................................11
3.3.7 Control Registers .................................................................................................................................11
3.3.8 CFD Trigger ........................................................................................................................................12
3.3.9 Trigger Stretch Lengths .......................................................................................................................13
3.3.10 FIFO Delays ...................................................................................................................................13
3.3.11 Multiplicity......................................................................................................................................13
3.3.12 QDC ................................................................................................................................................15
3.4 RUN...........................................................................................................................................................15
3.5 RESULTS....................................................................................................................................................16
4 DATA RUNS AND DATA STRUCTURES...................................................................................................19
4.1 RUN TYPES ................................................................................................................................................19
4.1.1 Histogram Runs ...................................................................................................................................19
4.1.2 List Mode Runs ....................................................................................................................................19
4.2 OUTPUT DATA STRUCTURES ......................................................................................................................19
4.2.1 MCA histogram data............................................................................................................................19
4.2.2 List mode data......................................................................................................................................19
5 HARDWARE DESCRIPTION.......................................................................................................................23

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5.1 ANALOG SIGNAL CONDITIONING ...............................................................................................................23
5.2 TRIGGER/FILTER FPGAS...........................................................................................................................23
5.3 DIGITAL SIGNAL PROCESSOR (DSP) ..........................................................................................................24
5.4 PCI AND TRIGGER INTERFACE...................................................................................................................25
6 THEORY OF OPERATION...........................................................................................................................26
6.1 DIGITAL FILTERS FOR γ-RAY DETECTORS ..................................................................................................26
6.2 TRAPEZOIDAL FILTERING IN THE PIXIE-16 ................................................................................................28
6.3 BASELINES AND PREAMPLIFIER DECAY TIMES ...........................................................................................29
6.4 THRESHOLDS AND PILE-UP INSPECTION ....................................................................................................30
6.5 FILTER RANGE ...........................................................................................................................................33
7 OPERATING MULTIPLE PIXIE-16 MODULES SYNCHRONOUSLY..................................................34
7.1 CLOCK DISTRIBUTION................................................................................................................................34
7.1.1 Individual Clock mode.........................................................................................................................34
7.1.2 Daisy-chained Clock Mode..................................................................................................................35
7.1.3 PXI Clock Mode...................................................................................................................................35
7.1.4 Multi-Chassis Clock Mode...................................................................................................................35
7.2 FRONT PANEL LVDS I/O PORT ..................................................................................................................35
7.3 FRONT PANEL DIGITAL I/O PORT PIN .........................................................................................................36
7.4 SAMPLE SIGNALS FOR FRONT PANEL TEST PINS .........................................................................................37
7.5 TRIGGER DISTRIBUTION.............................................................................................................................39
7.5.1 Trigger Distribution within a Module..................................................................................................39
7.5.2 Trigger Distribution between Modules................................................................................................39
7.5.3 Trigger Distribution between Chassis .................................................................................................39
7.6 RUN SYNCHRONIZATION ...........................................................................................................................39
8 TROUBLESHOOTING ..................................................................................................................................40
8.1 STARTUP PROBLEMS .................................................................................................................................40
9 APPENDIX A ...................................................................................................................................................41
9.1 JUMPERS....................................................................................................................................................41
9.2 PXI BACKPLANE PIN FUNCTIONS ...............................................................................................................41
9.3 PINOUT OF DIGITAL FRONT PANEL CONNECTORS .....................................................................................42

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Safety
Please take a moment to review these safety precautions. They are provided both for your
protection and to prevent damage to the digital gamma finder (DGF) and connected equipment.
This safety information applies to all operators and service personnel.
Specific Precautions
Observe all of these precautions to ensure your personal safety and to prevent damage to either
the DGF-Pixie-16 or equipment connected to it.
Do Not Hot-Swap!
To avoid personal injury, and/or damage to the DGF-Pixie-16, always turn off crate
power before removing the DGF-Pixie-16 from the crate!
Servicing and Cleaning
To avoid personal injury, and/or damage to the DGF-Pixie-16, do not attempt to repair or
clean the unit. The DGF hardware is warranted against all defects for 1 year. Please contact the
factory or your distributor before returning items for service.

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End Users Agreement
XIA LLC warrants that this product will be free from defects in materials and workmanship
for a period of one (1) year from the date of shipment. If any such product proves defective
during this warranty period, XIA LLC, at its option, will either repair the defective products
without charge for parts and labor, or will provide a replacement in exchange for the defective
product.
In order to obtain service under this warranty, Customer must notify XIA LLC of the defect
before the expiration of the warranty period and make suitable arrangements for the performance
of the service.
This warranty shall not apply to any defect, failure or damage caused by improper uses or
inadequate care. XIA LLC shall not be obligated to furnish service under this warranty a) to
repair damage resulting from attempts by personnel other than XIA LLC representatives to repair
or service the product; or b) to repair damage resulting from improper use or connection to
incompatible equipment.
THIS WARRANTY IS GIVEN BY XIA LLC WITH RESPECT TO THIS PRODUCT IN
LIEU OF ANY OTHER WARRANTIES, EXPRESSED OR IMPLIED. XIA LLC AND ITS
VENDORS DISCLAIM ANY IMPLIED WARRANTIES OF MERCHANTABILITY OR
FITNESS FOR A PARTICULAR PURPOSE. XIA’S RESPONSIBILITY TO REPAIR OR
REPLACE DEFECTIVE PRODUCTS IS THE SOLE AND EXCLUSIVE REMEDY
PROVIDED TO THE CUSTOMER FOR BREACH OF THIS WARRANTY. XIA LLC AND
ITS VENDORS WILL NOT BE LIABLE FOR ANY INDIRECT, SPECIAL, INCIDENTAL,
OR CONSEQUENTIAL DAMAGES IRRESPECTIVE OF WHETHER XIA LLC OR THE
VENDOR HAS ADVANCE NOTICE OF THE POSSIBILITY OF SUCH DAMAGES.
Contact Information
XIA LLC
31057 Genstar Rd.
Hayward, CA 94544 USA
Telephone: [phone]
Downloads: http://www.xia.com/DGF_Pixie-16_Download.html
Hardware Support: [e-mail]
Software Support: [e-mail]

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1 Overview
The Digital Gamma Finder (DGF) family of digital pulse processors features unique
capabilities for measuring both the amplitude and shape of pulses in nuclear spectroscopy
applications. The DGF architecture was originally developed for use with arrays of multi-
segmented HPGe gamma ray detectors, but has since been applied to an ever broadening range
of applications.
The DGF Pixie-16 is a 16-channel all-digital waveform acquisition and spectrometer card
based on the CompactPCI/PXI standard for fast data readout to the host. It combines
spectroscopy with waveform digitizing and the option of on-line pulse shape analysis. The Pixie-
16 accepts signals from virtually any radiation detector. Incoming signals are digitized by 12-bit
100 MSPS ADCs. Waveforms of up to 80 µs in length for each channel can be stored in a FIFO.
The waveforms are available for onboard pulse shape analysis, which can be customized by
adding user functions to the core processing software. Waveforms, timestamps, and the results of
the pulse shape analysis can be read out by the host system for further off-line processing. Pulse
heights are calculated to 16-bit precision and can be binned into spectra with up to 32K channels.
The Pixie-16 supports coincidence spectroscopy and can recognize complex hit patterns.
Data readout rates through the CompactPCI/PXI backplane to the host computer can be up to
109 Mbyte/s. The standard PXI backplane, as well as additional custom backplane connections
are used to distribute clocks and trigger signals between several Pixie-16 modules for group
operation. A complete data acquisition and processing systems can be built by combining Pixie-
16 modules with commercially available CompactPCI/PXI processor, controller or I/O modules
in the same chassis.
1.1 Applications
The Pixie-16 is an instrument for waveform acquisition and MCA histogramming for arrays of
gamma ray or other radiation detectors such as
•Segmented HPGe detectors.
•Scintillator/PMT combinations: NaI, CsI, BGO and many others.
•Cryogenic microcalorimeters.
•Silicon strip detectors.
1.2 Features
•Directly accepts signals from RC-type preamplifiers, photomultiplier tubes or other pulse
sources.
•Two software selectable gain/attenuation settings for each analog input.
•Programmable DC-offset for each analog input.
•Digitization of 16 analog inputs in parallel at a rate of 100 MHz.
•Digital filtering with programmable filter peaking times from 0.04 to 81.28 µs (0.04 µs to
5.24 ms with alternate firmware).
•Built-in pileup inspection and pileup rejection.
•Synchronous waveform acquisition (up to 8k samples per channel) across channels and
modules.

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•Event processing and optional pulse shape analysis performed with 100 MHz, 32-bit
floating point SHARC DSP.
•Accumulation of 16 MCA histograms (32K bins) and acquisition of event by event list
mode data.
•More than 160 backplane lines for clock and trigger distribution or general purpose I/O
between modules.
•Supports 32-bit, 33 MHz PCI data transfers (>100 Mbyte/second) to host computer.
•Graphical user interfaces to control and diagnose system.
•Digital oscilloscope for health-of-system analysis.
•Compact C driver libraries available for easy integration in existing user interface.
1.3 Specifications
Front Panel I/O
Analog Signal
Input
16 analog inputs.
Input impedance: 1kΩor 50 Ohm.
Input amplitude ±1V pulsed, ±1.5V DC.
Digitized at 100MSPS, 12-bit precision.
Digital General
Purpose I/O
16 general purpose input and /or output connections:
6 inputs 3.3V LVTTL logic.
6 outputs 3.3V LVTTL logic.
4 inputs/outputs LVDS signaling.
Rev-D modules have 16 LVDS pairs of Channel VETO input and 1 LVDS
pair of Module VETO input
Backplane I/O
Clock Distributed 50 MHz clock, daisy-chained or dedicated line from slot 2.
Triggers Two trigger busses on PXI backplane for synchronous waveform acquisition
and for event triggers.
Synchronization SYNC signal distributed through PXI backplane to synchronize timers and
run start/stop to 50 ns.
Veto VETO signal distributed through PXI backplane to suppress event triggering.
General Purpose
I/O
160 bussed and neighboring lines on custom backplane to distribute hit
patterns and triggers and for I/O between modules.
Host Interface
PCI 32-bit, 33MHz Read/Write, external memory or FIFO readout rate to host
over 100 MByte/s.
Digital Controls
Gain Two software selectable analog gains: 4 and 0.9 (by 1:0.22 attenuation).
Optional +/- 10% digital gain for gain matching between channels.
Offset DC offset adjustment from –1.5V to +1.5V, in 65536 steps.

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Shaping Digital trapezoidal filter.
Rise time and flat top set independently: 0.04 to 81.28 µs (0.04 µs to 5.24
ms with alternate firmware).
Trigger Digital trapezoidal trigger filter with adjustable threshold.
Rise time and flat top set independently: 0.01 to 0.64 µs (0.01 to 40.96 µs
with alternate firmware).
Data Outputs
Spectrum 32k bins, 32 bit deep (4.2 billion counts/bin) for each channel.
256K×18bit FIFO memory for list mode data
Statistics Real time, live time, input and output counts.
Event data Hit pattern, pulse height (energy), timestamps, pulse shape analysis results,
and waveform data.

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2 Setting up
2.1 Installation
The Pixie-16 modules must be operated in a custom 6U CompactPCI/PXI chassis providing
high currents at specific voltages not included in the CompactPCI/PXI standard
1
. Currently XIA
provides an 8-slot and a 14-slot chassis; please inquire for further options. Put the host computer
(or remote PXI controller) in the system slot (slot 1) of your chassis. Put the Pixie-16 modules
into any free peripheral slot (slot 2-8 or 2-14) with the chassis still powered down. After modules
are installed, power up the chassis (Pixie-16 modules are not hot swappable). If using a remote
controller, be sure to boot the host computer after powering up the chassis.
Connect the output of your detector to the small coaxial connectors on the Pixie-16 front
panels. For Rev-A modules, these connectors are of type MMCX. For Rev-B, C, and D modules,
the connectors are of type SMB. The 2 mm front panel headers (and, on the Rev-B, C, and D
modules, the CAT-5 connector) are for logic I/O. Preamplifier power can be connected to the
DB-9 connectors on the front panel of the 6U chassis.
The Pixie-16 software includes the firmware files and DSP code files required to configure a
module, Windows drivers and a Visual Basic graphical user interface. All files are included on
the distribution CD-ROM and can be installed by running the installation program Setup.exe.
Follow the instructions shown on the screen to install the software to the default folder selected
by the installation program, or to a custom folder. This folder will contain 7 subfolders named
Doc, Drivers, DSP, Firmware, MCA, PulseShape, and Resources. Make sure you keep this
folder organization intact, as the interface program and future updates rely on this. Feel free,
however, to add folders and subfolders for the output data at your convenience.
2.2 Getting Started
This section describes the basic steps to get initial list mode traces or MCA histograms with
the Pixie-16 system. For a detailed introduction to the software interface, refer to section 3.
After installation, find the shortcut Pixie16_VB on your desktop and start it with a double
click. You can also directly run the file Pixie16_VB.exe in the installation folder.
The user interface consists of a left control bar with 4 tabs: Startup, Settings, Run, and Results.
The area to the right will display control panels or graphs. The top menu bar contains links to
some frequently used result displays as well as some advanced parameter tables.
2.2.1 Startup
To boot the modules, select the default Startup tab. Enter the number of modules and specify
the module’s slot numbers. You can click the Select Configuration Files button to verify the boot
files and paths are pointed to the installation folder. Then click the button Boot Pixie-16
Modules. You might hear several clicks from the modules as the gain relays are reset, then the
1
Of the 5 backplane connectors available in a 6U format, the lower two are defined by the CompactPCI/PXI
standard, providing basic supply voltages, PCI host I/O, and basic trigger connections. Pixie-16 modules follow this
standard and are thus compatible with any CompactPCI/PXI module that uses these two connectors only. The upper
three connectors are undefined in the CompactPCI/PXI standard. On Pixie-16 modules, these connectors are used
for custom power supplies with high currents (1.8V, 5.5V, 3.3V) and for extended trigger distribution. Third party
modules or chassis using the upper three connectors are most likely not compatible with Pixie-16 modules.

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bottom status line should show a green marker indicating that the Pixie-16 modules initialized.
For analysis-only operation with no modules, check the Offline Analysis box before booting.
2.2.2 Settings
To configure the modules for your detector, go to the Settings tab. Click on the Acquire ADC
Traces button to view the input signal for either a single channel or for all 16 channels of the
Module selected at the bottom of the panel. Click Refresh to acquire untriggered traces read
directly from the ADC. You can adjust the sampling interval to see a longer time period. Pulses
from the detector should fall in the range from 0 to 4k, with the baseline at ~400, a positive
amplitude (rising edge), and no clipping at the upper limit. If the signal is not in range, click on
the Adjust Offsets button to let the software to automatically set the DC offsets, or you could
manually adjust the DC offset by clicking on the Set DSP Parameter button, then go to the
Analog Signal Conditioning tab and adjust gain, offset and/or polarity.
The most critical parameter for the energy computation is the signal decay time Tau. In the Set
DAQ Parameter panel, go to the Decay Time tab to set this value. You can either enter it directly
for each channel, or enter an approximate value in the right control, select a channel, and click
Find it to let the software determine the decay time automatically. Click Accept it to apply the
found value to the channel. (If the approximate value is unchanged, the software could not find a
better value.)
When the signal is in range and the decay time found, you can store the parameters on file
using the Save Parameter button. Make sure to check the box for DSP settings to not only save
the GUI settings (such as slot numbers), but also the DSP settings for each module (gain, offset,
decay times, etc.)
2.2.3 Run
When the DSP settings have been found, at least initially, you can go to the Run tab to start a
test data acquisition. Using the Run Type control, specify a list mode run to acquire waveforms
and MCA histograms or an MCA mode run to only acquire histograms only. Click Start to begin
acquisition.
2.2.4 Results
After the run, statistics, spectra or traces can be viewed by selecting the corresponding item
from the Results tab. The data is also saved to files that can be imported in other analysis
software. To obtain the best energy resolution in the spectra, it is likely necessary to refine the
DSP settings as described in section 3.3.

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3 Navigating the Pixie-16 User Interface
3.1 Overview
The Pixie-16 graphical user interface (Figure 3.1) provides the user a simple tool to control the
Pixie-16 cards. It was written using Microsoft’s Visual Basic programming language and its
underlying function calls are directed to two dynamic link library (DLL) files,
Pixie16AppDLL.dll and Pixie16SysDLL.dll. Those users who are interesting in learning more
about these DLLs can read the Programmer’s Manual.
After installing the Pixie-16 software on the user’s computer, the Pixie-16 user interface can
be launched by double clicking the shortcut Pixie16_VB on the desktop (or the executable file
Pixie16_VB.exe in the installed folder). The user interface consists of a work area where DAQ
graphs, tables and panels are to be shown, a control bar to the left which contains four tabs with
control buttons (Startup, Settings, Run, and Results), and status indicators at the bottom. Below
we describe the steps of using this interface.
Figure 3.1: The graphical user interface for Pixie-16.

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3.2 Startup
After the user interface is launched, the user will see the window as shown in Figure 3.1, with
the default Startup tab selected in the control bar. Enter the number of modules and specify the
module’s slot numbers as labeled on the chassis. You can click the Select Configuration Files
button to open the Files and Paths panel (Figure 3.2) and verify that the boot files and paths are
pointed to the installation folder. You can directly input the file name in the boxes, or use the
“file open” icon at the right end of each line to locate a specific file.
Usually, users need only change the DSP par file to load alternative settings (same as Loading
Parameters in the Setting tab) or change the Output Data Paths to direct the output data into a
custom location. However, if you receive code updates or custom code from XIA, you can select
here which code to use.
TIP: changing the Boot files path will automatically change the file paths for all files.
Figure 3.2: The boot files and path selection panel.
When the files and paths are set correctly, click the button Boot Pixie-16 Modules. You should
hear several clicks from the modules as the gain relays are reset, then the bottom status line
should show a green marker indicating that the Pixie-16 modules initialized. If one or more cards
failed to boot, click the Log button to view a series of diagnostic messages. The messages are

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also stored in a file called “Pixie16msg.txt” and can be sent to XIA for support. It is located in
the same folder as the user interface program Pixie16_VB.exe.
For analysis-only operation with no modules, check the Offline Analysis box before booting.
In offline mode, the user can still access every button or control of the interface. You can view
results from previous acquisitions by loading the result files.
3.3 Settings
The operation of the Pixie-16’s on-board DSP is controlled by a number of parameters. They
can be set using the Set DAQ Parameters panel, opened by clicking on Set DSP Parameters in
the Settings tab. The panel has 12 tabs, as shown in Figure 3.3. Using the button in the left
control bar, parameters can be
Copied from one channel to some or all channels and modules in the system. When
copying, first select source module and channel at the top of the copy panel, then select the
items to copy on the left (corresponding to the 12 tabs of the Set DAQ Parameters panel), then
select the destination channels and modules, and finally click on Copy.
Saved to disk. When saving, make sure to check the box for DSP settings to not only save
the GUI settings (such as slot numbers), but also the DSP settings for each module (gain,
offset, decay times, etc).
Loaded from disk.
3.3.1 Filter
The Filter tab shows the settings for the energy filter used to compute the pulse height and of
the trigger filter to detect pulses. The filtering principle is described in section 6. General rules of
thumb for the following important parameters are
1. The energy filter flat top time should be about the same as the pulse rise time.
2. The energy filter rise time can be varied to balance resolution and throughput. Typically,
energy resolution increases with the length of the filter rise time, up to an optimum when
longer filters only add more noise into the measurement. The filter dead time is about
TD = 2 × (T
rise
+ T
flat
), and the maximum throughput for Poisson statistics is 1/(TD*e).
For HPGe detectors, a rise time of 4-6µs is usually appropriate.
3. A longer trigger filter rise time averages more samples and thus allows setting lower
thresholds without triggering on noise.
4. Typically the threshold should be set as low as possible, just above the noise level.
The remaining parameters are usually minor adjustments for fine tuning and otherwise can
remain at the default values:
5. A longer trigger filter flat top time makes it easier to detect slow rising pulses.
6. Choose the smallest energy filter range that allows setting the optimum energy filter rise
time. Larger filter ranges allow longer filter sums, but increase the granularity of possible
values for the energy filter rise time and flat top time and increase the jitter of latching
the energy filter output relative to the rising edge of the pulse. This is usually only
important for very fast pulses.

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Figure 3.3: Set DAQ Parameters panel.
3.3.2 Analog Signal Conditioning & Acquire ADC Traces
The Analog Signal Conditioning tab controls the analog gain, offset and polarity for each
channel. It is useful to click on Acquire ADC Traces in the left control bar to view the signal read
from the ADCs while adjusting these parameters (see Figure 3.4). The display shows all 16
channels of a module in 4 graphs of 4; you can set the sampling interval for each block to capture
a longer time frame. Click refresh to update the graph.
Pulses from the detector should fall in the range from 0 to 4095, with the baseline at ~400 to
allow for drifts and/or undershoots and no clipping at the upper limit. If there is clipping, adjust
the Gain and Offset or click on the Adjust Offsets button to let the software set the DC offsets to
proper levels.

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Since the trigger/filter circuits in the FPGA only act on rising pulses, negative pulses are
inverted at the input of the FPGA, and the waveforms shown in the ADC trace display include
this optional inversion. Thus set the channel’s Polarity such that pulses from the detector appear
with positive amplitude (rising edge).
Figure 3.4: Set DAQ Parameters panel (Analog Signal Conditioning tab) and ADC trace display.
In the single channel tab, the ADC trace display also includes the option to view a FFT of the
acquired trace. This is useful to diagnose noise contributions. Above the graph are controls for
cursors and an option to change between linear and log scale. You can also save a trace to a text
file using the disk symbol at the right.
3.3.3 Histogram Control
The binning factor in the Histogram Control tab controls the number of MCA bins in the
spectrum. Energies are computed as 16 bit numbers, allowing in principle 64K MCA bins.
However, spectrum memory for each channel is limited to 32K bins, so computed energy values
are divided by 2
binning factor
before building the histogram. Binning Factor is usually set to 1, but
for low count rates and wide peaks, it might be useful to set it to a larger value to obtain a
spectrum with fewer bins, but more counts per bin.
Emin is reserved for a future function to subtract a constant “minimum energy” from the
computed energy value before binning to essentially cut off the lower end of the spectrum.

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3.3.4 Decay Time
The most critical parameter for the energy computation is the signal decay time Tau. It is used
to compensate for the falling edge of a previous pulse in the computation of the energy. You can
either enter Tau directly for each channel, or enter an approximate value in the right control,
select a channel, and click Find it to let the software determine the decay time automatically.
Click Accept it to apply the found value to the channel. (If the approximate value is unchanged,
the software could not find a better value.)
3.3.5 Pulse Shape Analysis
In the Pulse Shape Analysis tab, you can set the total trace length and the pre-trigger trace
delay for the waveforms to be acquired in list mode runs.
3.3.6 Baseline Control & Acquire Baselines
The Pixie-16 constantly takes baseline measurements when no pulse is detected and keeps a
baseline average to be subtracted from the energy filter output during pulse height
reconstruction. Baseline measurements that differ from the average by more than Baseline Cut
will be rejected as they are likely contaminated with small pulses below the trigger threshold.
You can click on the Acquire Baseline button to view a series of baseline measurements for each
channel, and in the single channel view you can build a histogram of baselines to verify that the
Baseline Cut does not reject measurements falling into the main (ideally Gaussian) peak in the
baseline distribution. Usually, it is sufficient to keep Baseline Cut at its default value.
Note: Since the baseline computation takes into account the exponential decay, no pulses
should be noticeable in the baseline display if a) the decay time is set correctly and b) the
detector pulses are truly exponential.
Baseline Percent is a parameter used for automatic offset adjustment; by clicking on the
Adjust Offsets button, offsets will be set such that the baseline seen in the ADC trace display falls
at the Baseline Percent fraction of the full ADC range (e.g. for Baseline Percent = 10% the
baseline falls at ADC step 409 out of 4096 total).
3.3.7 Control Registers
The Control Registers tab sets a number of options affecting the module as a whole (Module
Control Register B) or affecting each channel individually (Channel Control Register A):
1. Module Control Register B
a) Enable pullups for backplane bus lines. This should be enabled for only one
module in the crate.
b) Connect trigger signals to backplane. You can set the module to share triggers
over the backplane with other modules, unless you run each module (or
channel) independently.
c) Accept external trigger and run inhibit signals. Enable this option to let this
module accept external trigger and run inhibit signals and then put the signals
on the backplane so that all modules can see the same signals. This should be
enabled for only one module in the crate.
d) Crate master module (multiple crates only). This option is only used when
multiple Pixie-16 crates communicate with each other. By enabling this option,

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the mater module in each crate is responsible for sending synchronization or
trigger signals to certain backplane lines. This should be enabled for only one
module in the crate.
e) Enable run inhibit signal input. This option is only applicable to the module
which has the “Accept external trigger and run inhibit signals” option enabled.
This should be enabled for only one module in the crate.
f) Multiple crates. This option is only used when multiple Pixie-16 crates
communicate with each other.
2. Channel Control Register A
a) Good channel. Only channels marked as good will have their events recorded.
This setting has no bearing on the channel's capability to issue a trigger. There
can be a triggering channel whose data are discarded. Channels not marked as
good will be excluded from the automatic offset adjustment.
b) Histogram energies. When this box is checked, pulse height (energy) computed
for each event will be incremented to an energy histogram in the MCA
memory.
c) Capture trace. When this box is checked, trace will be captured and recorded
for each event, along with other list mode information, e.g. timestamp, energy,
etc.
d) Capture QDC sums. When this box is checked, eight QDC sums will be
recorded for each event. QDC sums are consecutive sums of the list mode
trace.
e) Enable CFD trigger. Check this box to enable this channel’s CFD trigger.
Otherwise, regular trapezoidal fast trigger will be used.
f) Require global external trigger for validation. Check this box to require global
external trigger to validate events for this channel.
g) Capture raw energy sums and baseline. Check this box to record raw energy
sums and baseline value for each event.
h) Require channel external trigger for validation. Check this box to require
channel external trigger to validate events for this channel.
i) Enable pileup rejection. Check this box to enable pileup rejection for this
channel. Otherwise, pulses will still be recorded even if they are piled up.
3.3.8 CFD Trigger
The following CFD algorithm is implemented in the Pixie-16s. Assume the digitized
waveform stream can be represented by data series Trace[i], i=0,1,2,… First the fast filter
response of the digitized waveform is computed as follows:
∑∑
+−
−+−=−−=
−=
)FGFL(i
)1FGFL*2(ij
i
)1FL(ij
]j[Trace]j[Trace]i[FF (1)
Where FL is called the fast length and FG is called the fast gap of the digital trapezoidal filter.
Then the CFD is computed as follows:

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)1W(
2/]i[FF]Di[FF]Di[CFD
+
−+=+ (2)
Where D is called the CFD delay length and W is called the CFD scaling factor.
The CFD zero crossing point (ZCP) is then determined when CFD[i] > 0 and CFD[i+1] < 0.
The timestamp is latched at Trace point i, and the fraction time f is given by the ratio of the two
CFD response amplitudes right before and after the ZCP.
( )
ns10
2CFDout1CFDout
1CFDout
f×
+
=(3)
Where CFDout1 is the CFD response amplitude right before the ZCP and CFDout2 is the CFD
response amplitude (absolute value since CFDout2 is negative) right after the ZCP. The Pixie-16
DSP computes the CFD final value as shown below and stored it in the output data stream for
online or offline analysis.
( )
65536
21
1×
+
=CFDoutCFDout
CFDout
CFD (4)
Valid CFD Scale values and corresponding CFD scaling factors are
CFD Scale Corresponding CFD scaling factor
0 0.25
1 0.125
2 0.0625
3 0.03125
3.3.9 Trigger Stretch Lengths
External trigger stretch can be adjusted between 10 ns and 40.96 µs. It is used to stretch the
global external trigger pulse.
Veto stretch can be adjusted between 10 ns and 40.96 µs. It is used to stretch the channel veto
pulse.
Fast trigger backplane length can be adjusted between 10 ns and 40.96 µs. It is used to stretch
the fast trigger pulse to be sent to the backplane for sharing with other modules.
3.3.10 FIFO Delays
External delay length can be adjusted between 0 and 2.56 µs. It is used to delay the incoming
pulse in order to compensate the delayed arrival of the global external trigger pulse.
Fast trigger backplane delay can be adjusted between 10 ns and 1.28 µs. It is used to delay the
fast trigger pulse before it is sent to the backplane for sharing with other modules.
3.3.11 Multiplicity
Coincidence can be checked within one Pixie-16 module and/or its immediate neighbors to
decide whether to accept an event. To ensure maximal flexibility when specifying how
coincidence is checked, a scheme for forming 16 different coincidence groups within one Pixie-
16 module was implemented as shown in Figure 3.5. Fast triggers generated within each of the
16 channels of a Pixie-16 module can be distributed to its immediate neighbors through the PXI
backplane. Thus a group of up to 48 fast trigger signals can be formed within one Pixie-16
module by combining all fast triggers from the module itself and its two immediate neighbors.

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Furthermore, up to 16 such groups can be formed within one Pixie-16 module, and each group
can have each of its 48 fast trigger signals enabled or disabled by using a user defined
contribution mask (48-bit).
It should be pointed out that two neighboring modules share the 16 nearest neighbor lines
between them, i.e., if for instance one module sends 5 channels’ fast triggers to its left neighbor
module, its left neighbor module can then only send 11 channels’ fast triggers to its right
neighbor module. Therefore, it should be very careful when arranging groups of multiplicity
through transferring fast triggers to neighboring modules to ensure that there will be no bus
contention on the backplane.
Figure 3.5: Generation of groups of coincidence triggers.