7.4.13. TCStatus................................................................................................................................................ 82
7.4.14. TCDRControl.......................................................................................................................................... 83
7.4.15. HKData .................................................................................................................................................. 83
7.4.16. SCETTime ............................................................................................................................................. 83
7.4.17. SCETConfig........................................................................................................................................... 84
7.4.18. ErrorStatus............................................................................................................................................. 84
7.4.19. UARTCommand..................................................................................................................................... 84
7.4.20. MMData ................................................................................................................................................. 84
7.4.21. MMStatus............................................................................................................................................... 85
7.4.22. MMWritePointer ..................................................................................................................................... 85
7.4.23. MMReadPointer..................................................................................................................................... 85
7.4.24. MMPartitionConfig.................................................................................................................................. 86
7.4.25. MMPartitionSpace.................................................................................................................................. 86
7.4.26. MMDownloadPartitionData .................................................................................................................... 86
7.4.27. TCCommand.......................................................................................................................................... 86
7.4.28. TMError.................................................................................................................................................. 86
7.4.29. TCError.................................................................................................................................................. 87
7.4.30. UARTData.............................................................................................................................................. 87
7.5. Telemetry....................................................................................................................................................... 87
7.6. Telecommands ............................................................................................................................................. 87
7.7. ECSS standard service ................................................................................................................................ 87
7.7.1. PUS-1 Telecommand verification service ................................................................................................ 87
7.7.2. PUS-2 Device Command Distribution Service......................................................................................... 88
7.8. Limitations .................................................................................................................................................... 88
8. SYSTEM-ON-CHIP DEFINITIONS...................................................................................89
8.1. Memory mapping.......................................................................................................................................... 89
8.2. Interrupt sources.......................................................................................................................................... 90
8.3. SCET timestamp trigger sources................................................................................................................ 90
8.4. Boot images and boot procedure................................................................................................................ 91
8.4.1. Description............................................................................................................................................... 91
8.4.2. Block diagram .......................................................................................................................................... 91
8.4.3. Usage description .................................................................................................................................... 91
8.4.4. Limitations................................................................................................................................................ 92
8.5. Reset behaviour............................................................................................................................................ 92
8.6. Pulse command inputs ................................................................................................................................ 92
8.7. SoC information map ................................................................................................................................... 92
9. CONNECTOR INTERFACES...........................................................................................94
9.1. RESET, Reset pushbutton........................................................................................................................... 94
9.2. JTAG-RTL, FPGA-JTAG connector............................................................................................................. 94
9.3. DEBUG-SW.................................................................................................................................................... 95
9.4. SPW1 - Spacewire......................................................................................................................................... 95
9.5. SPW2 - Spacewire......................................................................................................................................... 96
9.6. ANALOGS, Analog input and 4xGPIO (OBC-S).......................................................................................... 96
9.7. DIGITALS, 3x I2C, PPS and 12xGPIO.......................................................................................................... 97
9.8. COM02_RS4XX, 3xRS422/485...................................................................................................................... 98
9.9. COM35_RS4XX, RS422/485 (OBC-S)........................................................................................................... 98
9.10. CCSDS RS422, S-BAND TRX (TCM-S) ...................................................................................................... 99
9.11. CCSDS LVDS, RS422, X-BAND TRX (TCM-S)......................................................................................... 100
9.13. UMBI –Baseband Umbilical (TCM-S)...................................................................................................... 101
9.14. Pulse Command Outputs......................................................................................................................... 102