Acces I/O products 104-AIO16A User manual

10623 Roselle Street, San Diego, CA 92121  [phone]  Fax [phone]
[email protected]  www.accesio.com
104-AIO16A and 104-AIO16E
PC/104 HIGH-PERFORMANCE ANALOG
I/O BOARDs
USER MANUAL
M104-AIO16A.A1k

Manual 104-AIO16A and 104-AIO16E
2
Notice
The information in this document is provided for reference only. ACCES does not assume any liability
arising out of the application or use of the information or products described herein. This document may
contain or reference information and products protected by copyrights or patents and does not convey
any license under the patent rights of ACCES, nor the rights of others.
IBM PC, PC/XT, and PC/AT are registered trademarks of the International Business Machines
Corporation.
Printed in USA. Copyright 2008 by ACCES I/O Products, Inc. 10623 Roselle Street, San Diego, CA
92121. All rights reserved.
WARNING!!
ALWAYS CONNECT AND DISCONNECT YOUR FIELD CABLING WITH
THE COMPUTER POWER OFF. ALWAYS TURN COMPUTER POWER
OFF BEFORE INSTALLING A BOARD. CONNECTING AND
DISCONNECTING CABLES, OR INSTALLING BOARDS INTO A
SYSTEM WITH THE COMPUTER OR FIELD POWER ON MAY CAUSE
DAMAGE TO THE I/O BOARD AND WILL VOID ALL WARRANTIES,
IMPLIED OR EXPRESSED.

Manual 104-AIO16A and 104-AIO16E
3
Warranty
Prior to shipment, ACCES equipment is thoroughly inspected and tested to applicable specifications.
However, should equipment failure occur, ACCES assures its customers that prompt service and support
will be available. All equipment originally manufactured by ACCES which is found to be defective will be
repaired or replaced subject to the following considerations.
Terms and Conditions
If a unit is suspected of failure, contact ACCES' Customer Service department. Be prepared to give the
unit model number, serial number, and a description of the failure symptom(s). We may suggest some
simple tests to confirm the failure. We will assign a Return Material Authorization (RMA) number which
must appear on the outer label of the return package. All units/components should be properly packed for
handling and returned with freight prepaid to the ACCES designated Service Center, and will be returned
to the customer's/user's site freight prepaid and invoiced.
Coverage
First Three Years: Returned unit/part will be repaired and/or replaced at ACCES option with no charge for
labor or parts not excluded by warranty. Warranty commences with equipment shipment.
Following Years: Throughout your equipment's lifetime, ACCES stands ready to provide on-site or in-plant
service at reasonable rates similar to those of other manufacturers in the industry.
Equipment Not Manufactured by ACCES
Equipment provided but not manufactured by ACCES is warranted and will be repaired according to the
terms and conditions of the respective equipment manufacturer's warranty.
General
Under this Warranty, liability of ACCES is limited to replacing, repairing or issuing credit (at ACCES
discretion) for any products which are proved to be defective during the warranty period. In no case is
ACCES liable for consequential or special damage arriving from use or misuse of our product. The
customer is responsible for all charges caused by modifications or additions to ACCES equipment not
approved in writing by ACCES or, if in ACCES opinion the equipment has been subjected to abnormal
use. "Abnormal use" for purposes of this warranty is defined as any use to which the equipment is
exposed other than that use specified or intended as evidenced by purchase or sales representation.
Other than the above, no other warranty, expressed or implied, shall apply to any and all such equipment
furnished or sold by ACCES.
Ordering Guide
•104-AIO16A - Full featured version with 16-Bit 500kHz A/D
•104-AIO16E - Economy version with 16-Bit 250kHz A/D
Optional accessories
•104-STA-16A In-stack Screw Terminal Board with interconnecting ribbon cables (2)
•104-SPC-KIT Spacer kit (16-bit PC/104 pass-through connector and hardware kit)
•104-HDW-KIT(X) Mounting hardware kit (X=M (Metric) or S (Standard))
•104-BP2 Dual PC/104 backplane
•Ribbon cables and a variety of terminal connection accessories are also available

Manual 104-AIO16A and 104-AIO16E
4
TABLE OF CONTENTS
Ordering Guide ..........................................................................................................................3
Optional accessories................................................................................................................. 3
Chapter 1: Introduction...................................................................................... 5
Features ......................................................................................................................................5
Functional Description..............................................................................................................5
Figure 1-1: Block Diagram...................................................................................................... 6
Analog Inputs.............................................................................................................................6
Table 1-1: Analog Input Range Selection...............................................................................7
A/D Start......................................................................................................................................7
Oversample ................................................................................................................................7
Calibration ..................................................................................................................................7
A/D FIFO......................................................................................................................................8
Interrupt Request (IRQ) .............................................................................................................8
Analog Outputs (DAC)............................................................................................................... 8
Digital I/O ....................................................................................................................................8
Counter/Timer ............................................................................................................................8
Model Options........................................................................................................................ 9
Included with your board...................................................................................................... 9
Chapter 2: Installation...................................................................................... 10
Software CD Installation ......................................................................................................... 10
To Install the Board............................................................................................................. 11
Figure 2-1: PC/104 Key Information.....................................................................................11
Chapter 3: Option Selection ............................................................................ 12
Figure 3-1: Option Selection Map......................................................................................... 12
Setting the Base Address .......................................................................................................13
Table 3-1: Base Address Jumper Configuration...................................................................13
Chapter 4: Base Address Selection................................................................ 14
Table 4-1: Hex Conversion ...................................................................................................14
Chapter 5: Programming ................................................................................. 15
Table 5-1: Register Definitions .............................................................................................15
Writing to the EEPROM ........................................................................................................... 21
Reading from the EEPROM..................................................................................................... 22
Chapter 6: Connector Pin Assignments......................................................... 25
Table 6-1: P1, 26-pin Right-Angle Header, Analog Inputs, Analog Outputs ........................25
Table 6-2: P2, 44-pin Right-Angle Header, Digital I/O & Counter/Timers ............................26
Table 6-3: P3, 8-pin Right-Angle Header, External Power................................................... 26
Chapter 7: Specifications ................................................................................ 27
Analog Inputs...........................................................................................................................27
Digital I/O ..................................................................................................................................27
Environmental..........................................................................................................................27
Appendix A: 82C54 Counter Timer Operation ............................................... 28
Operational Modes ..................................................................................................................28
Programming............................................................................................................................29
Reading and Loading the Counters.......................................................................................30
Appendix B: Calibration .................................................................................. 32
Breakdown: Calibrating the DACs .........................................................................................33
Step-By-Step: Calibrating the DACs...................................................................................... 34
Breakdown: Calibrating the A/D.............................................................................................35
Step-By-Step: Calibrating the A/D..........................................................................................36
Table B-1: Factory EEPROM Calibration Locations............................................................. 38
Customer Comments ....................................................................................... 39

Manual 104-AIO16A and 104-AIO16E
5
Chapter 1: Introduction
This PC/104 based Data Acquisition Module is an ideal solution for embedded applications requiring high-
resolution and high-speed analog input, analog output, and digital I/O capabilities. This manual applies to
both the “16A” version and the “16E” version, with the primary difference being the achievable sampling
speed. Wherever a reference is made to a sampling frequency or clock frequency, 500k applies only to
the “16A” version, while 250k applies only to the “16E” version.
Features
z16-bit resolution A/D
zSampling rate
“16A” version: 500ksamples/sec (maximum aggregate)
“16E” version: 250ksamples/sec (maximum aggregate)
z16 single-ended or 8 differential analog inputs
zChannel-by-channel ranges of 0-1V, 0-2V, 0-5V, 0-10V, ±1V, ±2V, ±5V, ±10V
zA/D Start sources: Software, Timer, and External Trigger (rising or falling edge; software
selectable)
zA/D Modes: Single Channel or Scan
zOffset / Gain Error Calibration
zNoise reduction with Channel Oversampling
zOver-voltage protection of -40V to +55V
zFirst In First Out (FIFO) A/D buffer
zTwo 12-bit Digital-to-Analog (DAC) outputs
zDAC error calibration
z16 high-current Digital I/O lines
z16-bit programmable counter/timer
zPC/104 module size and mounting compatibility
Applications
zEquipment monitoring
zEnvironmental measurements
zEmbedded data acquisition
zEducation/Laboratory
Functional Description
This product is a PC/104-based Analog to Digital converter board with 16 single-ended or 8 differential
analog inputs. The board is capable of sampling speeds up to 500kHz. Analog input channels are
enabled as a consecutive set by software. Each channel within the set is independently configured by
jumpers+software to accept one of ten different analog input ranges.
Analog to digital conversion starts or “A/D starts” are issued one of three ways: Software Start, Timer
Start, or External Trigger Start. A/D starts are software configured to be either rising or falling edge.
Additionally, A/D starts are software configured to be Single Channel or Scan. Single Channel samples
data once from the next consecutive channel within the enabled set. A Scan samples data from all
channels within the set at the fastest possible rate. An onboard FIFO allows the analog data to be
buffered and read out at a later time. The FIFO has two flags, FIFO half-full and FIFO full, which can both
trigger an IRQ.
Two 12-bit DAC outputs are provided. Output ranges of 0-5V and 0-10V are field selectable with jumpers,
per output.
Also provided are 16 Digital I/O lines in 2 groups of 8 lines. Both Digital I/O bytes are individually
software selectable as input or output.

Manual 104-AIO16A and 104-AIO16E
6
A fully programmable 8254 16-bit counter is provided with a maximum input frequency of 10MHz. The
clock and output can be accessed externally for extended functionality.
16 S.E./
8 DIFF'L
A/D DATA FIFO
STATUS
REGISTER
MUX INCREMENT
& CONTROL LOGIC
MUX
VREF
16 S.E.
OR
8 DIFF'L
A
NALO
G
INPUTS
DATA
BUFFERS
ADDRESS
DECODE
SELECT
&
CONTROL
REGISTERS
INTERRUPT
CONTROL
A/D
TRIGGER
SELECT
LOGIC
{
P
C
1
0
4
B
U
S
A/D START
CH0 HI
CH0 LO
CH15
16
BIT
CTR
0
16
BIT
CTR
1
16
BIT
CTR
2
CTR2
OUT
DUAL 12
BIT DAC
DAC A
DAC B
SIGNAL COND.
INCL CAL ADJ
SIGNAL COND.
INCL CAL ADJ
CONTAINED
IN CPLD
16 BITS
DIGITAL
(2x8-BITS)
INPUT
OUTPUT
{
16 BITS
SIGNAL COND.
INCL CAL ADJ
EEPROM
(CAL D ATA)
CTR0
OUT
INTERNAL DATA BUS
10 MHz
16 BIT A/D CONVERTER
(500 KSamples/Second)
CTR0
INPUT
CONTAINED IN 8254
Figure 1-1: Block Diagram
Analog Inputs
There are a total of 16 single-ended or 8 differential analog inputs on this board. A consecutive set of
channels are enabled/disabled by software. This set of channels is constructed by a start and end
channel. Sampling begins on the start channel and continues through every successive channel until the
end channel is sampled. Once the end channel has been sampled, the process repeats again from the
start channel. All channels within the set are jumper configured as either single-ended or differential.
10 input ranges, 6 bipolar and 4 unipolar, are selectable by jumpers+software. Each jumper configuration
allows four voltage ranges to be configured by software for each individual channel (Table 1-1). The
unipolar ranges are 0-1V, 0-2V, 0-5V, and 0-10V. The bipolar ranges are ±0.5V, ±1, ±2V, ±2.5V, ±5V,
and ±10V. Refer to the option selection map for jumper range settings.
Each channel input has an over-voltage protection of -40V to +55V.

Manual 104-AIO16A and 104-AIO16E
7
Table 1-1: Analog Input Range Selection
Jumpers SoftwareGain=0 SoftwareGain=1 SoftwareGain=2 SoftwareGain=3
Unipolar 0 - 10V 0 - 5V 0 - 2V 0 - 1V
GNH
Bipolar ± 5V ± 2.5V ± 1V ± 0.5
GNL Bipolar ± 10V ± 5V ± 2V ± 1V
A/D Start
This board offers three software selectable sources for A/D Start: Software Start, Timer Start, and
External Start Trigger. Software Start generates an A/D Start every time the software command is
issued. Timer Start uses the on-board timer to generate an A/D Start. Frequencies ranging from 2.33 *
10-3Hz to 500kHz are possible with Timer Start. External Start Trigger uses the External Trigger pin on
the connector to generate an A/D Start. Frequencies up to 500kHz are allowed for External Start Trigger.
A/D Start is also software configured as rising or falling edge.
An A/D Start can be one of two software selectable types for this board: Single Channel or Scan. A/D
Starts that are Single Channel sample one channel within the enabled set per A/D Start. This allows for
total control over the time skew between channels.
Scan, on the other hand, will sample all the channels within the enabled set per A/D Start. Channels are
sampled at 500kHz to minimize the time skew between channels.
Oversample
To minimize noise, the board implements a technique called Oversampling. Oversampling is a technique
which continuously samples a channel multiple times at 500kHz. Quickly taking several samples from the
same channel allows the signal to be averaged. Averaging a signal can greatly reduce the noise injected
by both the signal and the board/system.
The oversample range is from 0 to 255 (software selectable) and applies to every channel within the
enabled set. A channel is always sampled once plus the number of oversamples that was configured.
Therefore an oversample of 0 will sample a channel once (initial sample plus 0 oversamples), oversample
of 1 will sample a channel twice (initial sample plus 1 oversample), up to an oversample of 255 which will
sample a channel 256 times (initial sample plus 255 oversamples).
Each channel's oversamples are taken before sampling begins on the next consecutive channel within
the enabled set.
Calibration
All Analog-to-Digital Converters (ADCs) suffer from offset and gain errors. To account for this, the board
implements calibration hardware to adjust for the offset/gain errors. This is particularly helpful as aging
occurs and/or operating temperature changes.
The gain and offset are individually adjusted by means of digital potentiometers. Constants are loaded
into the potentiometers which are used to make these adjustments. If constants are not loaded, the
potentiometers will be set to the center of their ranges by default. Therefore, for maximum accuracy,
appropriate constants should be loaded each time the board is powered. Refer to Chapter 5:
Programming and Appendix B: Calibration for information on how to determine and load appropriate
constants.

Manual 104-AIO16A and 104-AIO16E
8
A/D FIFO
The A/D FIFO buffers the data out of the ADC. This allows conversions to happen without constant CPU
intervention. Furthermore, the FIFO's half-full and full flags are readable by software. They can also be
used to generate interrupts. If the FIFO becomes full, A/D conversions are paused and resume when at
least one A/D sample is read out of the FIFO.
Interrupt Request (IRQ)
This board can be software enabled to generate an IRQ when the A/D FIFO becomes half-full or full. An
IRQ can also be generated after the end of a conversion (EOC) or after the end of a scan (EOS). These
IRQs help in taking A/D data off the board quickly.
The selection of the IRQ to be used is made by selecting one of the IRQ jumpers on the board. The
location of these jumpers is shown in the Option Selection Map.
Place a jumper on the posts corresponding to the IRQ you wish to select. If you do not intend on using
IRQs, do not install a jumper on any IRQ pins.
Analog Outputs (DAC)
There are two analog outputs on this board. Each analog output is adjusted by output calibration circuitry
including a digital potentiometer. The DACs have two output ranges of 0-5V or 0-10V. These are
individually chosen through jumper selections on the board. Refer to the option selection map for the
jumper selections. Please note that the DACs are labeled DAC A and DAC B on the PC board but
typically referred to as DAC 0 and DAC 1 in the manual. These terms are interchangeable as DAC 0 is
the same as DAC A, DAC 1 the same as DAC B.
The digital calibration potentiometers are serial devices, with data being entered bit by bit. Although the
details of writing bit by bit are described in Appendix B, it is expected that data will be loaded using a
software subroutine. Make sure that the correct calibration constants are loaded into the digital
potentiometers before using the analog outputs. Refer to Appendix B for calibrating the DACs.
Lastly, the DACs have a mode of operation called simultaneous update that will update both DACs
simultaneously after DAC1 has been written to. Otherwise, each DAC will update upon being written to.
Refer to Chapter 5: Programming for configuration details.
Digital I/O
This board contains an 8255 like Programmable Peripheral Interface (PPI). There are 2 ports, A and B,
available for Digital I/O. Both the low byte (port A) and high byte (port B) can be individually software
configured as inputs or outputs. In output mode, each port supports readback of the last written values.
Each DIO line is capable of sourcing 24mA or sinking 24mA. By default the DIO lines are pulled up with a
10kresistor to 5V.
Counter/Timer
The highly versatile 8254 contains three counter/timers. Counter/Timer 0 is available for general purpose
use. Counter/Timer 1&2 are dedicated for use in timing A/D starts. The output of Counter/Timer 2 is
available on the P2 connector.
Counter/Timer 0’s clock and output signals are brought out to the connector. Both signals are buffered
and capable of sourcing 24mA or sinking 24mA. Counter/Timer 0’s clock is pulled up with a 10K
resistor to 5V.
Counter/Timer 0’s clock input is software selectable between an internal 10MHz clock and the external
Counter/Timer 0 clock on the P2 connector. The maximum allowed frequency for the clock is 10MHz.

Manual 104-AIO16A and 104-AIO16E
9
Model Options
•-DC Onboard DC/DC converter enables operation from a single +5V power supply
•-T Extended Temperature Operation (-40° to +85°C)
•-FIFOx “x” = FIFO sample capacity
o2K, 4K (1K is standard size)
•-S0x Special number designator, application specific, contact factory
oExamples: latching I/O connectors; configuration jumpers factory set
Included with your board
The following items are included with your shipment. Please take time now to ensure that no items are
damaged or missing.
1. PC/104 Analog and Digital I/O Module
2. Software Master CD (PDF user manual installed with product package)
3. Printed I/O Quick-Start Guide

Manual 104-AIO16A and 104-AIO16E
10
Chapter 2: Installation
You may wish to refer to the printed I/O Quick Start Guide which was included with your product
shipment for specific, quick steps to complete the hardware and software installation.
Software CD Installation
The software provided with this board is contained on one CD and must be installed onto your
hard disk prior to use. To do this, perform the following steps as appropriate for your operating
system. Substitute the appropriate drive letter for your drive where you see D: in the examples
below.
WIN98/Me/2000/XP/2003
a. Place the CD into your CD-ROM drive.
b. The CD should automatically run the install program. If the install program does not run,
click START | RUN and type BGLQR?JJ, click OK or press -
c. Follow the on-screen prompts to install the software for this board.
LINUX
a. Please refer to linux.htm on the CD-ROM for information on installing under linux.
Hardware Installation
Install the software package and set all hardware configuration jumpers (refer to Chapter 3, Option
Selection) before plugging the hardware into the system. The SETUP Program can also be used to assist
in configuring jumpers on the board. Be especially careful with Address Selection. If the addresses of two
installed functions overlap, you will experience unpredictable computer behavior. To help avoid this
problem, refer to the FINDBASE.EXE program installed from the CD. The setup program does not set the
options on the board, these must be set by jumpers.
Caution! * ESD A single static discharge can damage your card and cause premature
failure! Please follow all reasonable precautions to prevent a static
discharge such as grounding yourself by touching any grounded
surface prior to touching the card.

Manual 104-AIO16A and 104-AIO16E
11
To Install the Board
1. Install jumpers for selected options and base address according to your application
requirements, as mentioned above.
2. Remove power from the PC/104 stack.
3. Assemble standoff hardware for stacking and securing the boards.
4. Carefully plug the board onto the PC/104 connector on the CPU or onto the stack,
ensuring proper alignment of the pins before completely seating the connectors together.
5. Install I/O cables onto the board’s I/O connectors and proceed to secure the stack
together or repeat steps 3-5 until all boards are installed using the selected mounting
hardware.
6. Check that all connections in your system are correct and secure then power up the
system.
7. Run one of the provided sample programs appropriate for your operating system that was
installed from the CD to test and validate your installation.
Figure 2-1: PC/104 Key Information

Manual 104-AIO16A and 104-AIO16E
12
Chapter 3: Option Selection
Jumpers are available on the board to configure the following:
Base address, IRQ and +/-12V source selection
DAC output voltage ranges
A/D input mode (single ended or differential), range and bipolar / unipolar selections
Software can determine the jumper selections by reading the status register at Base Address +12 (see
Chapter 5: Programming for more information).
Please refer to the Setup Program on the Software Master CD for additional details of selecting the
appropriate options for your application. The standard board has a Counter/Timer, two 12-bit DAC
Channels, 16 Bits of Digital I/O, and a 16 channel 16-bit A/D Converter with a 1k sample FIFO. There is
an optional version of the board that provides an onboard DC/DC converter. If your PC/104 stack has +5V
and +/-12V available, a DC/DC converter is not needed.
IRQ9
IRQ10
IRQ11
IRQ12
IRQ14
IRQ15
IRQ7
IRQ6
IRQ5
IRQ4
IRQ3
BIPOLAR UNIPOLAR
GNH GNL
DIFF
S.E.
0-10V
0-5V
DAC B
DAC A
A5 A6 A7 A8 A9
P2
Pin 1
P1
Pin 1
P3
DC/DC Option 104 Bus EXT-P3
±12V SOURCE SELECT
Figure 3-1: Option Selection Map
The board can take ±12V power from the PC/104 bus, an external source, or an optional DC/DC
converter. If the DC/DC converter is installed on the board, the two jumpers next to P3 should not be
installed, and their posts may be missing. If no DC/DC converter is present, the jumpers should be
installed in their right positions to take ±12V power from the PC/104 bus, or the left positions (toward the
edge of the board) to take ±12V power from an external source, provided via P3.

Manual 104-AIO16A and 104-AIO16E
13
Setting the Base Address
The following table provides a convenient reference for all address jumper configurations. “YES” indicates
the jumper is installed.
A9 A8 A7 A6 A5 Address Range
YES YES YES YES 100h - 11Bh
YES YES YES 120h - 13Bh
YES YES YES 140h - 15Bh
YES YES 160h - 17Bh
YES YES YES 180h - 19Bh
YES YES 1A0h - 1BBh
YES YES 1C0h - 1DBh
YES 1E0h - 1FBh
YES YES YES YES 200h - 21Bh
YES YES YES 220h - 23Bh
YES YES YES 240h - 25Bh
YES YES 260h - 27Bh
YES YES YES 280h - 29Bh
YES YES 2A0h - 2BBh
YES YES 2C0h - 2DBh
YES 2E0h - 2FBh
YES YES YES 300h - 31Bh
YES YES 320h - 33Bh
YES YES 340h - 35Bh
YES 360h - 37Bh
YES YES 380h - 39Bh
YES 3A0h - 3BBh
YES 3C0h - 3DBh
3E0h - 3FBh
Table 3-1: Base Address Jumper Configuration

Manual 104-AIO16A and 104-AIO16E
14
Chapter 4: Base Address Selection
The Board’s Base Address is set by jumpers labeled “BOARD ADDR.” The jumpers are marked /A5
through /A9, and /A5 is the least significant bit of the address. The base address can be selected
anywhere within the I/O address range 000-3E0 provided that they do not overlap with other functions.
The FINDBASE software utility provided on the CD with your board will help you select a base address
that does not conflict with other assignments.
This board requires a block of 27 addresses (1B hex). Address Setup Jumper locations are marked /A5
through /A9. In order to configure the desired address, the hexadecimal address must be converted to a
binary representation, which is then selected by installing jumpers on the board.
For example, as illustrated below, switch selection corresponds to hex 2C0 (or binary 10 110x xxxx).
The "xxxxx" represents address lines A4 through A0 used on the board to select individual registers as
described in Chapter 5: Programming.
Hex Representation 2 C
Conversion Factors 2 1 8 4 2
Binary Representation 1 0 1 1 0
Jumper Installed NO YES NO NO YES
Jumper Label A9 A8 A7 A6 A5
Table 4-1: Hex Conversion
Please note that "1" means that no jumper is installed and that "0" means that a jumper must be installed.
Consult the documentation for your system before selecting the board address. If you have doubts
concerning available addresses in your particular computer, use the FINDBASE utility provided to
determine available addresses.
Some embedded CPU boards mask out legacy I/O space and IRQ availability in CMOS. If you are
having difficulty accessing this hardware using one of the installed sample programs, enter the CMOS to
verify peripheral and I/O settings.

Manual 104-AIO16A and 104-AIO16E
15
Chapter 5: Programming
A/D Order of Operations: Behavior may become unpredictable if these steps are not followed.
This is a guide of steps to take before beginning an A/D conversion.
1) Configure the channel gains (Base Address + 2-5).
2) Configure the start and end channel (Base Address + 6).
3) Configure the number of oversamples per channel (Base Address + 7).
4) Configure Counter/Timer 1&2 if using Timer Start or External Start Trigger (Base Address + 8- B).
If using External Start Trigger, connect the trigger source to P2 pin 39.
5) Configure the A/D Start Source as Software Start, Timer Start, or External Start Trigger. Configure
A/D Start as rising or falling edge. Configure A/D Start as Single Channel or Scan. (Base Address + 11).
Once this address is written to, A/D conversions will be enabled if the A/D Start Source is either Timer
Start or External Start Trigger. If the A/D Start Source is Software Start, conversions will begin after a
write to Base Address + 1.
6) Read A/D data from the A/D Data FIFO with a read from Base Address + 0-1. It is helpful to use the
flags in Base Address + 12 and the IRQ flags in Base Address + 13 when deciding to read A/D data.
Offset Write Function Read Function
0
1 A/D Software Start A/D Data
2
3
4
5
A/D Programmable Gain
Configuration
6 A/D Start/End Ch Configuration
7 A/D Oversample Configuration
8
9
A
B
Counter/Timer Configuration Counter/Timer Configuration
C
D DAC 0 Output Data
E
F DAC 1 Output Data
10 DAC Configuration
11 A/D Start & Counter/Timer 0
Clock Configuration
12 A/D, DAC, FIFO Status Flags
13 IRQ Configuration IRQ Status
14 Port A DIO (8255) Port A DIO (8255)
15 Port B DIO (8255) Port B DIO (8255)
16
17 DIO Configuration (8255)
18 EEPROM access EEPROM access
19 Calibration access
1A
1B Reset Register
1C-1E
1F Board Model
Table 5-1: Register Definitions

Manual 104-AIO16A and 104-AIO16E
16
NOTE: Reading and writing words (16 bits) may only be done on even address boundaries (ie: Base
Address + 0, + 2, etc). Reading and writing bytes (8 bits) can be done on even or odd boundaries.
Base Address + 0-1 (read) A/D Data
Base Address +0
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
ad7 ad6 ad5 ad4 ad3 ad2 ad1 ad0
Base Address +1
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
ad15 ad14 ad13 ad12 ad11 ad10 ad9 ad8
ad15-ad0 -> A/D data
Reading a word from Base Address + 0 or two consecutive byte reads, first Base Address + 0 and then
Base Address + 1, will grab one conversion’s data from the A/D FIFO. If issuing two byte reads, it is
important to know that the A/D FIFO increments to the next conversion’s data only after the byte read
from Base Address + 1. The byte read from Base Address + 0 must be done before the byte read from
Base Address + 1 or the lower data byte will be lost.
Base Address + 1 (write) A/D Software Start
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Software start
Writing any value to this address will begin one A/D Start.
Base Address + 2-5 (write) A/D Programmable Gain Configuration
Base Address +2
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Ch3 SoftwareGain Ch2 SoftwareGain Ch1 SoftwareGain Ch0 SoftwareGain
Base Address +3
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Ch7 SoftwareGain Ch6 SoftwareGain Ch5 SoftwareGain Ch4 SoftwareGain
Base Address +4
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Ch11 SoftwareGain Ch10 SoftwareGain Ch9 SoftwareGain Ch8 SoftwareGain
Base Address +5
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Ch15 SoftwareGain Ch14 SoftwareGain Ch13 SoftwareGain Ch12 SoftwareGain
softwareGain = "00" = 0
softwareGain = "01" = 1
softwareGain = "10" = 2
softwareGain = "11" = 3

Manual 104-AIO16A and 104-AIO16E
17
Writing to these addresses will set the Software Gain per channel (see Table 1-1: Analog Input Range
Selection)
Base Address + 6 (write) A/D Start/End Channel Configuration
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
end3 end2 end1 end0 start3 start2 start1 start0
start3-start0 -> A/D start channel (0-15)
end3-end0 -> A/D end channel (0-15)
Writing to this address will set the start and end address of the enabled set of channels.
Base Address + 7 (write) A/D Oversample Configuration
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
overSamp7 overSamp6 overSamp5 overSamp4 overSamp3 overSamp2 overSamp1 overSamp0
overSamp7-overSamp0 -> Channel Oversample (0-255)
Writing to this address will set the number of oversamples to take per channel.
Base Address + 8-B Counter/Timer Configuration
Counter/Timer 0 is fully programmable for general use. Counter/Timer 1&2 are concatenated together
(output of Counter/Timer 1 is routed to the clock input of Counter/Timer 2). The concatenated
Counter/Timer 1&2 are used for A/D Start: both Timer Start and External Start Trigger. The output of
Counter/Timer 2 is the source for the aforementioned A/D Starts. The output of Counter/Timer 2 is
available on Pin 43 of connector P2.
For detailed information on programming the 8254 Counter/Timer device, please refer to Appendix A.
Base Address + C-D (write) DAC 0 Output Data
Base Address + C
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
da7 da6 da5 da4 da3 da2 da1 da0
Base Address + D
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
X X X X da11 da10 da9 da8
da11-da0 -> DAC 0 data
Writing a 12-bit value to this address will output the corresponding voltage on DAC 0 (refer the Option
Selection map for output voltage range). If the DAC simultaneous bit (Base Address + 10, bit 1) is set,
then DAC 0’s output will update after writing to DAC 1.

Manual 104-AIO16A and 104-AIO16E
18
Base Address + E-F (write) DAC 1 Output Data
Base Address + E
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
da7 da6 da5 da4 Da3 da2 da1 da0
Base Address + F
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
X X X X da11 da10 da9 da8
da11-da0 -> DAC 1 data
Writing a 12-bit value to this address will output the corresponding voltage on DAC 1 (refer the Option
Selection map for output voltage range).
Base Address + 10 (write) DAC Configuration
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
X X X X X X X simultaneous
simultaneous -> '0' = DACs update when written '1' = DACs update upon write to DAC 1
Writing a ‘1’ to Bit 0 will set the DAC simultaneous bit. This causes both DACs to be updated on a write
to DAC 1.
Base Address + 11 (write) A/D Start & Counter/Timer 0 Clock Configuration
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
X X X clkSrc startEdge startType startSource1 startSource0
Writing to this address will configure the A/D Start Source, A/D Start Type, A/D Start as rising or falling
edge, and Counter/Timer 0’s clock source. Below are the different configuration bit patterns:
A/D Start Source
•Software ÆstartSource0 = ‘0’; startSource1 = ‘0’
•Timer ÆstartSource0 = ‘1’; startSource1 = ‘0’
•External ÆstartSource0 = ‘0’; startSource1 = ‘1’
A/D Start Type
•Single Channel ÆstartType = ‘0’
•Scan ÆstartType = ‘1’
A/D Start Edge
•Rising ÆstartEdge = ‘0’
•Falling ÆstartEdge = ‘1’
Counter/Timer0 Clock
•Internal 10MHz ÆclkSrc = ‘0’
•External Pin ÆclkSrc = ‘1’

Manual 104-AIO16A and 104-AIO16E
19
Base Address + 12 (read) A/D, DAC, FIFO Status Flags
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
fifoFull halfFull empty dac1 dac0 gainMode single-ended bipolar
Reading from this address will show the status of the following flags:
bipolar Æ‘0’ = jumpers set to unipolar ‘1’ = jumpers set to bipolar
single-ended Æ‘0’ = jumpers set to differential ‘1’ = jumpers set to single-ended
gainMode Æ‘0’ = jumpers set to GNL ‘1’ = jumpers set to GNH
dac0 Æ‘0’ = DAC 0 has 0-10V range ‘1’ = DAC 0 has 0-5V range
dac1 Æ‘0’ = DAC 1 has 0-10V range ‘1’ = DAC 1 has 0-5V range
empty Æ‘0’ = A/D Data FIFO is empty ‘1’ = A/D Data FIFO is not empty
halfFull Æ‘0’ = A/D FIFO is at least half full‘1’ = A/D FIFO is not at least half full
fifoFull Æ‘0’ = A/D Data FIFO is full ‘1’ = A/D Data FIFO is not full
Base Address + 13 (read/write) IRQ Configuration and Status
Base Address + 13 write
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
X X X X fullIrqEn halfFullIrqEn eosIrqEn eocIrqEn
Writing to this address will configure the IRQs for End of Conversion (EOC), End of Scan (EOS), A/D
Data FIFO at least half full, and A/D Data FIFO full. Below are the IRQ enable bit patterns:
eocIrqEn Æ‘0’ = disable the EOC IRQ ‘1’ = enable the EOC IRQ
eosIrqEn Æ‘0’ = disable the EOS IRQ ‘1’ = enable the EOS IRQ
halfFullIrqEn Æ‘0’ = disable the A/D Data FIFO ‘1’ = enable the A/D Data FIFO
is at least half full IRQ is at least half full IRQ
fullIrqEn Æ‘0’ = disable the A/D Data FIFO ‘1’ = enable the A/D Data FIFO
full IRQ full IRQ
Base Address + 13 read
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
fullIrq halfFullIrq eosIrq eocIrq X X X X
Once any of the above IRQ enables are set to ‘1’, the corresponding condition will cause an IRQ to be
generated. All four enables can be set at the same time. A read of this address allows the ability to see
which IRQ flag generated the IRQ. Below are the IRQ flags:
eocIrq Æ‘0’ = no EOC IRQ occurred ‘1’ = EOC IRQ occurred
eosIrq Æ‘0’ = no EOS IRQ occurred ‘1’ = EOS IRQ occurred
halfFullIrq Æ‘0’ = no A/D FIFO is at least ‘1’ = A/D FIFO is at least
half full IRQ occurred half full IRQ occurred
fullIrq Æ‘0’ = no FIFO full IRQ occurred ‘1’ = FIFO full IRQ occurred
Reading this address also clears any of the IRQ flags that are set.

Manual 104-AIO16A and 104-AIO16E
20
Base Address + 14 (read/write) Port A DIO (8255)
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
a7 a6 a5 a4 a3 a2 a1 a0
a7-a0 -> Port A data
Reading from this address will return the digital data on Port A. Writing to this address will output the
digital data on Port A. Readback is supported while in the output mode. Be sure to refer to Base Address
+ 17 for controlling Port A’s input/output direction.
Base Address + 15 (read/write) Port B DIO (8255)
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
b7 b6 b5 b4 b3 b2 b1 b0
b7-b0 -> Port B data
Reading from this address will return the digital data on Port B. Writing to this address will output the
digital data on Port B. Readback is supported while in the output mode. Be sure to refer to Base Address
+ 17 for controlling Port B’s input/output direction.
Base Address + 16 Unused
Base Address + 17 (write) DIO Configuration (8255)
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
modeSetFlag X X PortADir X X portBDir X
Writing to this address configures the input/output direction for Ports A and B. A ‘1’ must always be
written to bit 7 when configuring. Below are the Port direction bits:
modeSetFlag Æ‘0’ = configuration not enabled ‘1’ = configuration enabled
portADir Æ‘0’ = Port A is output ‘1’ = Port A is input (default)
portBDir Æ‘0’ = Port B is output ‘1’ = Port B is input (default)
Base Address + 18 (read/write) EEPROM access
Base Address + 18 read
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
data X X X X X X X
Base Address + 18 write
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
data X X X X X X SClk
The EEPROM is intended to hold calibration data for the A/D Gain and Offset correction, and the Gain
Correction data for both DACs. Calibration is only needed for GNL/GNH and BIP/UNI jumper selected
ranges, so a total of 4 A/D Input calibration data pairs are used. Consult the provided calibration program
or sample code for information on the locations in the EEPROM used to store the calibration data.
Although the EEPROM is intended to contain calibration data, it is unlikely your program will need to keep
calibration data for the ranges you are not going to use. In this case you can use those locations in the
EEPROM for your own purposes.