Acqiris U5309A User manual

Acqiris U5309A
Acquisition Card
2 or 8 channels, 8-bit, 500 MS/s to 2 GS/s,
DC to 500 GHz bandwidth, with real-time processing
User's Manual

2 U5309A User's Manual
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© Acqiris, 2017 - 2019
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and retrieval or translation into a foreign language) without prior agreement and written consent from
Acqiris SA as governed by international copyright laws.
Version
July 2019
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U5309A Acquisition Card User's Manual
U5309A User's Manual 3
U5309A Acquisition Card User's Manual
This help document is intended to provide in-depth information and reference material specific to your
ADC Card.
For information about installation and about getting started with your ADC Card, please refer to the
Startup Guide which can be downloaded from https://extranet.acqiris.com/ or which is installed with
your software.
Content
U5309A Acquisition Card User's Manual 3
Content 3
Introduction 5
Overview 5
Typical Applications 5
Key Features 5
Block diagrams 6
Main ADC Card Features 7
1.1 U5309A front panel features 8
1.2 Channel Input Specifications 9
1.3 Sampling and Data Acquisition 11
1.4 Trigger 12
1.5 Calibration 15
Real-Time Processing Options 17
2.1 Acquisition modes and specific features 17
2.2 Easy firmware switch 18
2.3 Digitizer firmware (DGT option) 19
2.4 Real-time averaging (AVG option) 22
2.5 Peak Detection (PKD) 30
Readout modes 34
3.1 Standard readout modes 34
3.2 Triggered simultaneous acquisition and readout (TSR) 35
3.3 Averager with triggered simultaneous acquisition and readout (AVG/TSR option) 39
Other Signal Processing Features 43
4.1 Sampling rate reduction (binary decimation) 44
Control and Synchronization 45
5.1 External clock and reference 46
5.2 Trigger modes and time-stamps 47

Content
4 U5309A User's Manual
5.3 Trigger output 51
5.4 Multi-purpose inputs and outputs 53
Programming Information 55
6.1 Overview of the AqMD3 Driver 55
6.2 Programming with the IVI-C Driver in various development environments 56
6.3 Migrating from MD2 2.x to MD3 3.x 58
6.4 Initial configuration 59
6.5 Apply setup 60
How To ... ? 61
7.1 How to discover the PXI Instrument? 62
7.2 How to calibrate the card? 63
7.3 How to configure and read data on two channels? 65
7.4 How to access repeated capabilities? 66
7.5 How to generate a software trigger? 67
7.6 How to perform time-interleaving acquisitions? 68
7.7 How to set the external trigger? 69
7.8 How to perform binary decimation? (depending on firmware) 70
7.9 How to perform partial readout? 71
7.10 How to load a new firmware? 74
7.11 How to optimize NSA settings? 75
7.12 How to switch from normal mode acquisition (Multi-record) to averager mode? 76
Software utilities 77
8.1 ADC card Verification Utility (AqMD3Verify) 77
FAQ 79
9.1 Q. What is coherent sampling? 79
9.2 Q. How to manage the internal temperature? 79
9.3 Q. What are the differences between the various data streaming firmware options supported
by high-speed ADC cards ? 80
9.4 Q. What happens if the host processor goes in hibernation mode? 81
General information 82
10.1 Safety notes 82
10.2 Cleaning precautions 84
10.3 Product markings 84
10.4 Electrical &environmental specifications 85
10.5 Related documentation 85
10.6 Full product family 86

Introduction
U5309A User's Manual 5
Introduction
Overview
Depending on the selected option, the U5309A signal acquisition card offers one, two, four or eight 8-
bits channels, with an analog bandwidth of DC to 500 MHz. Featuring a large DDR3 memory for long
acquisition time, the U5309A also includes a Xilinx Virtex-6 FPGA allowing implementation of custom
real-time processing algorithms.
Benefiting from the very high data transfer rates of the PCIe 2.0 eight-lane interface, and occupying a
single slot in a host PC, the U5309A offers high performance in a small footprint, making it an ideal
platform for many commercial, industrial and aerospace & defense embedded systems.
Typical Applications
Pulsed Radar
Analytical time-of-flight
LASER ranging / Emission monitoring
Ultrasonic imaging
Key Features
Sampling rate up to 2 GS/s
2 channels or 8 channels with 8-bit resolution and DC to 500 MHz analog bandwidth
Up to 2 GB of DDR3 on-board memory
Controlled by a Xilinx Virtex-6 FPGA with support for custom real-time processing

Block diagrams
6 U5309A User's Manual
Block diagrams
Figure 1.1 - U5309A -CH2 block diagram
Figure 1.2 - U5309A -CH8 block diagram
Most of the technical specifications concerning your particular ADC card are covered in this manual,
however for the complete specifications please refer to the U5309A datasheet.

1.1 U5309A front panel features
8 U5309A User's Manual
1.1 U5309A front panel features
Front panel connectors
Connector Type Description
TRGIN MMCX female
External trigger signal input, 50Ω
terminated.
Level range is ±5V.
IN 1 to IN 2 1
1 to 8 2SSMC male
Analog signal input.
DC-coupled and 50Ω terminated.
Maximum input voltage ±3.4 V DC (or ±5 V
DC)3.
JTAG Micro USB Providesconnection to the DPU for specific
reprogramming.
TRG OUT MMCX female Trigger Out signal.
User selectable from several functions.
I/O 1, 2, 3 MMCX female User configurable Input / Output signal.
3.3 V CMOS and TTLcompatible.
CLK IN MMCX female
External clock input.
AC coupled and 50 Ω terminated,
signal level: +5 to +15 dBm.
Please refer to datasheet for details.
REF IN MMCX female
External reference clock input,
AC coupled and 50 Ω terminated.
It can accept a 100MHzsignalfrom -3 to +3
dBm.
Note: It is recommended to first connect the SSMC end of the input cable and tighten using
thetorque wrench (U1092A-WCK) before connecting the SMA end, this minimizes strain on the
connector. A 1 m SSMC to SMA cable is available as an accessory (U1092A-CB3) A 1 m SSMC
to BNC cable is also available (U5300A-100).
Table 1.1 - List of U5309A front-panel IOs.
1For the 2 channels version (U5309A-CH2 option)
2For the 8 channels version (U5309A-CH8 option)
3For cards delivered after April 2015. The driver automatically adjusts offset accordingly.

1.2 Channel Input Specifications
U5309A User's Manual 9
1.2 Channel Input Specifications
This section provides information and specifications regarding the input characteristics of the ADC
card.
Channel Input
The U5309A offer several options for the number of channel input.
Model Input channel(s)
U5309A-CH1 1 channel available (IN 1)
U5309A-CH2 2 channels available (IN 1 and IN 2)
U5309A-CH4 4 channels available simultaneously
(1 or 2, 3 or 4, 5 or 6, and 7 or 8)
U5309A-CH8 8 channels available simultaneously (from 1 to 8)
Table 1.2 - List of the U5309A channel versions.
The U5309A has the following front end capabilities:
Model Impedance /
Coupling
Bandwidth (nom-
inal)
Full Scale Ranges
(FSR)
Absolute Max-
imum DC
Voltage
Offset Adjust-
ment Range
U5309A-F03**
DC 50 Ω
300 MHz
250 mV, 500 mV, 1 V,
2.5 V, and 5 V
±3.4 V
(or ±5 V DC)*
±0.6 FSR
U5309A-F05** 500 MHz
U5309A-F03-
LVR*** 300 MHz
50 mV to 1 V ±3.4 V
(or ±5 V DC)*
±0.5 FSR
U5309A-F05-
LVR*** 500 MHz
* For modules delivered after April 2015. The driver automatically adjusts offset accordingly.
** Standard Voltage Range
*** LVR: Low Voltage Range - Devices delivered after April 2015. For more information, please contact support@acqiris.com.
Table 1.3 - Front-end specifications of the channel input(s).
Impedance & Coupling
The input channel termination is 50Ω. The input coupling is DC.

1.2 Channel Input Specifications
10 U5309A User's Manual
Input Protection
The input amplifiers are designed to accept signals below the absolute maximum level shown in the
table.
Mezzanine Front-end
The front-end electronics are all mounted on a removable mezzanine card. In the event of accidental
damage or as components fatigue over time (e.g. relays in high duty cycle automated testing
applications), the mezzanine card allows for fast and efficient replacement.
Bandwidth and Rise Time
The bandwidth specification indicates the frequency at which an input signal will be attenuated by 3dB
(approximately 30% loss of amplitude).
The bandwidth also has an impact on the minimum rise and fall times that can be passed through the
front-end electronics. A pulse with a very sharp edge will be observed to have a minimum rise timeTmin
determined by the front-end electronics. In general a pulse with a given 10-90% rise time T10-90real will
be observed with a lower value given by:
T10-902=T10-90real2+Tmin2
where Tmin(ns)≈0.35/BW(GHz)
Vertical Resolution
The U5309A ADC Card uses a 8-bit ADC giving 256 levels at each input full scale range.

1.3 Sampling and Data Acquisition
U5309A User's Manual 11
1.3 Sampling and Data Acquisition
The ADC Card acquires waveforms in association with triggers. Each waveform is made of a series of
measured voltage values (sample points) coming from the ADC at a uniform sampling rate.
Sampling rate
The U5309A Acquisition card contains an analog-to-digital conversion (ADC) system that can sample
waveforms, in a real time sampling mode, at the maximum rates shown in the table below.
Model Channel Con-
figuration Option Max. Sampling
Rate
Available
Channels Resolution Acquisition
Modes
U5309A
CH1/CH2
-SR0 500 MS/s
CH1: 1
CH2: 2 8 bits
Single or multi-
record
(up to 131'072
records)
-SR1 1 GS/s
-SR2 2 GS/s
CH4/CH8 -SR1 1 GS /s CH4: 4
CH8: 8
Table 1.4 - Acquisition sampling rate and resolution per channel.
The External Clock can be used to vary the sampling rate of the ADC card, see External clock and
reference (page 46).

1.4 Trigger
12 U5309A User's Manual
1.4 Trigger
The trigger settings applied to the ADC card are used to determine at which time the device will start
recording data. The various trigger settings are outlined below.
Trigger source
The trigger source can be:
the signal applied to an input channel (digital internal triggering)
an external signal applied to the TRG IN front panel input connector (external triggering)
a software trigger (See How to generate a software trigger? (page 67)).
The different trigger modes are detailed in section Trigger modes and time-stamps (page 47)
Trigger impedance & coupling
The U5309A has a fixed 50 Ω termination impedance with DC coupling.
Trigger input bandwidths
The bandwidth depends on the trigger source.
Channel trigger
The -3 dB bandwidth of the comparator of the channel triggers is the same as the bandwidth of the
channel input. This is option dependent. Please refer to the table in the Channel Input (page 9) section.
For input signals with high frequency components, this means that the signal acquired and displayed
doesn’t correspond exactly to the signal seen from the trigger comparator input. Since, the signal seen
on the trigger comparator can be attenuated, this should be taken into account when selecting channel
triggers and specifying the trigger level.
External trigger
The external trigger input has a bandwidth from DC to 2 GHz.
Refer to section How to set the external trigger? (page 69) for additional information.
Trigger level
The trigger level specifies the voltage at which the selected trigger source will produce a valid trigger.
All trigger circuits have sensitivity levels that must be exceeded in order for reliable trigger to occur.
The external trigger input has a hysteresis of 5% of FSR (Full Scale Range), and FSR is ±5 V,
therefore the ADC card will trigger on signals with a peak-to-peak amplitude > 0.5 V.
The internal channel trigger of the U5309A, is implemented digitally and as such, the level may be
configured via the driver, within the limits shown in the table below.

1.4 Trigger
U5309A User's Manual 13
Slope Min Max
Positive = offset - range*127/256 + Hysteresis = offset + range*126/256
Negative = offset - range*127/256 = offset + range*126/256 - Hysteresis
Table 1.5 - Minimum and maximum value of the digital channel trigger. "Offset" and "range" refer to the channel's
current Vertical Offset and Vertical Range settings.
The hysteresis is configured automatically as a function of the vertical FSR, as follows:
Full Scale Range (Volts) Hysteresis (LSB) Hysteresis (Volts)
5 6 0.12
2.5 6 0.06
1 8 0.03
0.5 8 0.016
0.25 14 0.014
Table 1.6 - Minimum and maximum value of the digital channel trigger. "Offset" and "range" refer to the channel's
current Vertical Offset and Vertical Range settings.
Edge trigger slope
The trigger slope defines which one of the two possible transitions will be used to initiate the trigger
when it passes through the specified trigger level. Positive slope indicates that the signal is
transitioning from a lower voltage to a higher voltage. Negative slope indicates the signal is
transitioning from a higher voltage to a lower voltage.
The trigger time interpolator is only applicable to the external trigger input (TRG IN), it does not
operate on the channel trigger of the U5309A.
Trigger precision and resolution
The U5309A trigger time interpolator offers a resolution of 8 ps (nominal) and a precision of 15 ps RMS
(nominal) .
The channel trigger resolution and precision are both equal to 1 sample.
The accuracy of absolute trigger time is guaranteed (as specified in the datasheet) down to sample
rates 1/16 of the highest sample rate (1/32 of the highest sample rate with interleaving).

1.4 Trigger
14 U5309A User's Manual
If comparing the initial trigger time T0 measured using the same waveform either used as channel
input trigger or as an external trigger, the T0 position can be slightly different (especially if the
waveform used as trigger has a slow edge).
First, the analog bandwidth can be different for the channel trigger input and the external trigger
input, resulting in a different slope and so a different T0.
Secondly, compared with the channel trigger, the external trigger threshold is not calibrated. The
input channel trigger calibration allows a T0 adjustment both in threshold and in timing, resulting in a
more accurate T0. However, when using the external trigger, the measured T0 is still precise and
theT0 position difference stays stable.
Using a signal with faster edge as external trigger can reduce this effect.
Trigger delays
For more details about triggers modes, post/pre-trigger delays and time-stamps, see Trigger modes
and time-stamps (page 47).

1.5 Calibration
U5309A User's Manual 15
1.5 Calibration
The U5309A is factory calibrated and shipped with a calibration certificate.
The internal calibration refers to the adjustment of ADC card internal parameters, corresponding to
user selected parameters and required before starting acquisition.
Internal calibration
The internal calibration (or self-calibration) measures and adjusts the internal timing, gain and offset
parameters between the ADCs and against a precise reference.
The ADC card includes a high precision voltage source and a 16-bit DAC, used to perform the input
voltage and offset calibration.
The supplied software drivers include self-calibration function which can be executed upon user
request. The ADC cards are never self-calibrated in an automatic way, (i.e. as a consequence of
another operation). This ensures programmers have full control of all calibration operations performed
through software in order to maintain proper event synchronization within automated test applications.
For accurate time and voltage measurements it is recommended to perform a self-calibration once
the module has attained a stable operating temperature (usually reached after 20 minutes of ADC
card operation after power on).
A full internal calibration of a ADC card can be time consuming because of the many possible
configuration states. Therefore, the self-calibration is performed only for the current configuration
state, and is mandatory before making the first acquisition with given settings. Indeed the AqMD3
driver prevents an acquisition from being performed unless a self-calibration has first been completed.
Note that some configuration changes do not require a new self-calibration. To avoid unnecessary
self-calibrations, the IAqMD3Calibration.IsRequired IVI.NETproperty or the AQMD3_ATTR_
CALIBRATION_IS_REQUIRED IVI-C attribute should be queried.
ADC card can usually work with signals present at the channel input, or trigger input. However, to
ensure the best performance, or if the calibration is found to be unreliable (as shown by a calibration
failure status), it is recommended to remove such signals.
Similarly, when working with internal clock, it is recommended to remove external reference and
external clock inputs during calibration to avoid parasitic effects.
It is not recommended to perform multiple successive calibrations. If a recurrent calibration failure
occurs, in case of specific application, please contact support for advice.
Smart-calibration
The smart calibration implemented in MD3 drivers allows to save time by automatically keeping in
memory the calibration information from any self-calibration performed since the beginning of the
session. When the acquisition parameters are changed, no re-calibration of the card is necessary if a

1.5 Calibration
16 U5309A User's Manual
self-calibration has already been performed with the same acquisition conditions (i.e. the same set of
parameters), unless the clock mode parameters are changed.
Indeed, any change in the clock mode parameters (i.e. External clock frequency, Clock source or
Reference mode parameters), induces a restart of the clocks which requires a new self-calibration.
For details, see How to calibrate the card? (page 63).
Factory calibration
Factory calibration is the process of measuring the actual performance of a device-under-test (DUT)
using laboratory instruments that have significantly better performance than the DUT. Laboratory
instrument performance must be traceable to the International System (SI) Units via a national
metrology institute (NIST, NPL, NRC, PTB, CENAM, INMETRO, BIPM, etc.)
The measured performance is then compared to published datasheet specifications. For each factory
calibration, Acqiris tests the performance corresponding to all datasheet specifications, for every
installed option. If needed, the DUT is adjusted and re-qualified ; ensuring it is in line with full
specifications.
Our ADC cards are calibrated at factory during the production phase. There is no need to
systematically calibrate each year.
Firstly, the cards include a self-calibration function providing a good degree of confidence that your
card is operating within its specifications on a day-to-day basis, and triggering an error message if out
of calibration relative to the internal calibration signal.
Secondly, our cards are warranted to stay within specification over the standard 3-year warranty. They
usually stay within specification much longer and we rarely have to effectively recalibrate the cards.
Lastly, a onetime calibration can be ordered in case customer detects a deviation in the measure of its
final product that appears to be caused by the ADC card. The onetime calibration consists in
processing the card through production test to determine if it is still within specification:
If yes, the ADC card is returned with the certificate of calibration which certifies it is within spe-
cification.
If not, the required calibration is performed, and another production test is done to provide the
certificate of calibration.
If repair is required, and the card is out of warranty, a repair quote will be provided.
For more information, or to request for a calibration, please contact technical support
support@acqiris.com.

Real-Time Processing Options
U5309A User's Manual 17
Chapter 2
Real-Time Processing Options
The U5309A ADC Card provides several optional modes. This section describes each acquisition
mode and associated real-time signal processing.
2.1 Acquisition modes and specific features 17
2.2 Easy firmware switch 18
2.3 Digitizer firmware (DGT option) 19
2.4 Real-time averaging (AVG option) 22
2.5 Peak Detection (PKD) 30
The modes available with your product depends on the firmware options ordered with your products.
To check which options and mode are present on your ADC card you can use the MD3 Software
Front Panel from the: Windows Start Menu > Acqiris > MD3 > Acqiris MD3 SFP. Then use the
menu Help > About. The field System Options gives the option list.
2.1 Acquisition modes and specific features
The following table show the availability of firmware options versus channel configuration and
sampling rate.
Firmware
Channel Configuration & Sampling Rate
-CH1/-CH2 -CH8
-SR0 -SR1 -SR2 -SR1
-DGT ü ü ü ü
-AVG ü ü ü
On -CH1 only —
-PKD ü ü ü
On -CH1 only —
-TSR ü ü ü —
Combining -AVG & -TSR ü ü ü —
Table 2.1 - List of supported firmware options vs. sampling rate option.

2.2 Easy firmware switch
18 U5309A User's Manual
2.2 Easy firmware switch
A simple call to the configuration function will enable to switch to the required option.

2.3 Digitizer firmware (DGT option)
U5309A User's Manual 19
2.3 Digitizer firmware (DGT option)
The digitizer firmware (normal mode) allows standard data acquisition, including: ADC card
initialization, setting of the acquisition and clocking modes, management of channel triggering for best
synchronization, storing data in the internal memory and/or transferring them to the host computer.
Single and multi-record acquisition modes
To maximize sampling rates and utilize memory as efficiently as possible the ADC cards include both
single and multi-record modes. For both of these modes the data of all of the active channels is
acquired synchronously; all of the ADC's are acquiring data at the same time, to within a small fraction
of the maximum sampling rate.
The single record acquisition mode is the normal operation of most ADC card products. In this
mode an acquisition consists of a waveform recorded with a single trigger. The user selects the
sampling rate and record size, and sets the number of records to 1 (default value). For details about the
trigger sources, see Trigger (page 12).
Figure 2.1 - Acquisition sequence using a single record.
The ADC cards also feature a multi-record acquisition mode. This mode allows the capture and
storage of consecutive single waveforms. Multi-record acquisition mode is useful as it can optimize
the ADC card's sampling rate and memory requirements for applications where only portions of the
signal being analyzed are important. The mode is extremely useful in almost all impulse-response type
applications (RADAR, SONAR, LIDAR, Time-of-Flight, Ultrasonics, Medical and Biomedical
Research, etc.).
In multi-record acquisition mode the acquisition memory is divided into a pre-selected number of
records. Waveforms are stored in successive memory records as they arrive. Each waveform requires
its own individual trigger.
Figure 2.2 - Acquisition sequence using a multi-records. It is possible to miss a trigger at high trigger rate, as
illustrated with trigger 3.

2.3 Digitizer firmware (DGT option)
20 U5309A User's Manual
The multi-record acquisition mode enables successive events, occurring within a very short time,
to be captured and stored without loss. A very fast trigger rearm time is a crucial feature for multi-
record acquisitions. Thanks to fast trigger rearm, the U5309A achieves very low “dead time” between
the records of a multi-record acquisition. The “dead time” is the period after the end of an event when
the card cannot accept a new trigger event. The re-arm time is provided in the U5309A's U5309A
datasheet.
Program examples for Single record or multi-records acquisitions are available:
For IVI-C C1:\Program Files\IVI Foundation\IVI\Drivers\AqMD3\Examples\IVI-C
For IVI.NET C:\Program Files\IVI Foundation\IVI\Drivers\AqMD3\Examples\IVI.NET
Acquisition memory
Data from the ADC is stored in on-board acquisition memory. The amount of memory in use for
acquisition can be programmed and is selectable from 1 point to the full amount of acquisition memory
available.
Model Memory option
ordered Acquisition memory Max samples/channel
U5309A -CH2
-M01 128 MB 64 MS/ch
-M05 512 MB 256 MS/ch
-M20 2 GB 1 GS/ch
U5309A -CH8
-M01 128 MB 16 MS/ch
-M05 512 MB 64 MS/ch
-M20 2 GB 256 MS/ch
U5309A -CH1
-M01 64 MB 64 MS/ch
-M05 256 MB 256 MS/ch
-M20 1 GB 1 GS/ch
U5309A -CH4
-M01 64 MB 16 MS/ch
-M05 256 MB 64 MS/ch
-M20 1 GB 256 MS/ch
Table 2.2 - Maximum number of samples which can be recorded per channel, depending on ordered memory
option.
For technical reasons, a certain acquisition memory overhead is required for each waveform, reducing
the available memory by a small amount.
1Or the alternative drive letter where the Acqiris MD3 Software has been installed on your machine.
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