ADLINK Technology PCIe-7300A User manual

Advance Technologies; Automate the World.
Manual Rev. 2.50
Revision Date: July 1, 2008
Part No: 50-11106-1030
PCI/PCIe/cPCI-7300A
80 MB Ultra-High Speed 32-CH
Digital I/O Boards
User’s Manual

Copyright 2008 ADLINK TECHNOLOGY INC.
All Rights Reserved.
The information in this document is subject to change without prior
notice in order to improve reliability, design, and function and does
not represent a commitment on the part of the manufacturer.
In no event will the manufacturer be liable for direct, indirect, spe-
cial, incidental, or consequential damages arising out of the use or
inability to use the product or documentation, even if advised of
the possibility of such damages.
This document contains proprietary information protected by copy-
right. All rights are reserved. No part of this manual may be repro-
duced by any mechanical, electronic, or other means in any form
without prior written permission of the manufacturer.
Trademarks
NuDAQ, NuIPC, DAQBench are registered trademarks of ADLINK
TECHNOLOGY INC.
Product names mentioned herein are used for identification pur-
poses only and may be trademarks and/or registered trademarks
of their respective companies.

Getting Service from ADLINK
Customer Satisfaction is top priority for ADLINK Technology Inc.
Please contact us should you require any service or assistance.
ADLINK TECHNOLOGY INC.
Web Site: http://www.adlinktech.com
Sales & Service: [email protected]
TEL: [phone]
FAX: [phone]
Address: 9F, No. 166, Jian Yi Road, Chungho City,
Taipei, 235 Taiwan
Please email or FAX this completed service form for prompt and
satisfactory service.
Company Information
Company/Organization
Contact Person
E-mail Address
Address
Country
TEL FAX:
Web Site Product Information
Product Model
Environment OS: M/B: CPU:
Chipset: BIOS:
Please give a detailed description of the problem(s):

i
Table of Contents
List of Tables.......................................................................... iv
List of Figures......................................................................... v
1 Introduction ........................................................................ 1
1.1 Applications ......................................................................... 2
1.2 Features............................................................................... 2
1.3 Specifications....................................................................... 3
1.4 Software Support................................................................. 6
Programming Library ......................................................6
DAQ-LVIEW PnP: LabVIEW® Driver .............................6
PCIS-VEE: HP-VEE Driver .............................................7
DAQBenchTM: ActiveX Controls ....................................7
2 Installation .......................................................................... 9
2.1 What You Have.................................................................... 9
2.2 Unpacking.......................................................................... 10
2.3 Device Installation for Windows Systems.......................... 10
2.4 cPCI/PCI/PCIe-7300A Layout............................................ 11
2.5 Hardware Installation Outline............................................. 13
2.6 Connector Pin Assignment ................................................ 14
2.7 Wiring and Termination..................................................... 17
2.8 Termination Board Support................................................ 18
Connect with DIN-100S ................................................18
Connect with DIN-502S ................................................18
3 Registers........................................................................... 19
3.1 I/O Port Base Address....................................................... 20
3.2 DI_CSR: DI Control & Status Register .............................. 22
3.3 DO_CSR: DO Control & Status Register........................... 24
3.4 Auxiliary Digital I/O Register.............................................. 26
3.5 INT_CSR: Interrupt Control and Status Register............... 27
3.6 DI_FIFO: DI FIFO direct access port................................. 28
3.7 DO_FIFO: DO external data FIFO direct access port........ 29
3.8 FIFO_CR: FIFO almost empty/full register........................ 30
3.9 POL_CNTRL: Control Signal Polarity Control Register..... 31
3.10 PLX PCI-9080 DMA Control Registers.............................. 32

ii
4 Operation Theory.............................................................. 33
4.1 I/O Configuration................................................................ 34
4.2 Block Diagram.................................................................... 35
4.3 Digital I/O Data Flow.......................................................... 36
4.4 Input FIFO and Output FIFO.............................................. 37
4.5 Bus-mastering DMA........................................................... 38
4.6 Scatter/gather DMA ........................................................... 40
4.7 Clocking Mode................................................................... 41
4.8 Starting Mode..................................................................... 43
4.9 Active Terminator............................................................... 44
4.10 Digital Input Operation Mode............................................. 45
Digital Input DMA in Internal Clock Mode .....................45
Digital Input DMA in External Clock Mode ....................47
Digital Input DMA in Handshaking Mode ......................49
Continuous Digital Input ................................................51
4.11 Digital Output Operation Mode .......................................... 53
Digital Output DMA in Internal Clock Mode ..................53
Digital Output DMA in Handshaking Mode ...................54
Digital Output DMA in Burst Handshaking Mode ..........56
Pattern Generator .........................................................59
4.12 Auxiliary DIO...................................................................... 60
5 C/C++ Libraries ................................................................. 61
5.1 Libraries Installation........................................................... 62
5.2 Programming Guide........................................................... 63
5.3 _7300_Initial ...................................................................... 64
5.4 _7300_Close...................................................................... 66
5.5 _7300_Configure ............................................................... 67
5.6 _7300_DI_Mode ................................................................ 69
5.7 _7300_DO_Mode............................................................... 70
5.8 _7300_AUX_DI.................................................................. 72
5.9 _7300_AUX_DI_Channel................................................... 73
5.10 _7300_AUX_DO................................................................ 74
5.11 _7300_AUX_DO_Channel................................................. 75
5.12 _7300_Alloc_DMA_Mem................................................... 76
5.13 _7300_Free_DMA_Mem.................................................... 77
5.14 _7300_DI_DMA_Start........................................................ 78
5.15 _7300_DI_DMA_Status..................................................... 82
5.16 _7300_DI_DMA_Abort....................................................... 83
5.17 _7300_GetOverrunStatus.................................................. 84

iii
5.18 _7300_DO_DMA_Start...................................................... 85
5.19 _7300_DO_DMA_Status ................................................... 87
5.20 _7300_DO_DMA_Abort..................................................... 88
5.21 _7300_DO_PG_Start......................................................... 89
5.22 _7300_DO_PG_Stop......................................................... 91
5.23 _7300_DI_Timer................................................................ 92
5.24 _7300_DO_Timer.............................................................. 93
5.25 _7300_Int_Timer................................................................ 94
5.26 _7300_Get_Sample........................................................... 95
5.27 _7300_Set_Sample........................................................... 96
5.28 _7300_GetUnderrunStatus................................................ 97
Appendix................................................................................ 99
The Intel (NEC) 8254 ....................................................99
The Control Byte ...........................................................99
Mode Definition ...........................................................101

iv List of Tables
List of Tables
Table 2-1: Connector Pin Assignment ..................................... 14
Table 3-1: I/O Port Base Address ............................................ 20
Table 4-1: I/O Configuration ..................................................... 34
Table 5-1: Data Types ............................................................. 63

List of Figures v
List of Figures
Figure 2-1: PCI-7300A Layout Diagram..................................... 11
Figure 2-2: cPCI-7300A Layout Diagram................................... 12
Figure 2-3: PCIe-7300A Layout Diagram................................... 12
Figure 2-4: CN1 Pin Assignment ............................................... 16
Figure 4-1: Block diagram.......................................................... 35
Figure 4-2: Data flow of digital input .......................................... 36
Figure 4-3: Data flow of digital output........................................ 36
Figure 4-4: Maximum data throughput....................................... 38
Figure 4-5: Scatter/gather DMA for digital output ...................... 40
Figure 4-6: Timer configuration.................................................. 41
Figure 4-7: DIREQ as input data strobe (Rising Edge Active)... 48
Figure 4-8: DIREQ as input data strobe (Falling Edge Active) .. 49
Figure 4-9: DIREQ & DIACK Handshaking................................ 51
Figure 4-10: DOREQ as output data strobe................................. 54
Figure 4-11: DOREQ & DOACK Handshaking............................ 56

vi List of Figures

Introduction 1
1 Introduction
The cPCI/PCI/PCIe-7300A is cPCI/PCI/PCI Express form factor
ultra-high speed digital I/O card, it consists of 32 digital input or
output channel. High performance designs and the state-of-the-art
technology make this card to be ideal for high speed digital input
and output applications.
The cPCI/PCI/PCIe-7300A performs high-speed data transfers
using bus mastering DMA and scatter/gather via 32-bit PCI bus
architecture. The maximum data transfer rates can be up to 80MB
per second. It is very suitable for interface between high speed
peripherals and your computer system.
The cPCI/PCI/PCIe-7300A is configured as two ports, PORTA and
PORTB, each port controls 16 digital I/O lines. The I/O can config-
ure as either input or output, and 8-bit or 16-bit. According to out-
side device environment, users can configure cPCI/PCI/PCIe-
7300A to meet all high speed digital I/O data transfer.
There are 4 different digital I/O operation modes are supported:
1. Internal Clock: the digital input and output operations
are paced by internal clock and transferred by bus mas-
tering DMA.
2. External Clock: the digital input operation is paced by
external strobe signal ( DIREQ ) and transferred by bus
mastering DMA.
3. Handshaking: through REQ signal and ACK signal, the
digital I/O data can have simple handshaking data trans-
fer.
4. Pattern Generation: You can output a digital pattern
repeatedly at a predetermined rate. The transfer rate is
controlled by internal timer.

2 Introduction
1.1 Applications
XInterface to high-speed peripherals
XHigh-speed data transfers from other computers
XAutomated test equipment (ATE)
XElectronic and logic testing
XInterface to external high-speed A/D and D/A converter
XDigital pattern generator
XWaveform and pulse generation
XParallel digital communication
1.2 Features
The cPCI/PCI/PCIe-7300A Ultra-High Speed DIO cards provide
the following advanced features:
X32 digital input/output channels
XExtra 4-bit TTL digital input and output channels
XTransfer up to 80M Bytes per second
XSCSI active terminator for high speed and long distance
data transfer
X32-bit PCI bus
XPlug and Play
XScatter/gatter DMA
XOn-board internal clock generator
XInternal timer/external clock controls input sampling rate
XInternal timer control digital output rate
XACK and REQ for handshaking
XTRIG signal controls start of data acquisition/pattern gener-
ation
XOn-board 64KB FIFO
X100-pin SCSI style connector

Introduction 3
1.3 Specifications
Digital I/O (DIO)
XNumbers of Channel: 32 TTL compatible inputs and/or out-
puts
XDevice: IDT 74FCT373
XI/O Configurations:
Z16 DI & 16 DO
Z32 DI
Z32 DO
Input Voltage:
XLow: Min. 0V; Max. 0.8 V
XHigh: Min. +2.0 V
Input Load:
XTerminator OFF:
ZLow: +0.5 V @ ±20 mA
ZHigh: +2.7 V @ ±1 mA max.
XTerminator ON:
ZTermination resistor: 110 Ohms
ZTermination voltage: 2.9V
ZLow: +0.5 V @ ±22.4mA
ZHigh: +2.7 V @ ±1mA max.
Output Voltage:
XLow: Min. 0 V; Max. 0.5V
XHigh: Min. +2.7 V
Driving Capacity:
XLow: Max. +0.5 V at 48mA (Sink)
XHigh: Min. 2.4 V at -8 mA (Source)
Hysteresis: 500 mV

4 Introduction
Transfer Characteristic
XMode: Bus Mastering DMA with Scatter/Gather
XData Transfers: 8/16/32-bit input or output (programmable)
DMA Transfer count:
XNo limitation for chaining mode (scatter/gather) DMA
Max. Transfer rate:
XDO: 80M Bytes/sec: 32-bit output @ 20 MHz
XDI: 80M Bytes/sec: 32-bit input @ 20 MHz
Programmable Counter:
XDevice: 82C54-10
XDigital Input Pacer: 20 MHz, 10 MHz, or clock output of
Timer #0
XDigital Output Pacer: 20 MHz, 10 MHz, or clock output of
Timer #1
General Specifications
XConnector: one 100-pin male SCSI-II style cable connector
XOperating Temperature: 0°C - 60°C
XStorage Temperature: -20°C - 80°C
XHumidity: 5 - 95%, non-condensing
XDimensions
ZPCI-7300A: 179mm (L) X 102mm (H)
ZPCIe-7300A: 168 mm (L) x 112 mm (H)
ZcPCI-7300A: 160mm (L) x 100 mm (H)

Introduction 5
XPower Consumption:
PCI-7300A:
Z+5 V @ 830 mA typical (onboard terminator off), 1.0 A
typical (onboard terminator on)
PCIe-7300A:
Z+12 V @ 119 mA typical (onboard terminator off), 287
mA typical (onboard terminator on)
Z+3.3 V @ 499 mA typical (onboard terminator off), 543
mA typical (onboard terminator on)
cPCI-7300:
Z+5 V @ 830 mA typical (onboard terminator off), 1.0 A
typical (onboard terminator on)

6 Introduction
1.4 Software Support
ADLINK provides versatile software drivers and packages for
users’ different approach to built-up a system. We not only pro-
vide programming library such as DLL for many Windows sys-
tems, but also provide drivers for software packages such as
LabVIEW® and HP VEETM.
All the software options are included in the ADLINK CD. Commer-
cial software drivers are protected with serial licensed code. With-
out the software serial number, you can still install them and run
the demo version for two hours for demonstration purposes.
Please contact with your dealer to purchase a license.
1.4.1 Programming Library
For customers who are writing their own programs, we provide
function libraries for many different operating systems, including:
XDOS Library: Borland C/C++ and Microsoft C++, the func-
tions descriptions are included in this user’s guide.
XWindows 95 DLL: For VB, VC++, Delphi, BC5, the functions
descriptions are included in this user’s guide.
XPCIS-DASK: Include device drivers and DLL for Windows
98/NT/2000/XP/Vista. The DLL is binary compatible across
Windows 98/NT/2000/XP/Vista. That means all applications
developed with PCIS-DASK are compatible across Win-
dows 98/NT/2000/XP/Vista. The developing environment
can be VB, VC++, Delphi, BC5, or any Windows program-
ming language that allows calls to a DLL. The user’s guide
and function reference manual of PCIS-DASK are in the
CD. Please refer the PDF manual files under \\Manual\Soft-
ware Package\PCIS-DASK.
The above software drivers are shipped with the board. Please
refer to the “Software Installation Guide” to install these drivers.
1.4.2 DAQ-LVIEW PnP: LabVIEW® Driver
DAQ-LVIEW PnP contains the VIs, which are used to interface
with NI’s LabVIEW® software package. The DAQ-LVIEW PnP
supports Windows 98/NT/2000/XP/Vista. The LabVIEW® drivers

Introduction 7
are free shipped with the board. You can install and use them
without license. For detail information about DAQ-LVIEW PnP,
please refer to the user’s guide in the CD.
(\\Manual\Software Package\DAQ-LVIEW PnP)
1.4.3 PCIS-VEE: HP-VEE Driver
The PCIS-VEE includes the user objects, which are used to inter-
face with HP VEE software package. PCIS-VEE supports Win-
dows 98/NT/2000/XP. The HP-VEE drivers are free shipped with
the board. You can install and use them without license. For detail
information about PCIS-VEE, please refer to the user’s guide in
the CD.
(\\Manual\Software Package\PCIS-VEE)
1.4.4 DAQBenchTM: ActiveX Controls
We suggest the customers who are familiar with ActiveX controls
and VB/VC++ programming use the DAQBenchTM ActiveX Con-
trol components library for developing applications. The
DAQBenchTM is designed under Windows 98/NT/2000/XP. For
more detailed information about DAQBench, please refer to the
user’s guide in the CD.
(\\Manual\Software Package\DAQBench Evaluation)

8 Introduction

Installation 9
2 Installation
This chapter describes how to install the cPCI/PCI/PCIe-7300A. At
first, the contents in the package and unpacking information that
you should be careful are described. Because the cPCI/PCI/PCIe-
7300A is following the PCI design philosophy, it is no more jump-
ers and DIP switches setting for configuration. The Interrupt and I/
O port address are the variables associated with automatic config-
uration, the resource allocation is managed by the system BIOS.
Upon system power-on, the internal configuration registers on the
board interact with the BIOS.
2.1 What You Have
In addition to this User's Manual, the package includes the follow-
ing items:
XcPCI/PCI/PCIe-7300A 80 MB Ultra-High Speed 32-CH Digi-
tal I/O Card
XADLINK All-in-one CD
XSoftware Installation Guide
If any of these items is missing or damaged, contact the dealer
from whom you purchased the product. Save the shipping materi-
als and carton in case you want to ship or store the product in the
future.

10 Installation
2.2 Unpacking
Your cPCI/PCI/PCIe-7300A card contains sensitive electronic
components that can be easily damaged by static electricity.
The card should be placed on a grounded anti-static mat. The
operator should be wearing an anti-static wristband, grounded at
the same point as the anti-static mat.
Inspect the card module carton for obvious damage. Shipping and
handling may cause damage to your module. Be sure there are no
shipping and handling damages on the module before processing.
After opening the card module carton, extract the system module
and place it only on a grounded anti-static surface component side
up.
Again inspect the module for damage. Press down on all the sock-
eted IC's to make sure that they are properly seated. Do this only
with the module place on a firm flat surface.
Note: DO NOT APPLY POWER TO THE CARD IF IT HAS BEEN
DAMAGED.
You are now ready to install your cPCI/PCI/PCIe-7300A.
2.3 Device Installation for Windows Systems
Once Windows 98/2000/XP/Vista has started, the Plug and Play
function of Windows system will find the new NuDAQ/NuIPC
cards. If this is the first time to install NuDAQ/NuIPC cards in your
Windows system, you will be informed to input the device informa-
tion source. Please refer to the “Software Installation Guide” for
the steps of installing the device.
\\Manual\Software Package\SoftwareInstallationGuide