Air 486VP User manual

486VP
VL/PCI System Board
USER'S MANUAL
Revision 1.0

!!! WARNING !!!
Be careful while installin VESA Local Bus cards on to your system
board. Keep the followin tips in mind to properly install and remove a
VESA Local Bus card.
1. Always install/remove the card vertically strai ht down/up. Never
at an angle! Insertin the card at an an le may dama e the pins
in both the AT and VESA Local Bus slots.
2. To install the board vertically, hold the card in the middle. Make sure
that the card is even with both slots. Then ently fit the card into the
slots with equal pressure at both ends.
Manufacturer warrant does not cover damage caused to
the s stem board b improper installation or removal of
VESA Local Bus cards.
486VP System Board User's Manual Pa e 1

486VP QUICK REFERENCE
I. STANDARD CMOS SETUP
: Current date
: Current time
: Hard disk parameters
: Hard disk parameters
: Type of floppy drive installed
: Type of floppy drive installed
: Type of video card installed
II. BIOS FEATURES SETUP
Virus Warning: Disabled
CPU Internal Cache: Enabled
External Cache: Enabled
Boot Sequence: A,C
Swap Flopp Drive: Disabled
Boot Up Flopp Seek: Enabled
Boot Up Numlock Status: On
IDE HDD Block Mode Transfer: Disabled
Memor Parit Error Check: Enabled
Securit Option: Setup
S stem BIOS Shadow: Enabled
Video BIOS Shadow: Enabled
C8000-CBFFF Shadow: Disabled
CC000-CFFFF Shadow: Disabled
D0000-D3FFF Shadow: Disabled
D4000-D7FFF Shadow: Disabled
D8000-DBFFF Shadow: Disabled
DC000-DFFFF Shadow: Disabled
E0000-E3FFF Shadow: Disabled
E4000-E7FFF Shadow: Disabled
E8000-EBFFF Shadow: Disabled
EC000-EFFFF Shadow: Disabled
Pa e 2 486VP System Board User's Manual

II. CHIPSET FEATURES SETUP
25 MHz 33 MHz 40 MHz 50 MHz
AT Bus Clock CLK/3 or
CLK/6
CLK/2 or
CLK/4
CLK/2.5 or
CLK/5
CLK/3 or
CLK/6
SRAM Read
Burst
3111 3222 3222 3222
SRAM Write WS 0WS 0WS 1WS 1WS
Special SRAM
Wait State (WS)
Disabled Enabled Disabled Disabled
DRAM Write WS 0WS 1WS 1WS 1WS
DRAM Read WS 2WS 3WS 3WS 3WS
RAS Precharge 2 Sysclk 3 Sysclk 3 Sysclk 3 Sysclk
RAS to CAS
Dela
1 Sysclk 1 Sysclk 2 Sysclk 2 Sysclk
F0000 Cacheable: Enabled
C0000 Cacheable: Enabled
Cacheable Range: 0-128M
DRAM Page Mode: Slow Pa e Mode
15-16MB Access: Normal
1MB Cache Memor : Disabled
VGA T pe: Standard
PCI Arbitration Rotate Priorit : Disabled
PCI Post-Write Fast: Disabled
CPU Master Post-Write Buffer: 4
CPU Master Post-Write Burst Mode: Disabled
CPU Master Fast Interface: Disabled
PCI Master Post-Write Buffer: 4
PCI Master Post-Write Burst Mode: Disabled
PCI Master Fast Interface: Disabled
CPU Master DEVSEL# Time-Out: 6 PCICLK
PCI Master DEVSEL# Time-Out: 4 PCICLK
486VP System Board User's Manual Pa e 3

PREFACE
Thank you for purchasin the 486VP system board. This document ives
an aid to the confi uration and installation of this system board.
The information in this document is subject to chan e without notice.
This document contains information protected by copyri ht. All ri hts are
reserved. No part of this document may be used or reproduced in any
forms or by any means, or stored in a database or retrieval system,
without prior written permission.
TRADEMARKS
Intel is a re istered trademark of Intel Corporation.
IBM is a re istered trademark of International Business Machines
Corporation.
Microsoft is a re istered trademark of Microsoft Corporation.
VESA is a re istered trademark of Video Electronics Standard
Association.
All other trademarks used in this manual are the property of their
respective owners.
Pa e 4 486VP System Board User's Manual

TABLE OF CONTENTS
486VP QUICK REFERENCE
I. STANDARD CMOS SETUP
II. BIOS FEATURES SETUP
II. CHIPSET FEATURES SETUP
CHAPTER 1: INTRODUCTION
CHAPTER 2: JUMPERS & CONNECTORS
SYSTEM BOARD JUMPERS
CPU External Clock Jumpers
CPU Type Jumpers
CPU Power Voltage Jumper
Cache Size Jumpers
Memory Bank Jumpers
PC Bus nterrupt Jumpers
Display Type Jumper
Clear CMOS Data Jumper
FLASH B OS Jumper
Green PC Jumpers
Reserved Jumpers
SYSTEM BOARD CONNECTORS
Power Supply Connectors
Keyboard Connector
Power LED and Keyboard Lock Connector
Speaker Connector
Reset Connector
Turbo Switch Connector
Turbo LED Connector
CHAPTER 3: HARDWARE INSTALLATION
THE DRAM SIMMs
nstalling DRAM S MMs
INSTALLING A VL-BUS CARD
EQUIPMENT REQUIRED
CHAPTER 4: BIOS SETUP
ENTERING SETUP
STANDARD CMOS SETUP
BIOS FEATURES SETUP
CHIPSET FEATURES SETUP
POWER MANAGEMENT SETUP
PCI CONFIGURATION SETUP
LOAD BIOS DEFAULTS
LOAD SETUP DEFAULTS
486VP System Board User's Manual Pa e 5

PASSWORD SETTING
IDE HDD AUTO DETECTION
SAVE AND E IT SETUP
E IT WITHOUT SAVING
CHAPTER 5: KEYBOARD HOT KEYS
SYSTEM SPEED
APPENDIX A: BIOS HARD DISK TYPE
APPENDIX B: MEMORY MAPPING
APPENDIX C: AT I/O ADDRESS MAP
APPENDIX D: INTERRUPT ASSIGNMENTS
APPENDIX E: SPECI ICATION
Pa e 6 486VP System Board User's Manual

CHAPTER 1: INTRODUCTION
The 486VP system board adds to our 486 product line hi h inte ration
and cost effective solution without compromisin performance and
quality. With top speed at 50 MHz, VL-Bus and PCI Bus on the same
board, and maximum 1MB Write-Back cache, the 486VP dramatically
boosts system throu hput for even the most demandin applications.
The 486VP offers features and functionality exceedin any other system
board in its class, includin :
CPU:
·Intel i486DX4, i486DX2, i486DX, i486SX, i487SX, P24T, and
Overdrives.
Cache Memor :
·Supports 256KB, 512KB, and 1MB cache sizes.
Main Memor :
·Supports 1Mx9, 4Mx9, 1Mx36, 2Mx36, 4Mx36, and 8Mx36 SIMM
modules for up to 32 MBytes on-board memory.
Slots:
·Two 32-bit VESA Local Bus (VL-Bus) slots.
·Four PCI Local Bus slots.
·Four 16-bit ISA bus slots.
Green PC:
·Sophisticated system power mana ement and system event
monitorin throu h BIOS setup.
On-Board Batter :
486VP System Board User's Manual Pa e 7

·3.6V/60mA on-board battery.
Pa e 8 486VP System Board User's Manual

CHAPTER 2: JUMPERS & CONNECTORS
When working with the
486VP, it is extremel
important that ou avoid
static electricit . Alwa s
ground ourself b wearing
a wrist or ankle strap.
Fi ures 1 on the next pa e shows the component layout of the 486VP
system board with locations of the system board jumpers and
connectors. Note that most jumpers and connectors on the system board
are labeled with proper names with pin 1 marked as "1" or thick line. To
avoid dama in the board and to have proper operation caution should
be taken when connectin these components.
SYSTEM BOARD JUMPERS
Jumpers are used to select between various operatin modes. A jumper
switch consists of two, three, or four old pins projectin from the system
board. Placin the plastic jumper cap over two pins connects those pins
and makes a particular selection. Usin the cap to cover two pins in this
way is referred to as shortin those pins (ON position). If the cap is not
placed on any pins at all, this is referred to as leavin the pins open (OFF
position).
Note: When you open a jumper, leave the plastic jumper cap attached
to one of the pins so you don't lose it.
486VP System Board User's Manual Pa e 9

Pa e 10 486VP System Board User's Manual

FIGURE
486VP System Board User's Manual Pa e 11

CPU External Clock Jumpers
If you are installin an i486DX or i486SX, the internal CPU clock speed is
the same as the external CPU clock speed. This is different for i486DX4
or DX2 CPUs where the external speed is one-third or one-half of the
internal speed respectively. For example, a 486DX2-66 has an external
clock speed of 33 MHz.
Extern
al
Clock
Speed
JP2
6
JP2
7
JP2
8
JP
7
JP3
3
JP
8
JP8
A
JP6
1
JP1
3
25 MHz ON 1-2* 2-3 ON OFF 1-2 2-3 2-3 OFF
33 MHz ON 2-3 1-2* OF
F
OFF 1-2 2-3 2-3 OFF
40 MHz OFF 1-2 2-3 OF
F
ON 2-3 1-2 1-2 ON
50 MHz OFF 2-3 1-2 OF
F
ON 2-3 1-2 1-2 ON
*Note : For DX4 Onl
Set JP27 OFF for 25Mhz
Set JP28 OFF for 33Mhz
CPU Type Jumpers
CPU
TYPE
JP1
9
JP6
9
JP1
5
JP3
7
JP5
2
JP18
486DX4
486DX2
486DX
OFF OFF 1-2 2-3 OFF 1-2,3-4
486SX OFF OFF 1-2 OFF OFF 2-3
487SX
P24T
OFF OFF 1-2 1-2 OFF 1-2,3-4
Care should be taken when installin the CPU into the Pin Grid Array
(PGA) socket on the system board. Make certain that pin 1 of the CPU
chip is correctly ali ned with pin 1 of CPU socket. The location of pin 1
on the CPU is denoted by a small notch.
Pa e 12 486VP System Board User's Manual
CPU
SOCKET
Pin
1

CPU Power Voltage Jumper
At the time of this writin , only i486DX4 requires 3.3-Volt power input.
Select 5-Volt option for all other Intel CPUs.
JP80 Pin positionS
CPU
VOLTAG
E
JP80
5-V 1-3 , 2-4 2 4 6
3.3-V DX4 3-5, 4-6 1 3 5
Cache Size Jumpers
The system board supports 256KB, 512KB, and 1MB cache sizes.
Cache Size Jumper Selection
Cach
e
Size
JP2
0
JP2
1
JP62
256KB 1-2 1-2 OFF
512KB 2-3 2-3 OFF
1MB 2-3 OFF 2-3
Cache Size and SRAM ocations
Cache
Size
Tag RAM
U28
Data Bank 0
U29, U30,
U31, U32
Data Bank 1
U24, U25,
U26, U27
256KB 32Kx8 32Kx8 32Kx8
512KB 32Kx8 NONE 128Kx8
1MB 128Kx8 128Kx8 128Kx8
For 1MB cache onl : Go to Chipset Feature BIOS Setup to
enable 1MB Cache Memor option.
486VP System Board User's Manual Pa e 13

Memor Bank Jumpers
The 486VP supports up to 2 banks of SIMM modules. SIM1 throu h
SIM8 sockets support 30-pin SIMM modules. SIM9 and SIM10 support
72-pin modules.
SIM5-
SIM8
SIM1-
SIM4
SIM9 SIM10 JP2
2
JP2
3
JP2
4
JP2
5
BANK0
(1Mx9,
4Mx9)
BANK1
(1Mx9,
4Mx9)
NONE NONE 1-2 1-2 2-3 2-3
NONE NONE BANK0
(1Mx36,
4Mx36)
BANK1
(1Mx36,
4Mx36)
2-3 2-3 1-2 1-2
BANK0
(1Mx9,
4Mx9)
NONE NONE BANK1
(1Mx36,
4Mx36)
1-2 2-3 1-2 2-3
PCI Bus Interrupt Jumpers
If there is a PCI IDE controller, insert it on to slot PCI3 located near
memory banks. Interrupt IRQ14 is reserved for IDE. Non-IDE controllers
such as SCSI can be installed on slots PCI0, PCI1, or PCI2 where user
can select one additional shareable interrupt line such as 9, 10, 11, 12, or
15. For ISA or VL-Bus IDE controllers, jumper JP10K should
be set to OFF.
SLOTS
PCI0,
PCI1,
PCI2
SLOT PCI3
(IDE
Controller)
JP10
F
JP10
G
JP10
H
JP10I JP10
J
JP10
K
IRQ9 N/A 1-2 OFF OFF OFF OFF OFF
IRQ10 N/A OFF 1-2 OFF OFF OFF OFF
IRQ11 N/A OFF OFF 1-2 OFF OFF OFF
IRQ12 N/A OFF OFF OFF 1-2 OFF OFF
IRQ15 N/A OFF OFF OFF OFF 1-2 OFF
N/A IRQ14 OFF OFF OFF OFF OFF 2-4
Pa e 14 486VP System Board User's Manual

Displa T pe Jumper
Displa T pe JP5
Video display is VGA, EGA, or
Monochrome.
OFF
(Default)
Video display is CGA. ON
Clear CMOS Data Jumper
The CMOS jumper JP2 is used to clear the system confi uration data
currently stored in the CMOS RAM. All system setup information (hard
disk type, date/time, etc.), stored in the CMOS, will be destroyed. This
function would be useful if you were to for et the user password for the
system.
Function JP2
Normal CMOS Operation 1-2
(Default)
Clear CMOS Data 2-3
Follow these steps to clear CMOS data:
1. Turn power OFF.
2. Open the system cover and ain access to jumper JP2.
3. Chan e jumper JP2 to 2-3 position for few seconds then move the
jumper block back to 1-2 position a ain.
4. Replace and secure the system cover.
5. Turn power ON, CMOS data should be cleared.
486VP System Board User's Manual Pa e 15

FLASH BIOS Jumper
FLASH BIOS is an optional feature, contact our sale representatives for
detail.
FLASH BIOS Control JP12
Disable FLASH (optional) pro rammin .
This is normal operation.
1-2
(Default)
Enable FLASH BIOS pro rammin .
Contents of system board BIOS can be re-
pro rammed.
2-3
Green PC Jumpers
Pin JP3
1 Use this pin for controllin eneral purpose Green
PC device. When si nal on this pin oes low, the
external Green PC device connected to this pin
should o into power savin state. The power
mana ement feature must be enabled throu h
BIOS Power Mana ement Setup.
2 No Connection
Pin JP39
1 System power down can be invoked by shortin
pin 1 to pin 2 of this jumper. Make sure the BIOS
Power Mana ement Setup options are enabled.
Connect a 2-position switch from the front panel to
this jumper for manual control.
2 Ground
Pa e 16 486VP System Board User's Manual

Reserved Jumpers
Followin jumpers are reserved for manufacturer. Please leave the
settin s as shown below.
JP38 1-2, 4-5, 7-8, 11-12
JP10A, B, C, D, J OFF
JP42, JP50, JP51, JP67 OFF
JP40 OFF
JP9 2-3
JP11 2-3
JP59 1-2
JP60 1-2
JP81 ON
JP34 ON
JP35 1-2
JP58 2-3
JP29, JP30, JP31, JP32 2-3
JP6 OFF
JP56 OFF
JP36, JP64, JP65, JP66 1-2
JP53 1-2, 3-4
JP54 1-2, 3-4
JP41 1-2
JP68 1-2
JP63 OFF
JP71 OFF
JP55 OFF
JP57 1-2
JP70 2-3
486VP System Board User's Manual Pa e 17

SYSTEM BOARD CONNECTORS
Power Suppl Connectors
The two Power Supply connectors are 6-pin AT standard power
connectors. Most power supplies have two six-wire connectors, two of
the wires on each connector are black. Ali n the two six-wire connectors
so that the two black wires on each connector are in the middle as shown
below.
Pin Connector J1 Connector J1
1 Power Good Ground
2 +5 VDC Ground
3 +12 VDC -5 VDC
4 -12 VDC +5 VDC
5 Ground +5 VDC
6 Ground +5 VDC
Pa e 18 486VP System Board User's Manual

Ke board Connector
The keyboard connector is a 5-pin, circular-type DIN socket. It is used to
connect the system board keyboard interface to any standard AT-
compatible keyboard (84 or 101 -key type keyboards). The pin
assi nments are listed below:
Pin Description
1 Keyboard Clock Si nal
2 Keyboard Data Si nal
3 Not Used
4 Ground
5 +5V Fused VDC
Power LED and Ke board Lock Connector
The Power LED and Keyboard Lock connector (JP44) is 5-pin keyed
BERG strip. It is used to connect +5 VDC power to the power indicator
LED at the front panel and connect security keyboard lock to the
keyboard controller. This allows you to switch off the keyboard and so
provide limited security a ainst casual intruders. The pin assi nments
are indicated below:
Pin Description
1 LED Power
2 Key (No Connection)
3 Ground
4 Keyboard Lock
5 Ground
486VP System Board User's Manual Pa e 19