Analog Devices EV-ADF5355SD1Z User manual

EV-ADF5355SD1Z User Guide
UG-802
One Technology Way • P.O. Box 9106 • Norwood, MA 02062-9106, U.S.A. • Tel: [phone] • Fax: [phone] • www.analog.com
Evaluating the ADF5355 Frequency Synthesizer for Phase-Locked Loops
PLEASE SEE THE LAST PAGE FOR AN IMPORTANT
WARNING AND LEGAL TERMS AND CONDITIONS. Rev. B | Page 1 of 19
FEATURES
Self contained board, including ADF5355 frequency
synthesizer with integrated voltage controlled oscillator
(VCO), differential 122.88 MHz temperature controlled
crystal oscillator (TCXO), loop filter (5 kHz), USB interface,
and voltage regulators
Windows-based software allows control of synthesizer
functions from a PC
Externally powered by 6 V
EQUIPMENT NEEDED
Windows-based PC with USB port for evaluation software
System demonstration platform, serial only (SDP-S)
EVAL-SDP-CS1Z controller board
Power supply (6 V)
Spectrum analyzer
50 Ω terminators
EVALUATION KIT CONTENTS
EV-ADF5355SD1Z
USB cable
ONLINE RESOURCES
Documents Needed
ADF5355 data sheet
EV-ADF5355SD1Z user guide
PLL Software Installation Guide
Required Software
Analog Devices, Inc., ADF5355 software, Version 0.46.1 or
higher (available for download at
www.analog.com/ADF5355)
GENERAL DESCRIPTION
The EV-ADF5355SD1Z evaluates the performance of the ADF5355
frequency synthesizer with integrated VCO for phase-locked
loops (PLLs). A photograph of the evaluation board is shown in
Figure 1. The evaluation board contains the ADF5355 synthesizer
with integrated VCO, a differential 122.88 MHz reference TCXO, a
loop filter, a USB interface, power supply connectors, and sub-
miniature Version A (SMA) connectors. A USB cable is included to
connect the board to a PC USB port.
For easy programming of the synthesizer, download the
Windows®-based software from www.analog.com/ADF5355.
This board requires an SDP-S (shown in Figure 1, but not supplied
with the kit). The SDP-S allows software programming of the
ADF5355 device.
EVALUATION BOARD PHOTOGRAPH
Figure 1. EV-ADF5355SD1Z
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UG-802 EV-ADF5355SD1Z User Guide
Rev. B | Page 2 of 19
TABLE OF CONTENTS
Features .............................................................................................. 1
Equipment Needed........................................................................... 1
Evaluation Kit Contents................................................................... 1
Online Resources.............................................................................. 1
General Description ......................................................................... 1
Evaluation Board Photograph......................................................... 1
Revision History ............................................................................... 2
Getting Started .................................................................................. 3
Software Installation Procedures................................................ 3
Evaluation Board Setup Procedures........................................... 3
Evaluation Board Hardware ............................................................ 4
Power Supplies .............................................................................. 4
RF Output.......................................................................................4
Loop Filter ......................................................................................4
Reference Source ...........................................................................4
Default Configuration ..................................................................4
Evaluation Board Setup ................................................................5
Evaluation Board Software...............................................................6
Main Controls................................................................................6
Evaluation and Test ...........................................................................7
Evaluation Board Schematics and Artwork...................................8
Ordering Information.................................................................... 17
Bill of Materials........................................................................... 17
REVISION HISTORY
5/15—Rev. A to Rev. B
Moved Software Installation Procedures Section and Evaluation
Board Setup Procedures Section .................................................... 3
Changes to Figure 8.......................................................................... 9
4/15—Rev. 0 to Rev. A
Change to Figure 2 ........................................................................... 3
Changes to Figure 7.......................................................................... 8
Changes to Figure 8.......................................................................... 9
Changes to Figure 9........................................................................ 10
4/15—Revision 0: Initial Version

EV-ADF5355SD1Z User Guide UG-802
Rev. B | Page 3 of 19
GETTING STARTED
SOFTWARE INSTALLATION PROCEDURES
See the ADF5355 product page for the EV-ADF5355SD1Z control
software. For the software installation procedure, see the PLL
Software Installation Guide.
EVALUATION BOARD SETUP PROCEDURES
To run the s oftware,
1. Click the ADF5355 file on the desktop or from the Start
menu.
2. On the Select Device and Connection tab, choose ADF5355
and SDP board (black), and then click Connect (see
Figure 2).
3. When connecting the board, allow 5 sec to 10 sec for the
label on the status bar to change.
Under the File menu, the current settings can be saved to, and
loaded from, a text file.
Figure 2. Software Front Panel Display—Select Device and Connection
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UG-802 EV-ADF5355SD1Z User Guide
Rev. B | Page 4 of 19
EVALUATION BOARD HARDWARE
The EV-ADF5355SD1Z requires an SDP-S platform that uses the
EVAL-SDP-CS1Z (SDP-B is not recommended).
The EV-ADF5355SD1Z schematics are shown in Figure 7, Figure 8,
and Figure 9. The silkscreens for the evaluation board are shown in
Figure 10 and Figure 11.
POWER SUPPLIES
The board is powered by a 6 V power supply connected to the
red and black banana connectors. Connect the red connector to
a 6 V power supply and the black connector to ground.
The power supply circuitry allows the user two or three separate
low dropout (LDO) regulators to feed the ADF5355 (using fewer
LDO regulators increases the risk of spur contaminated dc
feeds).
The charge pump and VCO supply pins are powered from a 5 V
ADM7150 high performance, low noise regulator. The remaining
supplies are powered from a 3.3 V ADM7150 high performance,
low noise regulator.
LED1 indicates when the ADF5355 is powered on. Use
Switch S1 to switch the 6 V power to the board on and off.
RF OUTPUT
The EV-ADF5355SD1Z has one pair of SMA output connectors:
RFOUTA+ and RFOUTA− (differential outputs). Because they
are sensitive to impedance mismatch, connect the RF outputs to
equal load impedances. If only one port of a differential pair is
used, terminate the complementary port with an equal load
terminator (in general, a 50 Ω terminator).
SMA RFOUTB is a single-ended RF output that operates from
6.8 GHz to 13.6 GHz. If only RFOUTB is used, power off
RFOUTA+ and RFOUTA−. If left on, terminate both RFOUTA+
and RFOUTA− SMA connectors with 50 Ω terminators.
LOOP FILTER
The loop filter schematic is included in the board schematic in
Figure 7. Figure 3 shows the loop filter component placements.
For lowest noise at 100 kHz offset, use the following components
(that are inserted on the evaluation board) with a 0.9 mA charge
pump current:
C60 = 22 nF, C59 = 0.47 μF, C61 = 10 nF, C73 = 10 pF
R14 = 220 Ω, R1 = 470 Ω
For lowest rms phase noise, use the following components with
0.9 mA charge pump current:
C60 = 1.2 nF, C59 = 33 nF, C61 = 390 pF, C73 = 10 pF
R14 = 1 kΩ, R17 = 3.3 kΩ
Figure 3. Loop Filter Placement
REFERENCE SOURCE
The evaluation board contains a 122.88 MHz differential output
TCXO from Vectron International. If preferred, the user may
supply either a single-ended or differential reference input to
the REFINA/REFINB SMA connectors. When using an external
reference, remove R12 to disconnect the power rail from the
TCXO.
To use a single-ended REFINx, connect a low noise 122.88 MHz
reference source to SMA REFINB, and connect a 50 Ω terminator
to SMA REFINA. Remove Resistor R27 (100 Ω). To use a differ-
ential REFINx, connect the differential signal to SMA REFINA
and SMA REFINB. The differential REFINA/REFINB SMA
connectors can operate to a 500 MHz input frequency.
In the schematic shown in Figure 7, the REFINA pin of U1
(ADF5355) is connected to SMA REFINB, and the REFINB pin
of U1 (ADF5355) is connected to SMA REFINA. This schematic
matches the evaluation board connections.
DEFAULT CONFIGURATION
All components necessary for local oscillator generation are
inserted on the board. This board is shipped with the ADF5355
synthesizer with an integrated VCO, a differential 122.88 MHz
reference TCXO, and a 5 kHz loop filter (ICP = 0.9 mA).
12936-003
RVTUNE
R5
C73
RCPOUT
R17
RPIN18
C60 C59
R14
C61 R1

EV-ADF5355SD1Z User Guide UG-802
Rev. B | Page 5 of 19
EVALUATION BOARD SETUP
Figure 4. Evaluation Setup Block Diagram
SPECTRUM
ANALYZER
PC
EXTERNAL DC
SUPPLY
TCXO
ADF5355
LOOP FILTER
LOCK
DETECT
LED
PLL
POWER
LED
EXTERNAL POWER
SWITCH
REFERENCE
IN/OUT
SDP-S BOARD
REFINA
REFINB
RFOUTB
RFOUTA–
RFOUTA+
VSUPPLY
REFERENCE
(OPTIONAL)
SIGNAL GENERATOR
(UNDERNEATH BOARD)
EXTERNAL DC
GND
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UG-802 EV-ADF5355SD1Z User Guide
Rev. B | Page 6 of 19
EVALUATION BOARD SOFTWARE
MAIN CONTROLS
The Main Controls tab (see Figure 5) selects the RF and user
configurable register settings. Consult the register descriptions
in the ADF5355 data sheet for details. Default settings are rec-
ommended for most registers.
In RF Settings, ensure that VCOout (MHz) equals the VCO
frequency. Set Output divider to give the required
RFoutA± (MHz).
Ensure that Reference freq equals the applied reference signal. The
PFD frequency is calculated from the reference frequency, the R
counter, the reference doubler, and the reference divide by 2.
Ensure that the value in PFD (MHz) matches the value specified in
the loop filter design.
In Register 4, program CP current to match the value used for
the loop filter design.
Figure 5. Software Front Panel Display—Main Controls
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EV-ADF5355SD1Z User Guide UG-802
Rev. B | Page 7 of 19
EVALUATION AND TEST
To evaluate and test the performance of the ADF5355, use the
following procedure:
1. Install the ADF5355 software (see the PLL Software
Installation Guide).
2. Follow the hardware driver installation procedure (Windows
XP only).
3. Connect a 50 Ω terminator to RFOUTA−.
4. Connect the EV-ADF5355SD1Z board to the SDP-S board.
5. Connect the 6 V power supply to the banana connectors
and power up the board using S1 (check that LED1 is on).
6. Connect the USB cable from the SDP-S board to the PC.
7. Run the ADF5355 software.
8. Select ADF5355 and SDP board (black)in the Select
Device and Connection tab of the software front panel
display window (see Figure 2).
9. Click the Main Controls tab, and set the VCOout (MHz)
to a frequency of 6800 MHz and then click Write All
Registers.
10. Connect the spectrum analyzer to SMA Connector
RFOUTA+. See Figure 4 for a typical evaluation setup.
11. Measure the output spectrum and single sideband phase
noise.
Figure 6 shows a phase noise plot of the SMA RFOUTA+
equal to 6.8 GHz.
Figure 6. Single Sideband Phase Noise
–160
–180
–120
–140
–80
–60
–100
1k 10k 100k 1M 10M
FREQUENCYOFFSET (Hz)
PHASE NOISE (dBc/Hz)
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UG-802 EV-ADF5355SD1Z User Guide
Rev. B | Page 8 of 19
EVALUATION BOARD SCHEMATICS AND ARTWORK
Figure 7. Evaluation Board Schematic—Page 1
ADF5355
REFINAAND REFINBARE SPACED 15mm
CENTERTO CENTER ON PCB
125MHz
DNI Y1_ALT
U1
R6 5.1kΩ
C41 1000pF
C39 1000pF
RA3
0Ω
DNI
TP1
Y1
TP2
REFINB
17 20 10
19 23
6
24
22
14 12
11
28 29
30
3
27
2
32
25 7
1
4
16
5
17
6
5
23
4 8
1
6
1
3
2
5 4
1
45 3 2
1
+3.3V
GND VDD
CFO
FO
GND
E/D
NC
GND
PAD
CREG2
SDGND
MUXOUT
REFINA
REFINB
DVDD
PDBRF
CREG1
VBIAS
VREF
RSET
AGNDVCO
VTUNE
VREGVCO
AGNDVCO
VVCO
AVDD
AGNDRF
RFOUTB
AGNDRF
RFOUTA–
RFOUTA+
VRF
AGND
CPGND
CPOUT
VP
AVDD
CE
LE DATA
CLK
GND
C1
VCC
OUT–
OUT+
C2 GND
NC
VTUNE
GND
GND
GND
GND
GND
122.88MHz
TP6
CE
LE
CLK
DATA
GND GND GND
TP5TP4
TP3
R18 1.8kΩ R19
1.8kΩ R23
1.8kΩ
R24
DNI R25
1.5kΩ
IN
IN
IN
IN IN
LOOPFILTER
PLACE ON BOTTOM SIDE OF PCB
SHIELD SIGNALS WITH VIAS
LOCK DETECT
RMUX
0Ω R22
68Ω
MUXOUT
R20
0Ω
DNI
DS1
R26
0Ω
DNI
CREG1
VP MUXOUT
+3.3V
1ACGND
GND
IN
R12
0Ω
C35 0.1µF
GND
C25 10pF
GND
C53
0.1µF GND
C48
10pF
+3.3V
+3.3V
GND
C44 100pF GND
C47 1µF DVDD
GND
C33 0.1µF GND
C37
10pF
AVDD2
GND
C45
0.1µF GND
C43
10pF
REFINA
45 3 2
1
GND GND
C50
0.1µF GND
C46 10pF
VRF
GNDGND
C36 1000pF
GND
C38
10pF
VVCO
GND
C12 1µF
C9 1µF
GND
C32 1000pF
GND
C34 10pF
CPOUT
GND
C73 10pF
GND
C61 1000pF
GND
C60 22nF
VTUNE
GND
C59 0.47µF
R14
220Ω
R5
0Ω
R1
0Ω
R17
470Ω
RCPOUT
0Ω
GND
C55
0.1µF
GND
C54 10pF
AVDD1
R21
0Ω C23
DNI
GND R4
0Ω
GND
C17
4.7µF
GND
C27
1000pF
GND
C29 10pF
VREF
GND
C19 10µF
GND
C30 1000pF
GND
C31 10pF
GND
C15 1µF
DNI
GND
C26
0.1µF
GND
C28
10pF
VBIAS
VREGVCO
ADF5355BCPZ
+3.3V
31
26
PAD
8
21
18
15
13
9
GND
GND
R3 0Ω DNI
R2 10kΩ
PDRF
PDRF
32K243-40ML5 32K243-40ML5
RFOUTA+
RFOUTA+
GND
C3
10pF
0201
GND
VRF1
L1 7.4nH 0201
L3 4.7nH
0201
DNI
R32
0Ω
0201
RFOUTA–
RFOUTA–
GND
GND
C6
10pF
0201
GND
VRF1
L2 7.4nH 0201
L6 4.7nH 0201 DNI
R33
0Ω
0201
32K243-40ML5
RFOUTB
RFOUTB
GND
GND
L7 4.7nH 0201 DNI
C56
120pF
C21
1µF
C57
120pF
C58
0.1µF
VRF1
C51
10pF
0201
RF CHOKE
MATCHED LINE WIDTH’S
TRACE WIDTH = 380µm
CREG2
R9
51Ω
DNI +3.3V
R10
51Ω
DNI
R7
51Ω
DNI
R8
51Ω
DNI
R16
0Ω
R11
0Ω
RA4
0Ω
RA5
0Ω
R27
100Ω
C42
1000pF
C40 1000pF
+3.3V
CA5
1µF DNI
CA4 1µF
DNI
CA3 1µF
DNI
GND
CA2 1µF DNI
GND
CA1 100pF DNI
RA2 0Ω DNI
RA1 0Ω DNI
GND GND
12936-008

EV-ADF5355SD1Z User Guide UG-802
Rev. B | Page 9 of 19
Figure 8. Evaluation Board Schematic—Page 2
12936-009
JUMPER 3 PIN
PLACE VBIAS, VREF 7 VREGVCO RESISTORS CLOSE TO DUT PINS
DNI
C1 10µF
0
R_VBIAS
TP_VP
CVP 22µF
P3
P1
DNI
P2
RV1
VSUPPLY
S1
C71 22µF
C74 100µF
VSUPPLY
MUX/LE
VP
VREGVCO
VBIAS
VREF
6V
1
G1
1
35 4 3 2
1
13
GND
GND
GND
GND
ADM7150ACPZ-5.0
VR2
EP
PAD
VIN
EN
REF REF_SENSE
GND
BYP
VOUT
VREG
GND GND
AVDD
DVDD
VRF
VRF1
VVCO
VRVCO
GND
GND
G2 G3 G4 G5 G6 G7 G8 G9
G10 G11 G12 G13 G14 G15 G16 G17 G18 G19 G20 G21 G22 G23 G24 G25 G26 G27 G28 G29 G30 G31 G32 G33 G34 G35 G36
1 2 3 4 5 6 7 8
IN
G1 G2 G3 G4 G5 G6 G7 G8 G9
G10 G11 G12 G13 G14 G15 G16
1 2 3 4
1 2 3
1 2
IN
IN IN IN
IN
CPOUT VTUNE
RVTUNE
0Ω
DNI
RPIN18
0Ω
DNI
PLACE VTUNE, CPOUT AND SW RESISTORS CLOSE TO DUT PINS
SHIELD SIGNALS WITH VIAS ALL THE WAY TO THE DUT PINS.
LE
MUX/LE
MUXOUT
1 2
GND VSUPPLY_ALT
ZD1
+
+
+ +
+ +
+
0Ω
TP_+3.3V
R3V3
1kΩ
RAVDD GND
LED1
3.3V
1
AVDD2
TP_AVDD2
AVDD2
1
0Ω
TP_AVDD1
RV15
0Ω
RV26
0Ω
RV14 AVDD1
1
0Ω
TP_VVCO
CVVCO 22µF
RV7 VVCO
1
GND GND
GND
C13 10µF
GND
C7 10µF
GND
GND
C4 1µF
GND
C10 10µF
GND
RV10 0Ω DNI
RV9
0Ω
6 5 2
8
4
7 3 1
GND
CVRVCO 22µF
GND
RV6 0Ω
RV3 0Ω
RV2 0Ω
RV30 0Ω RV4 DNI RV19 0Ω
RV12 0Ω
RV8
0Ω
DNI
R_VREF
DNI
R_VREGVCO
0Ω
RV11
0Ω 6V
C75 100µF
VR3
EP
PAD
VIN
EN
REF REF_SENSE
GND
BYP
VOUT
VREG
C14 10µF
GND
C8 10µF
GND
GND
C5 1µF
C2 10µF
GND
C16 10µF
GND
CDVDD 22µF
TP_DVDD
0Ω
RV20 DVDD
1
GND
CAVDD 22µF
0Ω
RV25 VRF
1
GND
CVRF 22µF
TP_VRF1
TP_VRF
0Ω
RV31 VRF1
1
GND
CVRF1 22µF
GND
C11 10µF
GND
RV17 0Ω DNI
RV5 DNI
RV16
0Ω
6 5 2
8
4
7 3 1
GND
RV18
0Ω 6V
ADM7150ACPZ-3.3
C76 100µF
VR5
EP
PAD
VIN
EN
REF REF_SENSE
GND
BYP
VOUT
VREG
C24 1µF
GND
C20 10µF
GND
GND
C18 1µF
GND
C22 10µF
GND
RV28 0Ω DNI
RV27
0Ω
6 5 2
8
4
7 3 1
GND
RV29
0Ω 6V
ADM7150ACPZ-3.3
VP

UG-802 EV-ADF5355SD1Z User Guide
Rev. B | Page 10 of 19
Figure 9. Evaluation Board Schematic—Page 3
12936-010
24LC32A-I/MS
SDA
SCL
RDATA
1.5kΩ
RLE
1.5kΩ
RE3
TBD0603
DNI
RE2
100kΩ
RE1
100kΩ
UE1
CN1
CN1
DATA
LE
CLK
LE
PDRF
MUXOUT
CE
SDA_0
VIO_+3.3V
SCL_0
1
1
7
4
8
5
6
3
2
1
1
120
GND
GND GND GND
VSS
VCC
WP
A2
A1
A0
SCL SDA
GND
GND
IN
IN
IN
IN
RMUXOUT
0Ω
RCLK
1.5kΩ
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
119
118
117
116
115
114
113
112
111
110
109
108
107
106
105
104
103
102
101
100
99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
R28
0Ω
DNI
R29
0Ω
DNI
R31
0Ω
DNI
R30
0Ω
DNI
IN
IN
IN

EV-ADF5355SD1Z User Guide UG-802
Rev. B | Page 11 of 19
Figure 10. Evaluation Board Silkscreen—Top Side
12936-011

UG-802 EV-ADF5355SD1Z User Guide
Rev. B | Page 12 of 19
Figure 11. Evaluation Board Silkscreen—Reverse Side
12936-012

EV-ADF5355SD1Z User Guide UG-802
Rev. B | Page 13 of 19
Figure 12. Evaluation Board Layer 1—Primary
12936-013

UG-802 EV-ADF5355SD1Z User Guide
Rev. B | Page 14 of 19
Figure 13. Evaluation Board Layer 2—Ground
12936-014

EV-ADF5355SD1Z User Guide UG-802
Rev. B | Page 15 of 19
Figure 14. Evaluation Board Layer 3—Power
12936-015

UG-802 EV-ADF5355SD1Z User Guide
Rev. B | Page 16 of 19
Figure 15. Evaluation Board Layer 4—Secondary
12936-016

EV-ADF5355SD1Z User Guide UG-802
Rev. B | Page 17 of 19
ORDERING INFORMATION
BILL OF MATERIALS
Table 1.
Reference Designator Description Value Manufacturer Part Number
C1, C2, C7, C8, C10, C11,
C16, C20, C22
Ceramic multilayer capacitor, X5R 10 μF TDK C2012X5R1E106K085AC
C9, C12, C21, C47 Ceramic capacitor, X7R 1 μF Allied
Electronics
0603YC105KAT2A
C4, C5, C13, C14, C18, C24 Ceramic capacitor, X8R 1 μF TDK C2012X8R1C105K125AB
C17 Ceramic capacitor, X5R 4.7 μF TDK C1608X5R1C475K080AC
C19 Ceramic capacitor, X5R 10 μF TDK C1608X5R1A106M080AC
C25, C28, C29, C31, C34, C37,
C38, C43, C46, C48, C54
RF/microwave capacitor, C0G 10 pF Allied
Electronics
04025U100GAT2A
C27, C30, C32, C36,
C39 to C42
Ceramic capacitor, C0G, 0402
1000 pF
Murata
GRM1555C1H102JA01
C3, C6, C51 Ceramic chip capacitor, RF 10 pF Allied
Electronics
0201ZK100GBSTR
C26, C33, C35, C45, C50,
C53, C55, C58
Ceramic capacitor, X7R 0.1 μF KEMET C0402C104K4RACTU
C44 Ceramic capacitor, NP0 100 pF Yageo 2238 867 15101
C56, C57 Ceramic capacitor, C0G, 0402 120 pF Murata GRM1555C1H121JA01
C59 Ceramic capacitor, Y5V 0.47 μF Murata GRM188F51C474ZA01D
C60 Ceramic capacitor 22 nF Allied
Electronics
0603YC223KAT2A
C61
Ceramic capacitor, X7R
10,000 pF
Yageo
CC0603KRX7R9BB103
C71 Solid tantalum electrolytic capacitor 22 μF Allied
Electronics
TCJC226M025R0100
C73 Chip capacitor, C0G, 0603 10 pF Murata GRM1885C1H100JA01D
C74 to C76 Tantalum chip capacitor 100 μF Allied
Electronics
TAJB107K006R
C V P, CVRF, CAVDD, CDVDD,
CVRF1, CVVCO, CVRVCO
Tantalum capacitor surface-mount device
(SMD)
22 μF Allied
Electronics
TAJB226K016R
CN1 Connector printed circuit board (PCB),
vertical type receptacle SMD
HIROSE FX8-120S-SV(21)
DS1, LED1 LED, 570 nm, SMD (green) Avago
Technologies
HSMG-C170
GND Connector PCB, single socket (black) Del-Tron
Precision, Inc.
571-0100
L1, L2 Inductor chip 7.4 nH Coilcraft 0302CS-7N4XJLU
SCL, SDA, TP1 to TP6, PDRF,
T P _ V P, MUXOUT, TP_VRF,
TP_DVDD, TP_VRF1,
TP_VVCO, TP_+3.3V,
TP_AVDD1, TP_AVDD2
Connector PCB, test point (yellow) Components
Corporation
TP-104-01-04
P3 Connector PCB, Header 3 Molex 22-28-4033
R1, R4, R5, R12, R21, RV1 to
RV3, RV6 to RV9, R3V3,
RV11, RV12, RV14 to RV16,
RV18 to RV20, RV25 to
RV27, RV29 to RV31,
RMUXOUT
Film SMD resistor, 0603 0 Ω Multicomp MC0603WG00000T5E-TC
R11, R16, RMUX, RCPOUT,
R_VREGVCO
Resistor thick film chip 0 Ω Multicomp 0402WGF0000TCE
R14 Film SMD resistor, 0603 220 Ω Multicomp MC 0.063W 0603 1%
220R
R17 Film SMD resistor, 0603 470 Ω Multicomp MC 0.063W 0603 1%
470R

UG-802 EV-ADF5355SD1Z User Guide
Rev. B | Page 18 of 19
Reference Designator Description Value Manufacturer Part Number
R18, R19, R23 Film SMD resistor, 0603 1.8 kΩ Multicomp MC 0.063W 0603 1% 1K8
R2 Precision thick film chip, resistor R0603 10 kΩ Panasonic ERJ-3EKF1002V
R22 Film SMD resistor, 0603 68 Ω Multicomp MC 0.063W 0603 1% 68R
R25, RLE, RCLK, RDATA Precision thick film chip resistor, R0805 1.5 kΩ Panasonic ERJ-6ENF1501V
R27 High-frequency thin film chip resistor 100 Ω Vishay FC0402E1000BST1
R32, R33 Chip SMD resistor, 0201 0 Ω Panasonic ERJ-1GE0R00C
R6 Standard thick film chip resistor 5.1 kΩ Vishay CRCW04025K10FKED
RAVDD Precision thick film chip resistor, R0805 1 kΩ Panasonic ERJ-6ENF1001V
RE1, RE2 Precision thick film chip resistor, R0805 100 kΩ Panasonic ERJ-6ENF1003V
RE3 Do not install (TBD0603)1Do not install
REFINA, REFINB PCB, coaxial SMA, end launch connector Johnson 142-0701-801
RFOUTB, RFOUTA+,
RFOUTA−
PCB, SMA right angle jack connector Rosenberger 32K243-40ML5
S1 Momentary single pole single throw
switch
Alcoswitch TT11AGPC-1
U1 IC, Analog Devices microwave wideband
synthesizer with integrated VCO
Analog Devices ADF5355BCPZ
UE1 IC, 32 kB serial EEPROM Microchip
Technology, Inc.
24LC32A-I/MS
VR2 IC, 800 mA, ultralow noise/high power
supply rejection ratio (PSRR), RF linear
regulator, 5.0 V output
Analog Devices ADM7150ACPZ-5.0
VR3, VR5 IC, 800 mA, ultralow noise/high PSRR, RF
linear regulator, 3.3 V output
Analog Devices ADM7150ACPZ-3.3
VSUPPLY Connector PCB, coaxial SMA, end launch
(do not install)
Do not install
VSUPPLY_ALT PCB, single socket (red) connector Del-Tron
Precision, Inc.
571-0500
Y1 IC, crystal low voltage positive emitter
coupled logic (LVPECL)
Vectron
International
VCC6-LAB-122M880000
ZD1 Zener diode, 6.8 V, SOT-23 Philips BZX84-C6V8
1TBD means no value assigned; component not inserted.

EV-ADF5355SD1Z User Guide UG-802
Rev. B | Page 19 of 19
NOTES
ESD Caution
ESD (electrostatic discharge) sensitive device. Charged devices and circuit boards can discharge without detection. Although this product features patented or proprietary protection
circuitry, damage may occur on devices subjected to high energy ESD. Therefore, proper ESD precautions should be taken to avoid performance degradation or loss of functionality.
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UG12936-0-5/15(B)