AOC LM2028 User manual
AOC LM2028
Page 1 of 66
SERVICE MANUAL
AOC LM2028
THESE DOCUMENTS ARE FOR REPAIR SERVICE INFORMATION ONLY.EVERY
REASONABLE EFFORT HAS BEEN MADE TO ENSURE THE ACCURACY OF THIS MANUAL; WE
CANNOT GUARANTEE THE ACCURACY OFTHIS INFORMATION AFTER THE DATE OF
PUBLICATION AND DISCLAIMS RELIABILITY FOR CHANGES, ERRORS OR OMISSIONS.
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Page 2 of 66
Table of Contents
1. MONITOR SPECIFICATIONS .........................................................................................................................................4
2. LCD MONITOR DESCRIPTION ......................................................................................................................................4
3. OPERATING INSTRUCTIONS ........................................................................................................................................5
3.1 GENERAL INSTRUCTIONS ......................................................................................................................................5
3.2 ADJUSTING THE PICTURE ......................................................................................................................................5
4. INPUT/OUTPUT SPECFICATION ...................................................................................................................................7
4.1 INPUT SIGNAL CONNECTOR ..................................................................................................................................7
4.2 FACTORY PRESET DISPLAY MODES：..................................................................................................................8
4.3 PANEL SPECIFICATION ...........................................................................................................................................9
4.3.1 PANEL FEATURE...............................................................................................................................................9
4.3.2 DISPLAYS CHARACTERISTICS .......................................................................................................................9
4.3.3 OPTICAL CHARACTERISTICS .......................................................................................................................10
4.3.4 PARAMETER GUIDE LINE FOR CFL INVERTER. .........................................................................................10
5. BLOCK DIAGRAM ........................................................................................................................................................11
5.1 SOFTWARE FLOW CHART .................................................................................................................................... 11
5.2 ELECTRICAL BLOCK DIAGRAM ............................................................................................................................13
5.2.1 SCALAR BOARD BLOCK DIAGRAM ..............................................................................................................13
5.3.2 INVERTER/POWER BOARD BLOCK DIAGRAM............................................................................................14
6.SCHEMATIC ...................................................................................................................................................................16
6.1 MAIN BOARD...........................................................................................................................................................16
6.2 POWER BOARD......................................................................................................................................................22
7. PCB LAYOUT ................................................................................................................................................................26
7.1 MAIN BOARD...........................................................................................................................................................26
7.2 KEYPAD BOARD .....................................................................................................................................................26
7.3 POWER BOARD......................................................................................................................................................27
8. MAINTAINABILITY........................................................................................................................................................28
8.1 EQUIREMENT AND TOOLS REQUIREMENT ........................................................................................................28
8.2 TROUBLE SHOOTING ............................................................................................................................................29
8.2.1 Main board........................................................................................................................................................29
8.2.2 KEYPAD BOARD .............................................................................................................................................32
8.2.3 POWER/INVERTER BOARD...........................................................................................................................32
8.2.3 POWER/INVERTER BOARD...........................................................................................................................33
9. WHITE- BALANCE, LUMINANCE ADJUSTMENT ......................................................................................................35
10. EDID CONTENT ..........................................................................................................................................................36
11 BOM LIST .....................................................................................................................................................................37
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Page 3 of 66
Revision List
Version Release Date Revision History TPV Model
A00 Jun-29-2005 Initial Release TA92KAUHBAAON
A01 Nov-07-2006 Add TPV Model in item 11 TA92KAUDBAA1NP
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1. MONITOR SPECIFICATIONS
z510 mm (20.1”) a-si TFT Active matrix LCD panel, 0.255 mm dot pitch.
zMicroprocessor controlled scan technology
z19 factory modes, 19 new modes
zVertical refresh rate 55Hz to 75 Hz
zHorizontal frequency 30kHz to 80kHz
zResolutions: 640 x 480 up to 1600 x 1200 @ 60Hz
zUniversal power supply designed for worldwide application
zCE mark
zTCO99 mark
zVESA DPMS compliant
zVESA DDC2B compliant
2. LCD MONITOR DESCRIPTION
The LCD MONITOR will contain a main board, an inverter/power board, a keypad board which houses the flat panel
control logic, brightness control logic and DDC.
The power board will provide AC to DC Inverter voltage to drive the backlight of panel and the main board chips each
voltage.
Power board
(
Include: inverter，ada
p
ter
)
Flat Panel and
CCFL backlight
Main Board
Keyboard
RS232 Connector
For white balance
adjustment in factory
mode
HOST Computer
CCFL Drive.
AC-IN
100V-240V Video signal, DDC
Monitor Block Diagram
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3. OPERATING INSTRUCTIONS
3.1 GENERAL INSTRUCTIONS
Press the power button to turn the monitor on or off. The other control buttons are located at front panel of the
monitor. By changing these settings, the picture can be adjusted to your personal preferences.
-The power cord should be connected.
-Connect the video cable from the monitor to the video card.
-Press the power button to turn on the monitor, the power indicator will light up.
3.2 ADJUSTING THE PICTURE
The description for control function:
Main Menu
Item
Main Menu
Icon Sub Menu Item Sub Menu
Icon Description Adjust
Range Reset Value
Contrast
Contrast from Digital-register. 0-100 Recall Cool Contrast
Value
Luminance
Brightness
Backlight Adjustment 0-100 Recall Cool
Brightness Value
Focus
Adjust Picture Phase to reduce
Horizontal-Line noise 0-100 Do Auto Config
Image Setup
Clock
Adjust picture Clock to reduce
Vertical-Line noise. 0-100 Do Auto Config
H. Position
Adjust the horizontal position of
the picture. 0-100 Do Auto Config
Image
Position V. Position
Adjust the vertical position of the
picture. 0-100 Do Auto Config
Warm N/A
Recall Warm Color Temperature
from EEPROM. N/A
Cool N/A
Recall Cool Color Temperature
from EEPROM. N/A
User / Red
Red Gain from Digital-register. 0-100
Color Temp.
User / Green
Green Gain Digital-register. 0-100
The Color
Temperature will be
set to Cool.
The User R/G/B
value(default is 70)
will not be Modified
by Reset function in
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User / Blue
Blue Gain from Digital-register. 0-100 user mode.
Yes
N/A Auto Adjust the H/V Position,
Focus and Clock of picture. N/A N/A
Auto Config
No N/A
Do not execute Auto Config,
return to main menu. N/A N/A
H. Position
Adjust the horizontal position of
the OSD. 0-100
50 every step with
changed five DAC
value
V. Position
Adjust the vertical position of the
OSD. 0-100
50,every step with
changed five DAC
value
OSD Setup
OSD Timeout
Adjust the OSD timeout. 10-120
10 every step with
changed five DAC
value
English N/A
Set OSD display language to
English. N/A
Deutsch N/A
Set OSD display language to
German. N/A
Français N/A
Set OSD display language to
French. N/A
Español N/A
Set OSD display language to
Spain. N/A
Italiano N/A
Set OSD display language to
Italian. N/A
Language
Chinese N/A
Set OSD display language to
Simplified Chinese. N/A
The Language will
be set to English.if
customer have
strange request,pls
refer to customer.
Request.
Information
Information N/A
Show the resolution, H/V
frequency and input port of
current iput timing.
N/A N/A
Yes N/A
Clear each old status of
Auto-configuration and set the
color temperature to Cool.
N/A N/A
Reset
No N/A
Do not execute reset, return to
main menu. N/A N/A
Exit
N/A N/A Exit OSD N/A N/A
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4.INPUT/OUTPUTSPECFICATION
4.1 INPUT SIGNAL CONNECTOR
PIN NO. DESCRIPTION PI N NO. DESCRIPTION
1. Red 9. NC
2. Green 10. Logic Ground
3. Blue 11. Monitor Ground
4. Monitor Ground 12. DDC-Serial Data
5. DDC-Return 13. H-Sync
6. R-Ground 14. V-Sync
7. G-Ground 15. DDC-Serial Clock
8. B-Ground
VGA Connector layout
15
610
11 15
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4.2 FACTORY PRESET DISPLAY MODES：
VESA MODES
Horizontal Vertical
Mode Resolution Total
Nominal
Frequency
+/- 0.5kHz
Sync
Polarity
Nominal
Freq.
+/- 1 Hz
Sync
Polarity
Nominal
Pixel
Clock
(MHz)
640x480@60Hz 800 x 525 31.469 N 59.940 N 25.175
640x480@72Hz 832 x 520 37.861 N 72.809 N 31.500
VGA
640x480@75Hz 840 x 500 37.500 N 75.00 N 31.500
800x600@56Hz 1024 x 625 35.156 N/P 56.250 N/P 36.000
800x600@60Hz 1056 x 628 37.879 P 60.317 P 40.000
800x600@72Hz 1040 x 666 48.077 P 72.188 P 50.000
SVGA
800x600@75Hz 1056x625 46.875 P 75.000 P 49.500
1024x768@60Hz 1344x806 48.363 N 60.004 N 65.000
1024x768@70Hz 1328x806 56.476 N 70.069 N 75.000
XGA
1024x768@75Hz 1312x800 60.023 P 75.029 P 78.750
1280x1024@60Hz 1688x1066 63.981 P 60.020 P 108.000
SXGA
1280x1024@75Hz 1688x1066 79.976 P 75.025 P 135.000
UXGA 1600*1200 @60Hz 2160x1250 75.00 N 60.00 N 162.00
IBM MODES
Horizontal Vertical
DOS 720x400@70Hz 900 x 449 31.469 N 70.087 P 28.322
DOS 640x400@70Hz 800 x 449 31.469 N 70.087 P 25.175
XGA 1024x768@72Hz 1304 x 798 57.515 P 72.1 P 75.000
MAC MODES
VGA 640x480@67Hz 864x525 35.000 N 66.667 N 30.240
SVGA 832x624@75Hz 1152x667 49.725 N 74.551 N 57.2832
1024x768@60Hz 1312x813 48.780 N 60.001 N 64.000XGA
1024x768@75Hz 1328x804 60.241 N 74.927 N 80.000
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4.3 PANEL SPECIFICATION
4.3.1 PANEL FEATURE
－20.1 inch Color TFT-LCD
－ALL input signals are 2 Channel LVDS interface compatible
－Supports the SXGA(H1600Pixel × V1200Lines) resolution
－By applying 16.7M colors (RGB 8 bit data)
－This module does not contain an inverter card for backlight
4.3.2 DISPLAYS CHARACTERISTICS
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4.3.3 OPTICAL CHARACTERISTICS
The optical characteristics are measured under stable conditions at 25℃(Room Temperature)：
4.3.4 PARAMETER GUIDE LINE FOR CFL INVERTER.
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5. BLOCK DIAGRAM
5.1 SOFTWARE FLOW CHART
1
2
N
Y
5
Y
N
10
Y
N
12
Y
N
7
Y
N
6
4
3
8
9
14
11
13
Y
N
15
Y
N16
17
19
Y
N
18
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1). MCU initialize.
2). Is the eeprom blank?
3). Program the eeprom by default values.
4). Get the PWM value of brightness from eeprom.
5). Is the power key pressed?
6). Clear all global flags.
7). Are the AUTO and SELECT keys pressed?
8). Enter factory mode.
9). Save the power key status into eeprom. Turn on the LED and set it to green color. Scalar initialize.
10). In standby mode?
11). Update the life time of back light.
12). Check the analog port, are there any signals coming?
13). Does the scalar send out an interrupt request?
14). Wake up the scalar.
15). Are there any signals coming from analog port?
16). Display "No connection Check Signal Cable" message. And go into standby mode after the message disappears.
17). Program the scalar to be able to show the coming mode.
18). Process the OSD display.
19). Read the keyboard. Is the power key pressed?
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5.2 ELECTRICAL BLOCK DIAGRAM
5.2.1 SCALAR BOARD BLOCK DIAGRAM
OSD Control
(Keypad)
Scalar MST9251
(Include ADC, OSD)
(U403)
MCU
W78E65P-40
(U402)
D-Sub
Connector
(CN2)
EEPROM
24C02
LCD Interface
Crystal (Y1)
14.318MHz
EEPROM
AT24C16AN-10SI-2.7
(U501)
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5.3.2 INVERTER/POWER BOARD BLOCK DIAGRAM
Inverter Block Diagram
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Power Block Diagram
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6.SCHEMATIC
6.1 MAIN BOARD
03. Graphics/Components In
03. Graphics/Components In
AHS
RXC+
RX0-
VGA_SCL
DVI_CAB
RX1+
RX2-
RX0+
RXC-
AVS
DVI_SDA
VGA_CAB
RX2+
RX1-
DVI_SCL
VGA_SDA
GREEN-
SOG
RED-
RED+
GREEN+
BLUE+
BLUE-
WP_DDC_VGA
RXD
+5V
TXD
WP_DDC_DVI
+5V
FSADDR[0..11]
FSD ATAU[0..31]
07. Power
07. Power
ON_PANEL
ON_PBACK
ADJ_PWM
+5V
Panel_Power
AVDDA
AVDD_DVI
VDD_MPLL
+2. 5MVDD
AVDD_PLL
AVDDPLL2
+2. 5V_D MQ
+2. 5V_D MC
VDDC
+3. 3DV1
+3. 3DV2
+APLL
04. Frame Memory
04. Frame Memory
FSBKSEL0
FSBKSEL1
FSCLK-
/FSCAS
FSDQSU2
FSDQSU0
FSDQSU3
FSCLK+
FSDQSU1
FSDQM0
FSADDR[0..11]
/FSRAS
+2. 5V_D MQ
/FSWE
+2. 5V_D MC
FSD ATAU[0..31]
FSDQM1
FSCKE
06. MCU
06. MCU
RXD
ON_PANEL
WP_DDC_VGA
ON_PBACK
RD
WR
AD[0..3]
ALE
VGA_SCL
DVI_CAB
HWRESET
VGA_CAB
INT
TXD
VGA_SDA
+5V
WP_DDC_DVI
05. MST6251
05. MST9251
INT
ADJ_PWM
ALE
AD[0..3]
HWRESET
FSDQM1
RED-
GREEN+
GREEN-
BLUE-
RED+
BLUE+
SOG
FSDQM0
RXC-
RX2-
RX2+
RX1+
RXC+
RX0+
RX0-
RX1-
FSADDR[0..11]
FSDATAU[0..31]
WR
RD
Panel_Power
AVDDA
VDD_MPLL
AVDD_DVI
VDDC
AVDD_PLL
+3. 3DV2
+3. 3DV1
+2. 5MVDD
FSBKSEL0
AHS
FSDQSU0
FSCLK-
FSBKSEL1
DVI_SCL
AVS
/FSCAS
FSDQSU1
/FSWE
FSCLK+
FSCKE
/F SRAS
+APLL
AVDDPLL2
DVI_SDA
FSDQSU2
FSDQSU3
AD[0..3]
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GND
WP_DDC_DVI_IN
R37 100 OH M
RX2-IN
DVI_EDID
R3375 1/16W
D22
MLL5232B 5.6V
R2 10 1/16W
TP3
WP_DDC_DVI 6
+5V
+5V
R22 33 1/16W
D5
BAV99
3
1
2
93/4/7
3 VGA GND traces as Differential Pair
with VGA Analog signals(RGB).
WP_DD C_VGA_IN
GND
R18 100 OHM
D15 MLL5232B 5.6V
TP6
TXD6
C11 47nF
+5V
WP_DDC_VGA_IN
D2
BAV99
3
1
2
R17 100 OH M
VGA_SDA 6
GND
R301
30K 1/16W
DVI_5V
GND
HOT_PLUG
D10 MLL5232B 5.6V
C2 0. 1uF/ 16V
TP5
D3
BAV99
3
1
2
R21 75 1/ 16W
GND
GND
GND
VGASCL
DVISDA
R9
100K 1/16W
920623:EDID Function
GND
GND
RXC+IN
R38 1K 1/16W
D20
BAV99
3
1
2
C10
0.1uF/16V
R303
30K 1/16W
RX0-IN
D1
BAV99
3
1
2
GND
RXC-IN
C7 1nF
R3175 1/16W
DVI_SCL 5
R25 100 OHM
GND
D7
BAV99
3
1
2
TP1
WP_DDC_VGA 6
+5V
R16
10K 1/16W
R10 10 1/16W
R302
10K 1/16W
CN2
VGA_DB15
1
6
2
7
3
8
4
9
5
11
12
13
14
15
10
R5
10K 1/16W
D6
BAV99
3
1
2
VGA_SCL 6
93/4/7
Serial Resistor DVI signal
D9
MLL5232B 5.6V
R20 33 1/16W
C3 0.1uF/16V
920623:ISP Function
GND
C9 47nF
RX0+IN
D16 MLL5232B 5.6V
DVI Test Points are just SMTobs ervation points
on the traces with no stub
RED+ 5
+5V
RX2+IN
R305
4.7K 1/16W
DVI_CAB 6
C1 0.1uF/ 16V
RXD6
DVISCL
C15
33pF
R11 10 1/16W
+5V 6,7
ANALOG DDC
D13 MLL5232B 5.6V
GND
RED- 5
GND
GND
DVISCL
D14
MLL5232B 5.6V
R13
10K 1/16W
C12 47nF
R3 10 1/16W
R19 470 1/16W
VGASDA
A-BLUE
R39
NC
DIGIT A L DDC
GND
GND
U1
M24 C02W MN 6
4
81
2
3
7
6
5
GND
VCCA0
A1
A2
WP
SCL
SDA
Near the VGA Conn
CN1
DVI_CON
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
26
25
C1
C2
C3
C4
C5
RX2-
RX2+
GND
RX4-
RX4+
SCL
SDA
VS
RX1-
RX1+
GND
RX3-
RX3+
5V
GND
HP
RX0-
RX0+
GND
RX5-
RX5+
GND
RXC+
RXC-
26
25
RED
GRN
BLU
HS
GND
A
03. Graphic/Component IN
C
37Thursday , Augus t 19, 2004
Tit le
Size Docum ent Num ber Rev
Dat e: Sheet of
D19
BAV99
3
1
2
C13 47nF
RX1+IN
C8 47nF
RGB GND
Conn
狠
GND
DVI_SDA 5
C5
0.1uF /16V
RX0- 5
Graphic Inputs
R35
4.7K 1/16W
R40
2.2K 1/16W
+5V
D17
BAT54C-GS08
3
1
2
GND
R1 10 1/16W
R3275 1/16W
D18
BAV99
3
1
2
Q300
PMBS3904
AVS 5
R27 33 1/16W
GND
DVISDA
BLUE+ 5
GND
Q301
PMBS3904
VGA_SDA_IN
D23
MLL5232B 5.6V
R26 75 1/ 16W
TP4
R7 10 1/16W
GND
R4 10 1/16W
GND
R29 0
C16
220pF
920623:EDID Function
L1 120 OHM 0603
D4
BAV99
3
1
2
R30 0
R41
2.2K 1/16W
GND
R6 10 1/16W
D8
BAV99
3
1
2
RX2- 5
+5V
BLUE- 5
R24
10K 1/16W
C14 47nF
VGA_CAB 6
GND
D24
MLL5232B 5.6V
RGB SIGNAL GNDs at 2-mm from respective
RGB series Capacitors
A-RED
R15 100 OHM
VGA_5V
GND
DVI_EDID
R28 75 1/ 16W
TP2
DVI CONNECTOR
A-HS
VGA_5V
U2
M24C02WMN6
4
81
2
3
7
6
5
GND
VCCA0
A1
A2
WP
SCL
SDA
RXC+ 5
GREEN- 5
D12 MLL5232B 5.6V
R12
10K 1/16W
920702:DSN Function
A-GREEN
GND
R14 100 OHM
RX1+ 5
RX1-IN
RXC- 5
+5V
VGA_EDID
RX0+ 5
920629:EDID Addition
Protection
GND
SOG 5
R8 10 1/16W
R23
10K 1/16W
RX2+ 5
GND
GND
R34 1K 1/16W
R306
NC
GREEN+ 5
D21
MLL5232B 5.6V
C6
0.1uF/16V
VGA_EDID
A-VS
R300
10K 1/16W
D11
BAT54C-GS08
3
1
2
AHS 5
RX1- 5
VGA_SCL_IN
TP7
TP8
DVI_5V
WP_DDC_DVI_IN
GND
C4 0.1uF/ 16V
920623:Re-Name
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FSDATA27
FSDATA13
FSDATA2
FSDQM1
FSDATAU14
FSDATAU16
FSCLK+
+
TC1
22uF/16V
FSDATA25
C31
0.1uF/ 16V
FSDATAU0
C28
0.1uF/16V
FSDATAU30
/FSCAS
RN6 RP 33 X4
1
2
3
4
8
7
6
5
FSDATAU8
FSCLK-
C35
0.1uF/ 16V
C27
0.1uF/16V
FSDATA6
FSDATAU3
FSDATA21
FSDATAU29
FSDATA2
FSDATAU22
RN5 RP 33 X4
1
2
3
4
8
7
6
5
FSDATA28
FSDATA24
FSDATA16
C34
0.1uF/ 16V
+2.5V_DMQ
FSCLK-
FSDATA11
GND
FSDATAU2
R51
10K 1/16W
Place this parallel termination close to
corresponding memory IC Pins
FSDATAU10
FSDATA23
FSADDR1
RN1 RP 33 X4
1
2
3
4
8
7
6
5
FSDATA14
FSDATAU20
FSDATAU13
FSDQM11
FSDATA22
R42
150 1/16W
5%
FSDATAU26
FSDATA11
C37
0.1uF/16V
GND
GND
+2.5V_DMQ
FSCLK+
+2.5V_DMC7
FSDQM05
FSDATAU24
FSDATA5
FSDATAU3
FSDATAU2
C21
0.1uF/16V
FSDATA0
FSVREF
FSDATAU1
FSDATAU27
FSADDR6
FSDATAU17
FSDATAU11
FSDATAU13
C17
0.1uF/16V
FSDATA13
FSDATAU5
U401
EM6A9320BI-5M
M4
M5
L5
M6
M7
L8
M8
M9
M10
L7
K5
L6
A6
B5
A5
A4
B1
C2
C1
D1
J12
J11
H12
H11
F12
F11
E12
E11
E2
E1
F2
F1
H2
H1
J1
J2
D12
C12
C11
B12
A9
A8
B8
A7
A1
G12
G1
A12
A2
G11
G2
A11
M3
L4
L10
L11
M11
M1
L1
K1
K2
M12
C6
C7
D3
D10
K3
K6
K7
K10
B2
B4
B6
B7
B9
B11
D2
D11
E3
E10
F3
F10
H3
H10
J3
J10
D4
D6
D7
D9
E5
E6
E7
E8
F5
F6
F7
F8
G5
G6
G7
G8
H5
H6
H7
H8
J5
J6
J7
J8
K4
K9
A3
A10
C3
C4
C5
C8
C9
C10
D5
D8
E4
E9
F4
F9
G4
G9
H4
H9
J4
J9
B3
B10
G3
G10
K8
K11
K12
L2
L3
L9
L12
M2
A0
A1
A2
A3
A4
A5
A6
A7
A8/AP
A9
A10
A11
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQS0
DQS1
DQS2
DQS3
DM0
DM1
DM2
DM3
BA0
BA1
CK
CK#
CKE
CS#
RAS#
CAS#
WE#
VREF
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
FSCKE5
FSDATA17
FSADDR3
FSBKSEL05
3
RN2 RP 33 X4
1
2
3
4
8
7
6
5
FSDATA30
FSDATAU[0..31]
FSDATA16
FSDATA20
RN8 RP 33 X4
1
2
3
4
8
7
6
5
FSDATAU28
FSADDR7
C23
0.1uF/16V
FSDATA26
C36
0.1uF/ 16V
Near The
DDR-SDRAM IC
Stub as short as
possible.
FSADDR10
FSDATAU15
FSADDR11
FSADDR2
FSDATA10
FSDATAU27
C29
0.1uF/ 16V
/F SCAS5FSDATAU16
FSDATA29
FSDATA23
FSDATAU6
FSDATAU5
FSDATA15
FSDATAU7
C24
0.1uF/16V
1
FSDATA7
+2.5V_DMC
FSVREF
FSDATA8
FSCKE
C33
0.1uF/ 16V
FSDATA21
FSDATAU26
FSDATA22
GND
FSDATA31
FSDATA12
FSDATA8
Near The DDR-SDRAM IC
FSDATA17
FSDATA5
A
04. Frame Memory
B
47Wednesday , August 18, 2004
Tit l e
Size Document Number Rev
Date: Sheet of
FSDATA25
FSDQM0 FSDATAU4
FSDATAU0
FSDQS1
FSBKSEL0
C18
0.1uF/16V
R43 0 ohm
FSCLK+5
FSDATAU23
FSDATA18
FSDQM00
R48 33 1/16W
C20
0.1uF/16V
FSDATAU20
FSDQSU05
GND
FSDQS3
FSDATAU25
FSDATAU29
FSDATAU12
FSDATA7
FSDATAU9
FSDQSU25
/FSRAS
FSDATA10
FSDATA28
FSDATAU1
FSADDR0
RN7 RP 33 X4
1
2
3
4
8
7
6
5
+2. 5V_DMQ7
FSDATAU31
FSDATAU30
FSDATAU22
FSDATAU14
FSDATA4
+2.5V_DMC
FSDATAU9
FSDATAU31
FSDATA15
FSDATA24
+2.5V_DMQ
FSDATA6
R44 0 ohm
FSDATAU6
C22
0.1uF/16V
FSADDR[0..11]5
FSDATA[0..31]
/FSWE
FSADDR9
FSDATAU19
R45 0 ohm
FSDATA27
FSADDR4
FSADDR8
FSDATAU24
FSDATA19
FSDATAU25
FSDATA1
C19
0.1uF/16V
R50 33 1/16W
FSDATAU12
FSDATAU10
FSDATAU21
FSDATA3
FSDATA29
FSDATA14
FSDATAU11
FSADDR5
FSDQSU15FSDATA3
FSDATA31
FSDATAU19
FSDATA4
FSDQS0
GND
FSDATA0
R47 33 1/16W
FSDATAU17
FSDQS2
FSDATAU15
FSDATAU7FSDQM10
R52
10K 1/16W
2
FSDATA9
FSDATA9
FSDQM01
C25
0.1uF/16V
/FSWE5
0
C26
0.1uF/16V
C30
0.1uF/ 16V
C32
0.1uF/ 16V
FSCLK-5
GND
+
TC 2
22uF/16V
/F SRAS5
FSDATA30
FSBKSEL1
RN3 RP 33 X4
1
2
3
4
8
7
6
5
FSDATA26
FSDATA1
FSDATAU23
FSDATAU4
FSDATAU18
R49 33 1/16W
R46 0 ohm
FSDQM15
Near The DDR-SDRAM IC
FSDATAU21
FSDATAU[0..31]5
RN4 RP 33 X4
1
2
3
4
8
7
6
5
FSBKSEL15
FSDATAU18
FSDATA18
FSVR EF
FSDATAU28
FSDATAU8FSDATA19
FSDQSU35
FSDATA12
FSDATA20
英华家电维修资料专用 QQ:505966338
AOC LM2028
Page 19 of 66
RX0+
C42
0.1uF /16V
RXC-3
FSDATAU16
C40 0.1uF /16V
SOG3
TXB2+
C46
0.1uF/ 16V
FSDATAU[0..31] 4
L2
600 OHM BEAD
R59 100 1/16W
GREEN-3
CONNECTOR for PANEL
TXB0+
FSDATAU8
FSADDR7
AD3
FSDQM0U
RX1-
TXB0+
FSDATAU14
RXC+
ADJ_PWM7ADJ_PW M
FSDATAU28
FSADDR0
VDDC
AD0
FSDATAU0
ALE
GND
RXC-
FSADDR4
TXA3-
TXA0+
RX0+3
MVr ef
FSADDR4
R53
390 1% 1/16W
FSBKSEL0 4
FSDQSU2 4
AVDD_DVI
FSADDR2
ALE6
FSCLK-
FSDATAU18
FSDQSU3 4
TXA0+
TXA3+
HWRESET6
+3.3 DV1 7
FSADDR11
/FSWE
R54 33 1/16W
FSDATAU10
/FSR AS
BLUE+3
(5mm)
TXBC+
TXA2+
FSDATAU29
R62
1K 1/16W
+
TC3
47uF/25V
FSADDR[0..11]4
TXB1-
TXA2+
RED+3
AVDDPLL2 7
TXA0-
/FSC AS
+3.3 DV27
LVDS Panel connector
Inte r face s dire ctly to SXGA
and UXGA LVDS Panels
TXBC-
RX0-3
AVS3
RD
FSDATAU19
FSADDR9
RX2-
FSCLK+ 4
FSCLK+, FSCLK- should be routed
like a diffe r e ntail pair
+APLL
FSDATAU30
FSADDR5
TXB0-
AVDD_PLL7
MVr ef
TXA3-
FSADDR8
TXB3+
FSDQSU1 4
TXA0-
TXB2-
DVI_SDA3
HWR ESET
TXAC -
R60
10K 1/16W
AD3
FSADDR10
FSDATAU24
TXBC-
FSADDR6
FSDATAU23
AVDD_DVI
FSADDR3
XTA L
+3.3DV2
TXA2-
ALE
Unloade d trace im pe dance on this inte r face is 90 Ohm
Load ed tr ace im pedace w ith DRAM load is 65 Ohm (for 2.5 inch total trace
length)
FSDATAU27
TXAC+
RD6
FSADDR5
AD[0..3]
TXA1+
AD1
FSDATAU1
C39
0.1uF/ 16V
TXB0-
FSDATAU9
RX0-
AD1
TXA1+
FSBKSEL1
FSDATAU5
C4522pF
C44
22pF FSBKSEL1 4
A
05. MST9251
C
57Friday , August 20, 2004
Tit l e
Size Doc ument Number Rev
Date: Sheet of
TXAC +
FSADDR11
FSDQM0 4
RX2+3
FSDATAU[0..31]
RX1+
AD2
CN3
LCD HEAD ER 12X2.Norm al
2
4
6
8
10
12
14
16
18
20
22
24
1
3
5
7
9
11
13
15
17
19
21
23
Panel_Power7
FSCKE
C41 0.1uF /16V
RX1-3
GREEN+3
AVDDA
TXB2+
FSADDR3
TXB2-
TXA2-
FSDQM1U
MVref
/FSRAS 4
TXB3-
DVI_SCL3
RX0-
FSDATAU22
RED-3
+APLL7
FSBKSEL0
TXA1-
FSDQM1 4
AD0
INT
C47
0.01uF
+3.3 DV1 AVD D_PLL
TXA1-
FSDATAU12
VDD_MPLL7
AVDD_DVI7
/FSWE 4
WR
RD
VGA INPUT
TXBC+
WR6
/FSCAS 4
GND
RXC+
FSDATAU4
FSDATAU25
FSDATAU21
U403
MST9251
LVA1P
LVA2M
LVA2P
LVACKM
LVACKP
LVA3M
LVA3P
LVB1P
LVB2M
LVB2P
LVBCKM
LVBCKP
LVB3M
LVB3P
VDDC
GND
VI_DATA[11]
VI_DATA[10]
VI_DATA[9]
VI_DATA[8]
REFM
REFP
RMID
VSYNC0
HSYNC1
DDCD_CK
DDCD_DA
REXT
DVI_CK-
DVI_CK+
DVI_B-
DVI_B+
RIN1M
RIN1
GIN1M
GIN1
SOGIN1
BIN1M
BIN1
VSYNC1
GND
DVI_R-
DVI_G+
DVI_G-
DVI_R+
HSYNC0
RIN0
RIN0M
SOGIN0
GIN0
GIN0M
BIN0
BIN0M
VI_DATA[12]
VI_DATA[13]
VI_DATA[14]
VI_DATA[15]
GND
AVDD_APLL
GPIO[5]/VHS
VI_DATA[0]
VI_DATA[1]
AVDD_DVI
AVDD_ADC
VDDC
AVDD_ADC
VDDC
VDDM
AVDD_PLL2
VDDM
VI_DATA[2]
AVDD_MPLL
VDDM
VDDC
VI_DATA[4]
VI_DATA[5]
VI_DATA[6]
VI_DATA[7]
GND
GND
AVDD_PLL
GND
VI_DATA[3]
GND
GND
GND
GND
GND
GND
GND
GND
BYPASS
LVA1M
VDDC
VDDM
AVDD_DVI
GND
LVA0P
LVA0M
GND
GND
GND
GND
VCTRL
HWR ESET
INT
ALE
RDZ
WRZ
DBUS[0]
DBUS[1]
DBUS[2]
DBUS[3]
GPIO[3]/VDE
GPIO[1]/FIELD
PWM1
MDATA[15]
MDATA[14]
MDATA[13]
MDATA[12]
MDATA[11]
MDATA[10]
MDATA[ 9 ]
MDATA[ 8 ]
MDATA[ 7 ]
MDATA[ 6 ]
MDATA[ 5 ]
MDATA[ 4 ]
MDATA[ 3 ]
MDATA[ 2 ]
MDATA[ 1 ]
MDATA[ 0 ]
DQM[0]
MCLKE
MCLK
BADR[1]
BADR[0]
RASZ
CASZ
WEZ
MADR[0]
MADR[1]
MADR[2]
MADR[3]
MADR[4]
MADR[5]
MADR[6]
MADR[7]
MADR[8]
MADR[9]
MADR[10]
GND
LVB1M
LVB0P
LVB0M
VDDP
VDDC
XO U T
XI N
GND
GPIO[4]/VCLK2
VI_CK
GND
GPIO[2]/VVS
DQS[3]
MDATA[31]
MDATA[30]
MDATA[29]
MDATA[28]
VDDM
GND
MDATA[27]
MDATA[26]
MDATA[25]
MDATA[24]
MDATA[23]
MDATA[22]
GND
VDDM
MDATA[21]
MDATA[20]
MDATA[19]
MDATA[18]
MDATA[17]
MDATA[16]
DQS[2]
DQM[1]
MCLKZ
MVR EF
MADR[11]
DQS[1]
DQS[0]
PWM0
VDDC
GND
VDDP
GND
VDDP
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
FSDATAU13
TXB1-
TCL K
VDDC 7
uP IN TERFACE
HWRESET
FSDATAU20
FSADDR7
RX2+
AD2
FSDQSU0 4
TXAC-
FSDATAU15
FSDATAU7
FSADDR8
RX2-3RX1+
R55 33 1/16W
INT6
+2. 5MVD D
VDD_MPLL
RX1-
FSDATAU11
C38
0.1uF/ 16V
AVDDPLL2
TXB3-
FSDATAU31
+2.5 MVDD
FSADDR9
INT
FSDATAU2
+2.5 MVDD7
MVref
RX2-
FSADDR1
FSADDR6
BLUE-3
FSCLK- 4
FSADDR2
R61
1K 1/16W
RX1+3TXB1+
AD[0..3]6
AHS3
FSDATAU26
FSDATAU3
DVI INPUT
RXC-
TXB1+
For AOC LCD I/F-
F/W default set Odd/Even Swap.
4/13/93
RXC+3
GND
FSCKE 4
TXB3+
TXA3+
RX0+
FSADDR1
FSDATAU6
RX2+
FSDATAU17
FSCLK+
C43
0.1uF/ 16V
Y1
14.318MHz
Remove Addr/Comm
RN9/RN10/RN11/RN12/RN13
04/13
WR
FSADDR10
FSADDR0
AVDDA7
英华家电维修资料专用 QQ:505966338
AOC LM2028
Page 20 of 66
Q2
MMBT3906
3 2
1
C356100pF
12
OSD_S1(POWER)
ON_PBACK
VMCU
LED1
OSD_S5(AUTO)
R81
10K 1/16W
INT5
PWR _Y
R79 4.7K 1/16W
VMCU
R72
4.7K 1/16W
VMCU
RXD
OSD_S3(LEFT)
R78
NC
VMCU
RESET
Q3
PMBS3904
32
1
ACTIVE HIGH /RESET
R704.7K 1/16W
HWRESET5
AD3
C351100pF
12
A
06. MCU
Custom
67Friday , August 27, 2004
Tit le
Size Document Number Rev
Dat e: Sheet of
HWRESET
OSD_S1(POWER)
U501
24C16
1
2
3
4 5
6
7
8
A0
A1
A2
GND SDA
SCL
WP
VCC
R80
470 1/16W
ON_PBACK7
WP
3
VCC
+5V
R74
470 1/16W
R272 470 1/16W
RXD
R307
4.7K 1/16W
VGA_SDA 3
OSD_S4(RIGHT)
WR
OSD_S2(MENU)
OSD_S6(SOURCE)
R664.7K 1/16W
WP_MCU
OSD_S3(LEFT)
AD0
C51 22pF
IR_DATA
C355100pF
12
R275 470 1/16W
1
GND
VMCU
WP_DDC_VGA
C50
NC(2.2uF/16V)
VMCU
R76 100 1/16W
VMCU
AD2
TXD 3
DVI_CAB
OSD_S1(POWER)
600 OHM
920629:EDID Addition
Protection
IR1
WP
OSD_S6(SOURCE)
GND
R75
100 1/16W
R274 470 1/16W
AD[0..3]
600 OHM
UCLK
WP_MCU
C354100pF
12
MSD A
R68 NC
VMCU
VMCU
OSD_S6(SOURCE)
VGA_CAB
RD 5
+
TC 5
22uF/16V
L3
600 OHM
MSD A
POWER FOR MCU
VMCU
AD[0..3] 5
Near the VGA Connector.
(ISP & DDC-CI)
2
RESET
WP_DDC_DVI
OSD_S3(LEFT)
CN9
CONN
1
2
3
C353100pF
12
R644.7K 1/16W
MSC L
R71
4.7K 1/16W
R82
10K 1/16W
GND
OSD_S4(RIGHT)
RN9
RP10K X4
1
2
3
4
8
7
6
5
U402
W78E65P-40
EA/VP
X1
X2
RESET
INT0/P3.2
INT1/P3.3
T0/ P3 . 4
T1/ P3 . 5
P1.0
P1.1
P1.2
P1.3
P1.4
P1.5
P1.6
P1.7
P0.0
P0.1
P0.2
P0.3
P0.4
P0.5
P0.6
P0.7
P2.0
P2.1
P2.2
P2.3
P2.4
P2.5
P2.6
P2.7
RD/P3.7
WR/P3.6
PSEN
ALE/P
TXD/ P 3. 1
RXD/P3.0
P4.2
P4.3/ISP
P4.0
P4.1
GND VCC
VMCU
Y224.576MHz
PWR _R
OSD_S2(MENU)
C52
0.1uF/ 16V
12
MSC L
TXD
WP_DDC_VGA3
OSD_S5(AUTO)
DIO/MA730
OSD_S2(MENU)
VMCU
RD
C49 22pF
EA/VP
C352100pF
12
R277 470 1/16W
C54
0.1uF/ 16V
LED2
R69 NC
LED2
VMCU
OSD_S4(RIGHT)
WR 5
VMCU
INT
IR
TXD
LM810M3-2.93V
OSD_S2(MENU)
IR_DATA
For MST
RESET
Ke y P ad co n n e c t o r
D25
NC
CN5
CONN
2
4
6
8
10
1
3
5
7
9
C53 0.1uF/16V
R674.7K 1/16W
VGA_CAB3
R73
10K 1/16W
R77 100 1/16W
RXD 3
ON_PANEL7ON_PANEL
OSD_S3(LEFT)
OSD_S5(AUTO)
OSD_S4(RIGHT)
PWR_R
AD1
+5V3,7
For Bank Select
Syntek 128kB
Issue
ALE5
VGA_SCL 3
WP_DDC_DVI 3
RESET IC
R63
8.2K 1/16W
920701:MCU ESD & Driver
Protection
PWR _Y
+
TC 4
10uF/16V
C48
0.1uF/ 16V
OSD_S1(POWER)
R276 470 1/16W
LED2
CN10
GPROBE
NC
1
2
3
4
For AOC
CN4
ら稸
BL106-10-Key Pad
1
2
3
4
5
6
7
8
9
10
U4
AS M8 10 MEU R - T
1
2
3GND
(RESET)RESET
VCC
Debug port
OSD_S5(AUTO)
OSD_S6(SOURCE)
R273 470 1/16W
Q1
MMBT3906
3 2
1
+5V
ALE
LED1
DVI_CAB3
LED1
R654.7K 1/16W
英华家电维修资料专用 QQ:505966338
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