Apogee DX-1060 User manual

DDX-1080/DDX-1060/DDX-1050
All-Digital High Efficiency Power Amplifiers
Specifications are subject to change without notice.
129 Morgan Drive, Norwood, MA 02062 voice: [phone] fax: [phone] email: [email protected]
CONTROLLED DOCUMENT: P_903-000044_Rev08 DDX-1080_60_50 Data Sheet.doc DRN: PRELIMINARY Page 1 of 13
FEATURES
• HIGH OUTPUT CAPABILITY
• DDX
®
Full-Bridge Mode:
* DDX-1080: 1 x 90 / 80 W, 8Ω/6Ω, < 10% THD
* DDX-1060: 1 x 80 / 62 W, 8Ω/6Ω, < 10% THD
* DDX-1050: 1 x 65 / 50 W, 8Ω/6Ω, < 10% THD
• Binary Half-Bridge Mode:
* DDX-1080: 2 x 45 W, 4Ω, < 10% THD
* DDX-1060: 2 x 40 W, 4Ω, < 10% THD
* DDX-1050: 2 x 32 W, 4Ω, < 10% THD
• SINGLE SUPPLY (+9V to +40V)
• COMPACT SURFACE MOUNT PACKAGE
• HIGH EFFICIENCY, > 90% @ 8 ohms
• THERMAL OVERLOAD PROTECTION
• SHORT CIRCUIT PROTECTION
BENEFITS
• COMPLETE SURFACE MOUNT DESIGN
• POWER SUPPLY SAVINGS
APPLICATIONS
• DIGITAL POWERED SPEAKERS
• PC SOUND CARDS
• CAR AUDIO
• SURROUND SOUND SYSTEMS
• DIGITAL AUDIO COMPONENTS
1.0 GENERAL DESCRIPTION
The DDX-1080, DDX-1060 and DDX-1050 power
devices are monolithic, single channel H-Bridges
that can provide audio power up to:
• 90 watts one channel @10%THD, 8Ω(DDX-1080)
• 80 watts one channel @10%THD, 8Ω(DDX-1060)
• 65 watts one channel @10%THD, 8Ω(DDX-1050)
at very high efficiency.
Each device contains a logic interface, integrated
bridge drivers, high efficiency MOSFET output
transistors and protection circuitry. Each device
may be used in DDX® Mode as a single bridge or,
alternatively in Binary Mode, it may be configured
as either a single bridge or (at lower power output)
a dual half-bridge.
The benefits of the DDX® amplification system are:
an all-digital design that eliminates the need for a
digital to analog converter (DAC), and the high
efficiency operation derived from the use of
Apogee's patented damped ternary pulse width
modulation (PWM). This approach provides an
efficiency advantage over conventional PWM
designs of more than three times the efficiency of
typical Class A/B amplifiers with music input
signals.
FAULT
PROTECTIO
N
AND
DRIVER
LOGIC
TRISTATE
CONFIG
BIAS
PGNDP
OUTP
OUTP
VCCP
PGNDN
OUTN
OUTN
VCCN
PWRDN
TWARN
INA
INB
VREG2
VREG2
VREG1
VREG1
GNDREF
VSIG
GNDR1
FET
DRIVE
REGULATORS
FET
DRIVE
PROTECTION
AND
DRIVER
LOGIC
Figure 1 - Block Diagram

DDX-1080/DDX-1060/DDX-1050
Specifications are subject to change without notice.
129 Morgan Drive, Norwood, MA 02062 voice: [phone] fax: [phone] email: [email protected]
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1.1 Absolute Maximum Ratings [Note 1]
SYMBOL PARAMETER VALUE UNIT
V
CC
Power supply voltage 45 V
V
L
Input logic reference 5.5 V
P
TOT
Power Dissipation, T
heat-spreader
= 25°C [See Figure 4] 50 W
T
j
Operating junction temperature range 0 to +150 °C
T
stg
Storage temperature range -40 to +150 °C
Note 1 - Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are exceeded.
Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
1.2 Recommended Operating Conditions [Note 2]
SYMBOL PARAMETER MIN TYP MAX UNIT
V
CC
Power supply voltage 9.0 40.0 V
V
L
Input logic reference 2.7 3.3 5.0 V
T
A
Ambient Temperature 0 70
°C
Note 2 - Performance not guaranteed beyond recommended operating conditions.
1.3 Thermal Data
SYMBOL PARAMETER MIN TYP MAX UNIT
θ
J-C
Thermal resistance, junction-to-case (heat spreader) 2.5 °C/W
T
j-SD
Thermal shut-down junction temperature 150 °C
T
WARN
Thermal warning temperature 130
°C
T
hSD
Thermal shut-down hysteresis 25 °C
1.4 Electrical Characteristics. [Refer to circuit in Figure 14] Unless otherwise specified, performance is measured
using the DDX-8001/DDX-8229 processor family, V
CC
=34V, VL=3.3V, fsw=384kHz, T
C
=25°C, R
L
=8Ω.
CONDITIONS
SYMBOL PARAMETER
V
CC
THD+N R
L
MIN TYP MAX UNIT
<10% 90
DDX-1080 - Power Per Channel
[Note 3] 40V <1% 8Ω72
<10% 80
DDX-1080 - Power Per Channel
[Note 4]
32V <1% 6Ω62
<10% 80
DDX-1060 - Power Per Channel
[Note 4]
37V <1% 8Ω62
<10% 62
DDX-1060 - Power Per Channel
[Note 4]
29V <1% 6Ω50
<10% 65
P
O-DF
(DDX
®
Full Bridge
Mode)
[Figure 14]
DDX-1050 - Power Per Channel
[Note 4] 33V <1% 8Ω50
W
RMS
<10% 45
DDX-1080 - Power Per Channel 40V <1% 4Ω35
<10% 40
DDX-1060 - Power Per Channel
[Note 4] 37V <1% 4Ω32
<10% 32
P
O-Bin
(Binary Half-
Bridge Mode)
[Figure 16] DDX-1050 - Power Per Channel
[Note 4] 32V <1% 4Ω25
W
RMS
Note 3 - Maximum Power Limited to < 1 second.
Note 4 – Power Output Limited by Minimum Current Limit.

DDX-1080/DDX-1060/DDX-1050
Specifications are subject to change without notice.
129 Morgan Drive, Norwood, MA 02062 voice: [phone] fax: [phone] email: [email protected]
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1.4 Electrical Characteristics (continued) [Refer to circuit in Figure 14] Unless otherwise specified, performance is
measured using the DDX-8001/DDX-8229 processor family, V
CC
=34V, V
L
=3.3V, fsw=384kHz, T
C
=25°C, R
L
=8Ω.
SYMBOL PARAMETER CONDITION MIN TYP MAX UNIT
Po = 1 Wrms 0.06
THD+N Total Harmonic Distortion + Noise,
[Note 5]
Po = 50 Wrms 0.08 %
Signal to Noise Ratio,
DDX
®
Mode 98
SNR Signal to Noise Ratio, Binary Half-
Bridge Mode, [Note 5]
A-Weighted
(relative to full scale) 92
dB
Peak Efficiency, DDX
®
Mode Po = 1 x 65 W, 8Ω,
10% THD 90
η Peak Efficiency,
Binary Half-Bridge Mode
Po = 2 x 32 W, 4Ω,
10% THD 88
%
DDX-1080 4.5 6 8
DDX-1060 4.0 6 8
I
SC
Speaker Output Short-Circuit
Protection Limit per Bridge DDX-1050 3.5 6 8
A
R
ds-on
Power MOSFET output resistance I
d
= 1A 200 270 mΩ
g
N
Power Nchannel R
ds-on
matching I
d
= 1A 95 %
g
P
Power Pchannel R
ds-on
matching I
d
= 1A 95 %
I
dss
Power Pchannel/Nchannel leakage V
CC
= 35 V 50 uA
UVL Under-voltage Lockout Threshold 7 9 V
I
PD
V
CC
supply current, Power-down PWRDN = 0 1 3 mA
I
CC-tri
V
CC
supply current, Tri-state TRISTATE = 0 22 mA
DDX
®
mode V
CC
supply current 1-Channel switching at
384kHz. 49
I
CC
Binary mode V
CC
supply current 2-Channel switching at
384kHz. 53
mA
t
on
Turn-on delay time Resistive load 100 ns
t
off
Turn-off delay time Resistive load 100 ns
t
r
Rise time Resistive load 25 ns
t
f
Fall Time Resistive load 25 ns
Low logic input voltage:
PWRDN, TRISTATE pins
V
L
= 2.7V
V
L
= 3.3V
V
L
= 5.0V
0.7
0.8
0.85
V
IL
Low logic input voltage:
INA, INB pins
V
L
= 2.7V
V
L
= 3.3V
V
L
= 5.0V
1.05
1.35
2.2
V
High logic input voltage:
PWRDN, TRISTATE pins
V
L
= 2.7V
V
L
= 3.3V
V
L
= 5.0V
1.5
1.7
1.85
V
IH
High logic input voltage:
INA, INB pins
V
L
= 2.7V
V
L
= 3.3V
V
L
= 5.0V
1.65
1.95
2.8
V
I
fault
Output Sink Current, FAULT,
TWARN pins Fault Active 1 mA
P
Wmin
Minimum output pulse width No load 70 150 ns
Note 5 – Performance Characteristics obtained using a DDX-8001/DDX-8229 controller.
1.5 Logic Truth Table
TRISTATE InA InB OUTP OUTN OUTPUT MODE
0 X X OFF OFF Hi-Z
1 0 0 GND GND DAMPED
1 0 1 GND VCC NEGATIVE
1 1 0 VCC GND POSITIVE
1 1 1 VCC VCC Not Used

DDX-1080/DDX-1060/DDX-1050
Specifications are subject to change without notice.
129 Morgan Drive, Norwood, MA 02062 voice: [phone] fax: [phone] email: [email protected]
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2.0 DDX-1080, DDX-1060 and DDX-1050 Pin Function Description:
2.1 PWM Inputs
Pin No. Description
INA 31 A logic input signal
INB 32 B logic input signal
2.2 Control/Miscellaneous
Pin Name Pin No. Description
PWRDN 25 Power Down (0=Shutdown, 1= Normal).
TRI-STATE 26 Tri-State (0=All MOSFETS Hi-Z, 1=Normal).
FAULT [Note 6] 27 Fault output indicator; Overcurrent, Overvoltage or Overtemperature
(0=Fault, 1=Normal).
TWARN [Note 6] 28 Thermal warning output
(0=Warning T
J
>= 130°C, 1=Normal).
Note 6: FAULT and TWARN outputs are open-drain
2.3 Power Outputs for DDX
®
Mode or Binary Full Bridge Mode [Note 7]
OR Binary Half-Bridge Mode [Note 8]
Pin Name Pin No. Description
OUTA 8, 9 A output: DDX/Binary positive reference OR ½ bridge positive reference
OUTB 2, 3 B output: DDX/Binary negative reference OR ½ bridge positive reference
Note 7: DDX® and Binary Full-Bridge outputs are bridged. The output OUTA produces signals in phase
with the input. The output OUTB produces signals out of phase with the input.
Note 8: Half-Bridge Binary Mode outputs are NOT bridged. All outputs produce signals in phase with the
respective inputs.
2.4 Power Supplies
Pin Name Pin No. Description
VCC 4, 12, 15 Power
PGND 5, 6, 13 Power grounds
VREG1 21, 22
Internal 5V regulator voltage (referred to Ground)
requires bypass capacitor.
VREG2 33, 34
Internal 5V regulator voltage (referred to VSIG)
requires bypass capacitor.
VSIG 35, 36 Signal Positive supply.
VL [Note 11] 23 Logic reference voltage.
GNDREF 19 Logic reference ground.
GNDS 1 Substrate ground.
GNDR1 20 Internal regulator ground.
N.C.
7, 10, 11, 14,
16, 17, 18, 24,
29, 30
No Connection
Note 9: V
L
(Logic Reference Voltage) is recommended to be powered and stable prior to Vcc achieving >
7V to assure proper power up sequence. V
L
is recommended to remain powered and stable until
after Vcc has decayed below 7V during power removal.

DDX-1080/DDX-1060/DDX-1050
Specifications are subject to change without notice.
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3.0 DDX-1080, DDX-1060 and DDX-1050 POWER DEVICES
The DDX-1080, DDX-1060 and DDX-1050 Power Devices are single channel H-Bridges that can
deliver more than 90/80/65 watts per channel (<10%THD) of audio output power at very high efficiency.
They convert both DDX
®
and binary-controlled PWM signals into audio power at the load. Each
includes a logic interface, integrated bridge drivers, high efficiency MOSFET outputs, and thermal and
short circuit protection circuitry. In DDX
®
mode, two logic level signals per channel are used to control
high-speed MOSFET switches to connect the speaker load to the input supply or to ground in a bridge
configuration, according to Apogee’s patented damped ternary PWM. In Binary Mode operation, both
Full Bridge and Half Bridge Modes are supported. These devices include over-current and thermal
protection as well as under-voltage lockout with automatic recovery. A thermal warning status is also
provided.
Logic I/F
and Decode
H-Bridge
Protection
Circuitry
INA[1:2]
INB[1:2]
PWRDN
OUTA
FAULT
VL
TRI-STATE
OUTB
TWARN
Regulators
Logic I/F
and Decode
A
½-Bridge
Protection
Circuitry
INA[1:2]
INB[1:2]
PWRD
N
OUTA
FAUL
T
V
L
TRI-STAT
E
OUTB
TWARN
Regulators
B
½
-
Bridge
Figure 2 – DDX-1080, DDX-1060 and DDX-1050
Block Diagram, Full- Bridge DDX
®
or Binary Modes
Figure 3 – DDX-1080, DDX-1060 and DDX-1050
Block Diagram, Binary Half-Bridge Mode
3.1 Logic Interface and Decode
The DDX-1080, DDX-1060 and DDX-1050 power outputs are controlled using one or two logic level
timing signals. In order to provide a proper logic interface, the V
L
input must operate at the same
voltage as the DDX
®
controller logic supply. VL (Logic Reference Voltage) is recommended to be
powered and stable prior to Vcc achieving > 7V to assure proper power up sequence. VL is
recommended to remain powered and stable until after Vcc has decayed below 7V during power
removal.
3.2 Protection Circuitry
The DDX-1080, DDX-1060 and DDX-1050 include protection circuitry for over-current and thermal
overload conditions. A thermal warning pin TWARN is activated low (open-drain MOSFET) when the
IC temperature exceeds 130°C, in advance of the thermal shutdown protection. When a fault condition
is detected (logical OR of over-current and thermal), an internal fault signal acts to immediately disable
the output power MOSFETs, placing both H-bridge in a high impedance state. At the same time an
open-drain MOSFET connected to the FAULT pin is switched on.
There are two possible modes subsequent to activating a fault. The first is a SHUTDOWN mode. With
FAULT (pull-up resistor) and TRI-STATE pins independent, an activated fault will disable the device,
signaling low at the FAULT output. The device may subsequently be reset to normal operation by
toggling the TRI-STATE pin from High to Low to High using an external logic signal.
The second is an AUTOMATIC recovery mode. This is depicted in the application circuit in Figure 14.
The FAULT and TRI-STATE pins are shorted together and connected to a time constant circuit
comprising R
T
and C
T
. An activated FAULT will force a reset on the TRI-STATE pin causing normal

DDX-1080/DDX-1060/DDX-1050
Specifications are subject to change without notice.
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operation to resume following a delay determined by the time constant of the circuit. If the fault
condition is still presented, the circuit operation will continue repeating until such time as the fault
condition is removed. An increase in the time constant of the circuit will produce a longer recovery
interval. Care must be taken in the overall system design so as not to exceed the protection thresholds
under normal operation.
3.3 Power Outputs
The DDX-1080, DDX-1060 and DDX-1050 power and output pins are duplicated to provide a low
impedance path for the device’s bridged outputs. All duplicate power, ground and output pins must be
connected for proper operation. The PWRDN or TRI-STATE pins should be used to set all MOSFETS
to the Hi-Z state during power-up until the logic power supply, V
L
, is settled.
3.4 ADDITIONAL INFORMATION
3.5 Output Filter
A passive two-pole low-pass filter is used on the DDX-1080, DDX-1060 and DDX-1050 power outputs
to reconstruct an analog signal. System performance can be significantly affected by the output filter
design and choice of components. (See appnote: AN-15, Component Selection for DDX Amplifiers.) A
filter design for 6Ω/8Ωloads is shown in the Typical Application Circuit in Figure 14. Figure 16 shows a
filter for ½ bridge mode, 4Ωloads.
3.6 Power Dissipation &
Heat Sink Requirements
The power dissipated within the
device will depend primarily
on the supply voltage, load
impedance, and output
modulation level.
The surface mount package of
the DDX-1080, DDX-1060 and
DDX-1050 include an exposed
thermal slug on the top of the
device to provide a direct
thermal path from the
integrated circuit to the
heatsink. Careful consideration
must be given to the overall
thermal design. See Figure 4
for power derating.
For additional thermal design considerations, see: AN19, Power Device Thermal Calculator.
For additional design considerations with binary mode operation, see application note:
AN-16, Applying the DDX-8000/DDX-8228 in Binary Mode.
0
10
20
30
40
50
60
0 102030405060708090100110120130140150
Slug Temperature Tc (°C)
Device Internal Dissipation (W)
Figure 4 – Power Derating Curve (Typical)

DDX-1080/DDX-1060/DDX-1050
Specifications are subject to change without notice.
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10 15 20 25 30 35 40
0
10
20
30
40
50
60
70
80
90
100
Full Brid
g
e Mode - Out
p
ut Power vs Su
pp
l
y
Volta
g
e, THD+N<1%
Power Supply Voltage (VDC)
Output Power (RMS Watts)
4Ω6Ω8Ω
LEGEND:
DDX-1050, Iout(min) = 3.5A R
L
= 8ΩR
L
= 6ΩR
L
= 4Ω
DDX-1060, Iout(min) = 4.0A R
L
= 8ΩR
L
= 6ΩR
L
= 4Ω
DDX-1080, Iout(min) = 4.5A R
L
= 8ΩR
L
= 6ΩR
L
= 4Ω
All devices, Iout(typ) = 6A R
L
= 8ΩR
L
= 6ΩR
L
= 4Ω
Figure 5 - Full Bridge Output Power vs. Supply Voltage, <1% THD.
Figure 5 shows the full-scale output power (0 dB FS digital input with unity amplifier gain) as a function
of Power Supply Voltage for 4, 6, and 8 Ohm loads in either DDX
®
Mode or Binary Full Bridge Mode.
Output power is constrained for higher impedance loads by the maximum voltage limit of the
DDX-1080, DDX-1060 and DDX-1050 ICs and by the over-current protection limit for lower impedance
loads. The minimum threshold for the over-current protection circuit is 4.5/4.0/3.5A (at 25 ºC) but the
typical threshold is 6A. Solid curves depict typical output power capability of each device. Dotted and
dashed curves depict the output power capability constrained to the minimum current specification of
the DDX-1050, DDX-1060 and DDX-1080 respectively. The output power curves assume proper
thermal management of the power device’s internal dissipation. See Figure 4.
NOTE: Output power at 10% THD is approximately 30% higher.

DDX-1080/DDX-1060/DDX-1050
Specifications are subject to change without notice.
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10 15 20 25 30 35 40
0
5
10
15
20
25
30
35
40
Binary Half-Bridge Mode - Output Power vs Supply Voltage, THD+N<1%
Power Supply Voltage (VDC)
Output Power (RMS Watts)
4Ω
6Ω
8Ω
LEGEND:
DDX-1050, Iout(min) = 3.5A R
L
= 8ΩR
L
= 6ΩR
L
= 4Ω
DDX-1060, Iout(min) = 4.0A R
L
= 8ΩR
L
= 6ΩR
L
= 4Ω
DDX-1080, Iout(min) = 4.5A R
L
= 8ΩR
L
= 6ΩR
L
= 4Ω
All devices, Iout(typ) = 6A R
L
= 8ΩR
L
= 6ΩR
L
= 4Ω
Figure 6 - Half-Bridge Binary Mode Output Power vs Supply, <1% THD
(NOTE: Curves taken at f = 1 kHz and using a 330uF blocking capacitor.)
Figure 6 depicts the output power as a function of power supply voltages for loads of 4, 6, and 8 Ohms
when the DDX-1080, DDX-1060 and DDX-1050 are operated in a half-bridge Binary Mode. Solid
curves depict typical performance and dotted and dashed curves depict the minimum current limit for
the DDX-1050, DDX-1060 and DDX-1080 respectively. Once again, the output power curves assume
proper thermal management of the power device’s internal dissipation.
NOTE: Output power at 10% THD is approximately 30% higher.

DDX-1080/DDX-1060/DDX-1050
Specifications are subject to change without notice.
129 Morgan Drive, Norwood, MA 02062 voice: [phone] fax: [phone] email: [email protected]
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3.7 Typical Bridge Mode Performance Characteristics.
0
.01
10
0
.0
2
0
.05
0
.1
0
.2
0
.5
1
2
5
100m 200200m 500m 1 2 5 10 20 50 100
W
V
CC
= 40VDC, R
L
= 8Ω V
CC
= 34VDC, R
L
= 6Ω
0.006
1
0.01
0.02
0.05
0.1
0.2
0.5
%
20 20k50 100 200 500 1k 2k 5k 10k
Hz
V
CC
= 40VDC, R
L
= 8Ω V
CC
= 34VDC, R
L
= 6Ω
Figure 7 - THD+N vs. Output Power @ 1kHz,
using a DDX-8001 controller
Figure 8 - THD+N vs. Frequency @ 1W,
using a DDX-8001 controller
3.8 Typical Binary Half-Bridge Mode Performance Characteristics, V
CC
= 36 VDC, R
L
- 4Ω.
0.01
10
0.02
0.05
0.1
0.2
0.5
1
2
5
%
100
m
80200
m
500
m
1 2 5 10 20 50
W
0.01
1
0.02
0.05
0.1
0.2
0.5
%
100 20k200 500 1k
2k 5k 10k
Hz
Figure 9 - THD+N vs. Output Power @ 1kHz Figure 10 - THD+N vs. Frequency

DDX-1080/DDX-1060/DDX-1050
Specifications are subject to change without notice.
129 Morgan Drive, Norwood, MA 02062 voice: [phone] fax: [phone] email: [email protected]
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3.9 Typical DDX-Mode Performance Characteristics at V
CC
= 36V, 8ΩLoad, <1% THD+N.
0
10
20
30
40
50
60
70
80
90
100
010 20 30 40 50 60 70 80 90 100
Total Output Power (Watts)
Efficiency (%)
- 3
+3
- 1.5
- 0
+1.5
d
B
r
A
20
20k
50
100 200 500
1k 2k 5k
10k
Hz
Figure 11 - Typical Efficiency vs. Power Output Figure 12 - Typical Frequency Response
20 20k50 100 200 500 1k 2k 5k 10k
Hz
-140
+0
-130
-120
-110
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
d
B
r
A
Figure 13 - Typical FFT @ -60 dB,
using a DDX-8001 controller

DDX-1080/DDX-1060/DDX-1050
Specifications are subject to change without notice.
129 Morgan Drive, Norwood, MA 02062 voice: [phone] fax: [phone] email: [email protected]
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4.0 APPLICATION REFERENCE DESIGNS.
Apogee can provide reference designs for most applications.
Contact Apogee Technical Support for more information.
4.1 BRIDGE MODE
RT
10K
C88
1000PF
NPO
R29
10
+
C66
1000UF
+
C74 1UF
C90
100NF
X7R
C83
100NF
X7R
R33
6.2
R31
6.2
C91
1000PF
NPO
C89
100NF
X7R
C77
100NF
X7R
+
C80 1UF
C81
100NF
X7R
C87
470NF
FILM
U3
DDX-1080 / DDX-1060 / DDX-1050
GNDR1
20
VREG1
21
VREG1
22
VL
23
NC
24
PWRDN
25
TRI-STATE
26
FAULT
27
TWARN
28
NC
29
NC
30
INA
31
INB
32
VREG2
33
VREG2
34
VSIG
35
VSIG
36 GNDS 1
OUTB 2
OUTB 3
VCC 4
PGND 5
PGND 6
NC 7
OUTA 8
OUTA 9
NC 10
NC 11
VCC 12
PGND 13
NC 14
VCC 15
NC 16
NC 17
NC 18 GNDREF
19
LS9
SPEAKER
L12 (See Table)
1 2
C73 100NF
X7R
L11 (See Table)
1 2
C84
1000PF
NPO
C93
100NF
X7R
R30
10K
C86
100NF
X7R
CT
100NF
Y5V
C70
100NF
X7R
C82
100NF
X7R
C85
680PF
X7R
TWARN
EAPD
+VCC
INB
INA
+3.3V
+3.3V
+VCC
R32
10
C92
680PF
X7R
(See Table)
L11, L12 Component Table:
For 8 ohm loads use 22uH
For 6 ohm loads use 15uH
TANT
TANT
Figure 14 - DDX
®
Bridge Mode Audio Application Circuit
Figure 15 -. Sample DDX
®
bridge Mode Layout

DDX-1080/DDX-1060/DDX-1050
Specifications are subject to change without notice.
129 Morgan Drive, Norwood, MA 02062 voice: [phone] fax: [phone] email: [email protected]
CONTROLLED DOCUMENT: P_903-000044_Rev08 DDX-1080_60_50 Data Sheet.doc DRN: PRELIMINARY Page 12 of 13
4.2 BINARY ½ BRIDGE MODE, 2 CHANNEL.
60 Hz = -3dB
60 Hz = -3dB
R9
2.7K
C30
680NF
FILM
R8
10K
RT1
10K
+
C18
1UF
+
C21
330UF
LS4
SPEAKER
C9 100NF
X7R
+
C7
1000UF
C13
100NF
X7R
C24
1000PF
NPO
R10
10
CT1
100NF
Y5V
+
C29
330UF
C20
100NF
X7R
+
C28
330UF
+
C11
1UF
+
C19
330UF
C22
680NF
FILM
LS3
SPEAKER
C33
680PF
X7R
C23
1000PF
NPO
C25
100NF
X7R
L4 22uH
1 2
R12
2.7K
R11
2.7K
R7
2.7K
C8
100NF
X7R
C31
1000PF
NPO
C26
680PF
X7R
R13
10
L3 22uH
1 2
C27
100NF
X7R
EAPD
TWARN
C32
1000PF
NPO
CH3_A
CH4_A
+VCC
+3.3V
+3.3V
+VCC
+VCC
+VCC
4 OHM
4 OHM
U3
DDX-1080 / DDX-1060 / DDX-1050
GNDR1
20
VREG1
21
VREG1
22
VL
23
NC
24
PWRDN
25
TRI-STATE
26
FAULT
27
TWARN
28
NC
29
NC
30
INA
31
INB
32
VREG2
33
VREG2
34
VSIG
35
VSIG
36 GNDS 1
OUTB 2
OUTB 3
VCC 4
PGND 5
PGND 6
NC 7
OUTA 8
OUTA 9
NC 10
NC 11
VCC 12
PGND 13
NC 14
VCC 15
NC 16
NC 17
NC 18 GNDREF
19
TANT
TANT
Figure 16 - Binary ½ Bridge Mode, 2-Channel Audio Application Circuit
Figure 17 – Sample Binary Mode, 2 Channel Layout

DDX-1080/DDX-1060/DDX-1050
Specifications are subject to change without notice.
129 Morgan Drive, Norwood, MA 02062 voice: [phone] fax: [phone] email: [email protected]
CONTROLLED DOCUMENT: P_903-000044_Rev08 DDX-1080_60_50 Data Sheet.doc DRN: PRELIMINARY Page 13 of 13
PHYSICAL DIMENSIONS (Dimensions shown in mm)
Information furnished in this publication is believed to be accurate and reliable. However, Apogee Technology, Inc. assumes no responsibility
for its use, or for any infringements of patents or other rights of third parties that may result form its use. Specifications in this publication are
subject to change without notice. This publication supersedes and replaces all information previous supplied.
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