ARVOO PICASSO CPCI-LS User manual

PICASSOTM CPCI-LS
LVDS digital interface
User Manual
Draft version
Rev B doc 1.1

Rev B doc 1.1
Copyright 2001 by ARVOO Engineering BV
All rights reserved. No part of this publication may
be reproduced, stored in a retrieval system, or
transmitted, in any form by means, electronic,
mechanical, by photocopying, recording, or
otherwise, without the prior written permission of
ARVOO Engineering BV.
Information furnished by ARVOO Engineering BV
is believed to be accurate and reliable; however, no
responsibility is assumed by ARVOO Engineering
BV for its use; nor for any infringements of patents
or other rights of third parties which may result from
its use. No license is granted by implication or
otherwise under any patent rights of ARVOO
Engineering BV.
picassoTM is a trademark of ARVOO Benelux BV.
PentiumTM is a registered trademark of the Intel
Corporation.
ARVOO Engineering BV
P.O. Box 439
3440 AK Woerden
The Netherlands
url: www.arvoo.com
e-mail: [email protected]

CONTENTS
picassoTM cPCI-LS User Manual
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CONTENTS
OVERVIEW...........................................................................................................................................................4
FEATURES ............................................................................................................................................................5
1. GETTING STARTED..................................................................................................................................6
1.1 HARDWARE REQUIREMENTS ......................................................................................................................6
1.2 INSTALLING THE PICASSOTM .......................................................................................................................6
1.3 I/O CONNECTORS........................................................................................................................................7
1.3.1 AIA-connector ..................................................................................................................................7
1.3.2 Exposure header...............................................................................................................................9
1.3.3 LED indication...............................................................................................................................10
1.3.4 LVDS General Purpose Input/Output ............................................................................................11
1.3.5 Isolated General Purpose Input /Output header ............................................................................11
2. OPERATION PRINCIPLES.....................................................................................................................13
2.1 FUNCTIONAL OVERVIEW ..........................................................................................................................13
APPENDIX A .......................................................................................................................................................15

OVERVIEW
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OVERVIEW
The picassoTM cPCI-LS is a high-performance ‘plug and play’ PC-card for the CompactPCI-bus.
It enables each standard CompactPCI system to capture and store single images for image
processing. The picassoTM cPCI-LS operates as a CompactPCI bus master, allowing it to transfer
images directly to the system memory without impacting the processor.
The picassoTM cPCI-LS has two operating modes:
-one-camera mode
-two-camera mode
In one-camera mode the grabber can be used for 8, 10, 12, 14, 16 bits single channel cameras or
8 bits dual channel. In two-camera mode the grabber can be used for two 8 bits cameras.
The video modes are software controlled and accept progressive scan and interlaced both in
standard and non-standard formats (eg line scan).
The maximum pixel-format is 4096 pixels per line and 4096 line per frame. In 8-bit per pixel
mode the maximum is 8192 (8K) pixels per line.
The maximum data rate (pixel clock) is 40 MHz. This means a maximum throughput of
80 MB/sec.

FEATURES
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FEATURES
32-bit CompactPCI, 5V or 3.3V I/O interface
The picassoTM is a full CompactPCI 2.0 (PCIMG 2.0) bus master with a transfer
rate up to 132 Mbytes/sec. Support of zero wait state burst transfers.
8 to 16-bit, or two 8 bit digital cameras
Several configurations are possible, software controlled.
4096 x 4096 video resolution
4096 pixels per line and 4096 lines per frame (4 million pixels maximum). In the
8-bit per pixel mode the limit is 8192 pixels per line. Area scan and line scan
camera are supported. The maximum pixel frequency is 40 MHz.
68-pin AIA-standard connector
RS-644 (LVDS) or RS-422
The inputs/outputs are compatible with RS-644 (LVDS) or RS-422 signaling
levels. Ask ARVOO Support for more information.
Exposure time
Exposure is programmable from 6.375µS to 419 mS. The exposure output can be
active low or active high. LED indicating status exposure outputs.
Memory
Memory Management Unit (MMU) supports Virtual Memory up to
4 Mbytes/DMA channel. The picassoTM has 2 DMA channels.
General-purpose LVDS inputs/outputs
For interfacing to peripheral devices.
Synchronous serial communication
Two isolated general purpose inputs and outputs
The picassoTM has two optical isolated general purpose inputs and outputs. They
are software controlled and they can be used for external events such as light
switching and camera exposure. The inputs can be programmed as interrupt for
fast input reaction time.
Single power supply, 5 V.

GETTING STARTED
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1. GETTING STARTED
1.1 Hardware Requirements
The following minimum system characteristics are required by the picassoTM .
CompactPCI with Pentium 266 MHz (or better).
One available CompactPCI version 2.0 bus master expansion slot (32-bits, 5V or 3.3V I/O).
32 Mbytes of DRAM.
A mouse or compatible pointing device.
One CD-ROM drive for installation.
ARVOO recommends systems with newer PCI-chipsets, such as the Intel 440BX, i810,i815 or
i820. The maximum data-rate of the pci-bus is 132 MB/s. This is without latencies or its bus
protocol. The maximum bandwidth available for data is 100 MB/s. The picassoTM cPCI-LS can
burst 80 MB/s. This means that you need a good CompactPCI-system to transfer frames across
the bus to host memory.
1.2 Installing the picassoTM
1. Select a 32-bit CompactPCI bus master expansion slot. Refer to your computer systems user
manual to determine which slots are bus masters.
2. Remove the metal bracket.
3. Before handling the board, discharge any static build up on your body by touching the metal
case of the computer. Remove the board from its bag and hold the picassoTM by its top edges
and do not touch its components.
4. Push the picassoTM until it is fully seated. Secure the board by pushing the injector up. To
fully secure the picassoTM you can use the screw in the bracket.
5. Connection of the digital video signals to the picassoTM is accomplished using a AIA-standard
68-pin high density connector.

GETTING STARTED
picassoTM cPCI-LS User Manual
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1.3 I/O connectors
1.3.1 AIA-connector
The picassoTM cPCI-LS uses a AIA-standard 68-pin female connector, so interfacing to cameras
that use this standard also, can be done by using a standard cable. The AIA connector is the same
as the SCSI2 connector.
For the male connector ARVOO advices a AMP SCSI2 connector, part number: 749109 or
749621-7. The shell housing part number: 750752 or 749204-2.
In Table 1 connector pinout is given.
AIA-connecto
r
EXPO header
Internal use
figure 1
figure 2

GETTING STARTED
picassoTM cPCI-LS User Manual
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Pin Signal-name Pin Signal-name In/Out Signal-description
MODE 0
Signal-description
MODE 1
1Gnd 35 Gnd
2DATA15+ 36 DATA15- In MSB (16-bits camera) MSB (8-bits camera 1)
3DATA14+ 37 DATA14- In
4DATA13+ 38 DATA13- In MSB (14-bits camera)
5DATA12+ 39 DATA12- In
6DATA11+ 40 DATA11- In MSB (12-bits camera)
7DATA10+ 41 DATA10- In
8DATA9+ 42 DATA9- In MSB (10-bits camera)
9DATA8+ 43 DATA8- In LSB (camera 1)
10 DATA7+ 44 DATA7- In MSB (8-bits camera) MSB (8-bits camera 0)
11 DATA6+ 45 DATA6- In
12 Gnd 46 Gnd
13 DATA5+ 47 DATA5- In
14 DATA4+ 48 DATA4- In
15 DATA3+ 49 DATA3- In
16 DATA2+ 50 DATA2- In
17 -51 - -
18 -52 - -
19 DATA1+ 53 DATA1- In
20 DATA0+ 54 DATA0- In LSB LSB (camera 0)
21 FID1- 55 FID1- In -Field ID 1 (optional)
22 SDI+ 56 SDI- In Serial Receiver
(interrupt input)
Serial Receiver
(interrupt input)
23 SDO+ 57 SDO- Out Serial Transmitter Serial Transmitter
24 FID+ 58 FID- In Field ID (optional) Field ID (optional)
25 FEN+ 59 FEN- In Frame Enable Frame Enable
26 LEN+ 60 LEN- In Line Enable Line Enable
27 FEN1+ 61 FEN1- In LVDS General Purpose input Frame Enable 1
28 LEN1+ 62 LEN1- In LVDS General Purpose input Line Enable 1
29 PSTRB+ 63 PSTRB- In Pixel strobe (max. 40Mhz) Pixel strobe (max. 40Mhz)
30 EXPO0+ 64 EXPO0 - Out Exposure (6,375µS to 419mS) Exposure (6,375µS to 419 mS)
31 EXPO1+ 65 EXPO1- Out LVDS General Purpose output Exposure 1 (6,375µS to 419 mS)
32 SCL+ 66 SCL- Out Serial Clock Serial Clock
33 PSTRB1+ 67 PSTRB1- In LVDS General Purpose input Pixel strobe 1 (max. 40Mhz)
34 Gnd 68 Gnd
Table 1
The picassoTM cPCI-LS has two operating modes: (see also chapter 2)
-MODE0is for 8,10, 12, 14 or 16 bits single channel cameras or 8 bit dual channel
cameras. In this mode the video timing comes from FEN, LEN, FID (optional), PRSTB.
The exposure output 0 (EXPO0) is active.
-MODE1 is for two asynchronous 8 bit single channel cameras. In this mode the video
timing from camera A must be connected to FEN, LEN, FID (optional), PRSTB. The
video timing from camera B must be connected to FEN1, LEN1, FID1(optional),
PSTRB1. EXPO0 is for camera A, EXPO1 is for camera B.
FID and FID1 are optional, ask ARVOO Support for more information.

GETTING STARTED
picassoTM cPCI-LS User Manual
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1.3.2 Exposure header
The exposure outputs on the AIA-connector can be used in two ways:
-Software triggered.
-Hardware triggered via exposure header.
Software or hardware triggered is software controlled.
EXPO0 can be used in two ways in bought modes, EXPO1 only in operating MODE 1.
EXPO1 has the function of a general purpose output in MODE 0.
In the software trigger mode you can select active-low or active-high. This depends on the
camera being used. Active-low or active-high means that the camera is exposing its CCD-sensor
during this time. The time lenght of the active status is also software adjustable. The minimum
exposure time is 6.375 µS and the maximum exposure time is 419 mS.
For the hardware trigger mode you should use the exposure header. In this mode the TTL signal
is given on the EXPO input and send to EXPO0 and EXPO1.
In Figure 3 you see a close-up of the Exposure header. The pin connections are listed in Table 2.
There are a couple of ways to regenerate to the EXPO (EXPO0 and EXPO1) outputs.
This depends on the method being used, see figures below:
-EXPO output is directly EXPO input
-EXPO output is the invertion of EXPO input
Figure 3: Close-up of the
Exposure header
Header 2X5 Pins
EXPO Input 1
VCC, 250 mA 2
GND 4,6,8,10
Reserved 3,5,7,9
Table 2
EXPO input
EXPO output
EXPO output inverted
EXPO input
2 46810
1 3579

GETTING STARTED
picassoTM cPCI-LS User Manual
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-EXPO output is active high on the rising edge of EXPO input.
-EXPO output is active low on the rising edge of EXPO input.
-EXPO output is active high on the falling edge of EXPO input.
-EXPO output is active low on the falling edge of EXPO input.
1.3.3 LED indication
The picassoTM cPCI-LS contains two LEDs, see Figure 2. The green LED has the same status as
the EXPO0 output. The red LED has the same status as the EXPO1 output, even in MODE 0.
EXPO output rising
edge active high
T
T
EXPO input
T = Exposure time
EXPO output rising
edge active low
EXPO input
T
T
T = Exposure time
EXPO output falling
edge active high
T
T
EXPO input
T = Exposure time
EXPO output falling
edge active low
T = Exposure time
EXPO input
T
T

GETTING STARTED
picassoTM cPCI-LS User Manual
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1.3.4 LVDS General Purpose Input/Output
On the AIA-connector there are some RS-644 or RS-422 signals which have a general purpose
function. In Table 1 the pinout of the AIA connector in MODE0 and MODE1 is given.
In MODE0 the following signals are general purpose input: PSTRB1, LEN1, FEN1 and SDI.
In MODE1 only the SDI signal is input. PSTRB1, LEN1 and FEN1 are used for the video timing
of camera B.
SDI can be used as a interrupt input. It can generate a interrupt on the falling or rising-edge.
The general purpose outputs are the following signals EXPO_1, SCL and SDO. EXPO_1 is only
available in MODE0. With the SDI, SDO and SCL signals it is possible to build your own
synchronous serial communication.
When you want the general purpose outputs to be compatible with the TTL signaling level, you need the RS-422
option and use the + output. The + output has a swing of 0V to 5V.
When modified to RS-422 all outputs (EXPO_0, EXPO_1, SDO and SCL) will be RS-422 compatible. It is
possible (but not recommended) to connect a RS-422 output on a RS-644 input.
1.3.5 Isolated General Purpose Input /Output header
The Isolated General Purpose Inputs and Outputs are connected by a 10-pins flat-cable
connector. In Figure 4 you see a close-up of the flat-cable connector. The pin connections are
listed in Table 3.
When you use the general-purpose inputs or outputs you have to connect an external power
supply. The maximum external voltage is 5.5 V. The input current is 10 mA.
ATTENTION: The maximum output current is 100 mA.
The outputs are open drain, which means that logic 1 will force the output to ground. A wiring
example to connect an output is given below.
10
8
6
4
2
9
7
5
3
1
J7
Figure 4: Close-up of the
flat-cable connector
Sub D-9 Pins
Input 0 1
Input 1 2
Output 0 4
Output 1 5
VCC (5V) 6
GND 3,9
Table 3

GETTING STARTED
picassoTM cPCI-LS User Manual
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ATTENTION: When the computer is turned off and the external power supply stays up the
output will also be forced to ground.
In Figure 5 a wiring example for an output is given.
In Figure 6 a wiring example for an input is given.
External 5V
External
power
supply
GND
picasso
TM
PC
In
p
ut 0/1
Figure 6
output 0/1
External 5V
Imax 100
External
power
supply
GND
picasso
TM
PC
Figure 5

OPERATION PRINCIPLES
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2. OPERATION PRINCIPLES
2.1 Functional Overview
RS-644 (LVDS) or RS-422 interface
The picassoTM cPCI-LS uses a AIA-standard 68-pin female connector, so interfacing to cameras
that use this standard also, can be done by using a standard cable. By default the digital interface
is compatible with RS-644 (LVDS). Optional is the RS-422 compatible interface.
The picassoTM cPCI-LS has a flexible front end, so it is compatible with the majority of digital
cameras.
The picassoTM cPCI-LS has two operating modes:
-MODE0is for 8,10, 12, 14 or 16 bits single channel cameras or 8 bit dual channel
cameras. In this mode the video timing comes from FEN, LEN, FID (optional), PRSTB
(pixel clock). The exposure output 0 (EXPO0) is active.
-MODE1 is for two asynchronous 8 bit single channel cameras. In this mode the video
timing from camera A must be connected to FEN, LEN, FID (optional), PRSTB (pixel
clock). The video timing from camera B must be connected to FEN1, LEN1,
FID1(optional), PSTRB1. EXPO0 is for camera A, EXPO1 is for camera B.
FID and FID1 are optional, ask ARVOO Support for more information.
Both modes can acquire images up to 4096 pixels per line by 4096 lines per frame (4 million
pixels maximum).
16
PCI-bus
interface
32
PCI-bus
Data-switch
RS-644
RS-422*
A
cquisition
control
Programmable
exposure
control
LVDS I/O
controller
Isolated I/O
controller
8-16 bits
(8-bits)
PSTRB
,
LEN
,
FEN
,
FID*
(PSTRB1,LEN1,FEN1,FID1*)
EXPO0
,
(
EXPO1
)
* = optional
( ) = MODE1
GPO0
,
GPO1
GPI0
,
GPI1
EXPO1
,
SCL
,
SDO
PSTRB1
,
LEN1
,
FEN1
,
SDI
Ex
p
osure in
p
ut 0
,
(
1
)
Figure 7

OPERATION PRINCIPLES
picassoTM cPCI-LS User Manual
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PCI-bridge
The picassoTM cPCI-LS is a full PCI 2.1 master with a transfer rate up to 132 Mbytes/sec. It has
a 5V or 3.3V I/O signaling environment. Support of zero wait state burst transfers.
By specifying starting pixel, line locations and size an region of interest can be selected. The
user has to specify both the source and target fields.
The data can be stored in different output formats.
Isolated I/O controller
The input register is read-only and must be driven by an external source. It is possible to
generate interrupts from the inputs. The output register is read-write.

APPENDIX A
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APPENDIX A
1. Electrical specifications
Electrically-compatible with 5V or 3.3V I/O PCI specification, version 2.1.
2. Mechanical specifications
Mechanically compatible with CompactPCI specification, version 2.0
Measures 100x160 mm
Requires 1 CompactPCI slot
Environmental
Operating temperature 0º to 70º Celsius
Storage temperature -40º to 85º Celsius
Non-Condensing relative humidity less than 90%
Table 5
Power requirements Min. Typical Max.
Supply voltage, Vcc 4.75 V 5.0 V 5.25 V
Supply current, Vcc = 5.0 V 1.15 A 1.3 A
General purpose voltage 4.5 V 5.0 V 5.5 V
Input current, Vgp = 5.0 V - 10 mA -
Output current, Vgp = 5.0 V - 80 mA 100 mA
Table 4