Atmel SAM4S-EK2 User manual

11176A–ATARM–24-Sep-12
SAM4S-EK2
....................................................................................................................
User Guide

SAM4S-EK2 User Guide 1-1
11176A–ATARM–24-Sep-12
Section 1
Introduction.................................................................................................................1-1
1.1 SAM4S Evaluation Kit........................................................................................................ 1-1
1.2 User Guide......................................................................................................................... 1-1
1.3 References and Applicable Documents............................................................................. 1-1
Section 2
Kit Contents................................................................................................................2-1
2.1 Deliverables ....................................................................................................................... 2-1
2.2 Electrostatic Warning......................................................................................................... 2-2
Section 3
Power Up....................................................................................................................3-1
3.1 Power up the Board ...........................................................................................................3-1
3.2 DevStart............................................................................................................................. 3-1
3.3 Recovery Procedure .......................................................................................................... 3-1
3.4 Sample Code and Technical Support ................................................................................ 3-2
Section 4
Evaluation Kit Hardware.............................................................................................4-1
4.1 Board Overview.................................................................................................................. 4-1
4.2 Features List ...................................................................................................................... 4-2
4.3 Function Blocks.................................................................................................................. 4-2
4.3.1 Processor............................................................................................................. 4-2
4.3.2 Memory................................................................................................................ 4-2
4.3.3 Clock Circuitry...................................................................................................... 4-3
4.3.4 Reset Circuitry ..................................................................................................... 4-4
4.3.5 Power Supply and Management.......................................................................... 4-4
4.3.6 UART................................................................................................................... 4-5
4.3.7 USART................................................................................................................. 4-5
4.3.8 Display Interface.................................................................................................. 4-6
4.3.9 JTAG/ICE............................................................................................................. 4-8
4.3.10 Audio Interface..................................................................................................... 4-9
4.3.11 USB Device ....................................................................................................... 4-11
4.3.12 Analog Interface ................................................................................................ 4-11
4.3.13 QTouch Elements.............................................................................................. 4-12
4.3.14 User Buttons...................................................................................................... 4-13
4.3.15 LEDs.................................................................................................................. 4-14
4.3.16 SD/MMC Card ................................................................................................... 4-14
4.3.17 ZigBEE............................................................................................................... 4-14
4.3.18 PIO Expansion................................................................................................... 4-15

SAM4S-EK2 User Guide 1-2
11176A–ATARM–24-Sep-12
4.4 Configuration.................................................................................................................... 4-16
4.4.1 PIO Usage ......................................................................................................... 4-16
4.4.2 Jumpers............................................................................................................. 4-19
4.4.3 Test Points......................................................................................................... 4-20
4.4.4 Assigned PIO Lines, Disconnection Possibility.................................................. 4-20
4.5 Connectors....................................................................................................................... 4-22
4.5.1 Power Supply Connector J9 .............................................................................. 4-22
4.5.2 USART Connector J5 With RTS/CTS Handshake Support............................... 4-22
4.5.3 UART Connector J7 .......................................................................................... 4-23
4.5.4 USB Device Connector J15............................................................................... 4-23
4.5.5 TFT LCD Connector J8...................................................................................... 4-23
4.5.6 JTAG Debugging Connector J6......................................................................... 4-25
4.5.7 SD/MMC - MCI Connector J3............................................................................ 4-26
4.5.8 Analog Connector CN1 & CN2 .......................................................................... 4-27
4.5.9 RS485 Connector J14 ....................................................................................... 4-27
4.5.10 Headphone Connector J11................................................................................ 4-28
4.5.11 ZigBEE Connector J16 ...................................................................................... 4-28
4.5.12 PIO Expansion Port C Connector J12 ............................................................... 4-29
4.5.13 PIO Expansion Port A Connector J13 .............................................................. 4-30
4.5.14 PIO Expansion Port B Connector J14 ............................................................... 4-31
Section 5
Schematics.................................................................................................................5-1
5.1 Schematics......................................................................................................................... 5-1
Section 6
Troubleshooting..........................................................................................................6-1
6.1 Self-Test............................................................................................................................. 6-1
6.2 Board Recovery ................................................................................................................. 6-1
Section 7
Revision History..........................................................................................................7-1
7.1 Revision History................................................................................................................. 7-1

SAM4S-EK2 User Guide 1-1
11176A–ATARM–24-Sep-12
Section 1
Introduction
1.1 SAM4S Evaluation Kit
The SAM4S Evaluation Kit (SAM4S-EK2) enables evaluation capabilities and code development of
applications running on a SAM4SD32 device.
1.2 User Guide
This guide focuses on the SAM4S-EK2 board as an evaluation platform. It is made up of 6 sections:
Section 1 includes references, applicable documents, acronyms and abbreviations.
Section 2 describes the kit contents, its main features and specifications.
Section 3 provides instructions to power up the SAM4S-EK2 and describes how to use it.
Section 4 provides board specifications, describes the development environment and presents the
hardware resources, default jumper, switch settings and connectors.
Section 5 provides schematics.
Section 6 provides troubleshooting instructions.
1.3 References and Applicable Documents
Table 1-1. References and Applicable Documents
Title Comment
SAM4SD32 Datasheet www.atmel.com

SAM4S-EK2 User Guide 2-1
11176A–ATARM–24-Sep-12
Section 2
Kit Contents
2.1 Deliverables
The Atmel®SAM4S-EK2 toolkit contains the following items:
Board:
– a SAM4S-EK2 board
– a universal input AC/DC power supply with US, Europe and UK plug adapters
Cables:
– one USB cable
– one serial RS232 cable
A Welcome Letter
Figure 2-1. Unpacked SAM4S-EK2
Unpack and inspect the kit carefully. Contact your local Atmel distributor, should you have issues con-
cerning the contents of the kit.

Kit Contents
SAM4S-EK2 User Guide 2-2
11176A–ATARM–24-Sep-12
2.2 Electrostatic Warning
The SAM4S-EK2 board is shipped in a protective anti-static bag. The board must not be subjected to
high electrostatic potentials. A grounding strap or similar protective device should be worn when han-
dling the board. Avoid touching the components or any other metallic element of the board.

SAM4S-EK2 User Guide 3-1
11176A–ATARM–24-Sep-12
Section 3
Power Up
3.1 Power up the Board
Unpack the board taking care to avoid electrostatic discharge. Unpack the power supply, select the right
power plug adapter corresponding to that of your country, and insert it into the power supply.
Connect the power supply DC connector to the board and plug the power supply to an AC power plug.
The board LCD should light up and display a welcome page. Then, click or touch the icons displayed on
the screen and enjoy the demo.
3.2 Sample Code and Technical Support
After boot up, you can run some sample code or your own application on the development kit. You can
download sample code and get technical support from the Atmel web site: http://www.atmel.com

SAM4S-EK2 User Guide 4-1
11176A–ATARM–24-Sep-12
Section 4
Evaluation Kit Hardware
4.1 Board Overview
This section introduces the Atmel SAM4S-EK2 Evaluation Kit design. It introduces system-level con-
cepts, such as power distribution, memory, and interface assignments.
The SAM4S-EK2 board is based on the integration of an ARM®Cortex®-M4 processor with on-board
NAND Flash and a set of popular peripherals. It is designed to provide a high performance processor
evaluation solution with high flexibility for various kinds of applications.
Figure 4-1. SAM4S-EK2 Block Diagram

Evaluation Kit Hardware
SAM4S-EK2 User Guide 4-2
11176A–ATARM–24-Sep-12
4.2 Features List
Here is the list of the main board components and interfaces:
SAM4SD32 chip LQFP100 package with optional socket footprint
12 MHz crystal
32.768 KHz crystal
Optional SMB connector for external system clock input
NAND Flash
2.8 inch TFT color LCD display with touch panel and backlight
UART port with level shifter circuit
USART port with level shifter circuit multiplexed with RS485 port with level shifter circuit
Microphone input and mono/stereo headphone jack output
SD/MMC interface
Reset button: NRST
User buttons: Left and Right
QTouch®buttons: Up, Down, Left, Right, Valid and Slider
Full Speed USB device port
JTAG/ICE port
On-board power regulation
Two user LEDs
Power LED
BNC connector for ADC input
BNC connector for DAC output
User potentiometer connected to the ADC input
ZigBEE connector
2x32 bit PIO connection interfaces (PIOA, PIOC) and 1x16 bit PIO connection interface (PIOB)
4.3 Function Blocks
4.3.1 Processor
The SAM4S-EK2 is equipped with a SAM4SD32 device in LQFP100 package.
4.3.2 Memory
The SAM4SD32 chip embeds:
2048 Kbytes of embedded Flash
160 Kbytes of embedded SRAM
16 Kbytes of ROM with embedded BootLoader routines (UART, USB) and In-Application Programming
functions (IAP) routines

Evaluation Kit Hardware
SAM4S-EK2 User Guide 4-3
11176A–ATARM–24-Sep-12
The SAM4SD32 features an External Bus Interface (EBI) that permits interfacing to a broad range of
external memories and virtually to any parallel peripheral. The SAM4S-EK2 board is equipped with a
memory device connected to the SAM4 EBI:
One NAND Flash MT29F2G08ABAEA.
Figure 4-2. NAND Flash
NCS0 chip select signal is used for NAND Flash chip selection. Furthermore, a dedicated jumper can
disconnect it from the on-board memories, thereby letting NCS0 free for other custom purposes.
4.3.3 Clock Circuitry
The clock generator of a SAM4SD32 microcontroller is composed of:
A Low Power 32.768 Hz Slow Clock Oscillator with bypass mode
A 3 to 20 MHz Crystal Oscillator, which can be bypassed (12 MHz needed in case of USB)
A factory programmed fast internal RC Oscillator. 3 output frequencies can be selected: 4 (default
value), 8 or 12 MHz.
A 60 to 130 MHz PLL (PLLB) providing a clock for the USB Full Speed Controller
A 60 to 130 MHz programmable PLL (PLLA), capable to provide the clock MCK to the processor and
to the peripherals. The input frequency of PLLA is from 7.5 to 20 MHz
The SAM4S-EK2 board is equipped with one 12 MHz crystal, optional Piezoelectric Ceramic Resonator
12 MHz (Murata ref. CSTCE12M0G15L99-R0), one 32.768 Hz crystal and an external clock input con-
nector (optional, not populated by default).
Figure 4-3. External Clock Source
MN3
WE
18
N.C6
6
VCC 37
CE
9
RE
8
N.C11
20
WP
19
N.C5
5
N.C1
1
N.C2
2
N.C3
3
N.C4
4
N.C12
21
N.C13
22
N.C14
23
N.C15
24
R/B
7
N.C17
26
N.C18 27
N.C19 28
I/O0 29
N.C21 34
N.C22 35
VSS 36
PRE 38
N.C23 39
VCC 12
VSS 13
ALE
17
N.C8
11 N.C7
10
N.C9
14
N.C10
15
CLE
16
N.C16
25
N.C20 33
I/O1 30
I/O3 32
I/O2 31
N.C27 47
N.C26 46
N.C25 45
I/O7 44
I/O6 43
I/O5 42
I/O4 41
N.C24 40
N.C28 48
MT29F2G08ABAEA
JP9
Header2
C28
100nF
NANDFLASH
PC18
C29
1uF
+3V3
PC14
DGND
R16
47K
R22
0R
DNP
R21 47K
R19 0R
DGND
+3V3
C27
100nF
PC7
PC6
PC5
PC4
PC0
PC1
PC2
PC3
R15
47K
+3V3
PC10
PC9
PC16
PC17
+3V3
MN3
WE
18
N.C6
6
VCC 37
CE
9
RE
8
N.C11
20
WP
19
N.C5
5
N.C1
1
N.C2
2
N.C3
3
N.C4
4
N.C12
21
N.C13
22
N.C14
23
N.C15
24
R/B
7
N.C17
26
N.C18 27
N.C19 28
I/O0 29
N.C21 34
N.C22 35
VSS 36
PRE 38
N.C23 39
VCC 12
VSS 13
ALE
17
N.C8
11 N.C7
10
N.C9
14
N.C10
15
CLE
16
N.C16
25
N.C20 33
I/O1 30
I/O3 32
I/O2 31
N.C27 47
N.C26 46
N.C25 45
I/O7 44
I/O6 43
I/O5 42
I/O4 41
N.C24 40
N.C28 48
MT29F2G08ABAEA
JP9
Header2
C28
100nF
NANDFLASH
PC18
C29
1uF
+3V3
PC14
DGND
R16
47K
R22
0R
DNP
R21 47K
R19 0R
DGND
+3V3
C27
100nF
PC7
PC6
PC5
PC4
PC0
PC1
PC2
PC3
R15
47K
+3V3
PC10
PC9
PC16
PC17
+3V3
MN3
WE
18
N.C6
6
VCC 37
CE
9
RE
8
N.C11
20
WP
19
N.C5
5
N.C1
1
N.C2
2
N.C3
3
N.C4
4
N.C12
21
N.C13
22
N.C14
23
N.C15
24
R/B
7
N.C17
26
N.C18 27
N.C19 28
I/O0 29
N.C21 34
N.C22 35
VSS 36
PRE 38
N.C23 39
VCC 12
VSS 13
ALE
17
N.C8
11 N.C7
10
N.C9
14
N.C10
15
CLE
16
N.C16
25
N.C20 33
I/O1 30
I/O3 32
I/O2 31
N.C27 47
N.C26 46
N.C25 45
I/O7 44
I/O6 43
I/O5 42
I/O4 41
N.C24 40
N.C28 48
MT29F2G08ABAEA
JP9
Header2
C28
100nF
NANDFLASH
PC18
C29
1uF
+3V3
PC14
DGND
R16
47K
R22
0R
DNP
R21 47K
R19 0R
DGND
+3V3
C27
100nF
PC7
PC6
PC5
PC4
PC0
PC1
PC2
PC3
R15
47K
+3V3
PC10
PC9
PC16
PC17
+3V3
NOT POPULATED
DNP
XOUT32
XIN32
XIN32
XOUT32PA7
PA8
XIN
XOUT
PB8
PB9
DGND
DGND
DGND
DGND DGND
R3DNPR3DNP
R6 DNPR6 DNP
R9DNPR9DNP
R1 DNPR1 DNP C3
20pF
C3
20pF
R4 0RR4 0R
C4
20pF
C4
20pF
R2
49.9R 1%
R2
49.9R 1%
Y1Y1
12
3
R8DNPR8DNP
R7DNPR7DNP
MN1MN1
PA7_RTS0_PWMH349
PA8_CTS0_AD12BTRG 48
PB8_XOUT
96
PB9 _XIN
97
R11
0R
R11
0R
Y212MHzY212MHz
C120pFC120pF
R10 DNPR10 DNP
Y3
32.768KHz
Y3
32.768KHz
12
3
R5 0RR5 0R R12
0R
R12
0R
J1J1
1
23
54
C220pFC220pF
SAM4SD32

Evaluation Kit Hardware
SAM4S-EK2 User Guide 4-4
11176A–ATARM–24-Sep-12
The SAM4SD32 chip internally generates the following clocks:
SLCK, the Slow Clock, which is the only permanent clock of the system
MAINCK, the output of the Main Clock Oscillator selection: either a Crystal Oscillator or a 4/8/12 MHz
Fast RC Oscillator
PLLACK, the output of the Divider and 60 to 130 MHz programmable PLL (PLLA)
PLLBCK, the output of the Divider and 60 to 130 MHz programmable PLL (PLLB)
4.3.4 Reset Circuitry
On-board NRST button BP1 provides an external reset control of the SAM4SD32.
The NRST pin is bidirectional. It is handled by the on-chip reset controller. It can be driven low to provide
a reset signal out to the external components. Conversely, it can be asserted low from the outside to
reset the microcontroller Core and the peripherals. The NRST pin integrates a permanent pull-up resistor
of 100 kOhm to VDDIO.
On the SAM4S-EK2 board, the NRST signal is connected to the LCD module and JTAG port.
Note: At power-on, the NRST signal is asserted with a default duration of 2 clock cycles. That duration may not be
sufficient to correctly reset any other system or board devices connected to that signal. First, in your custom
application, you need to check for these device’s datasheets about reset duration requirements. Then, you
need to set an appropriate configuration in the NRST Manager. This is done through the ERSTL field in the
RSTC_MR register. The NRST duration is thereby configurable between 60 µs and 2 s, whether it is subse-
quently activated by a software reset or a user reset. Refer to the SAM4SD32 datasheet for in-depth
information.
4.3.5 Power Supply and Management
The SAM4S-EK2 board is supplied with an external 5V DC block through input J9. It is protected by a
PolyZen diode (MN9) and an LC combinatory filter (MN10). The PolyZen is used in the event of an incor-
rect power supply connection.
The adjustable LDO regulator MN12 is used for the 3.3V rail main supply. It powers all the 3.3V compo-
nents on the board.
Figure 4-4. Power Block
The SAM4SD32 product has different types of power supply pins:
VDDIN pin:
Power for the internal voltage regulator, ADC, DAC, and analog comparator power supplies.
The voltage ranges from 1.8V to 3.6V.
DGND
+5V
DGND
+5V +3V3
C75
100uF
+
C75
100uF
C65
22uF
+
C65
22uF
C64
100nF
C64
100nF
MN10
BNX002-01
MN10
BNX002-01
SV
1
SG
2CV 3
CG1 4
CG2 5
CG36
C76
100nF
C76
100nF
C66
22uF
+
C66
22uF
MN9
ZEN056V130A24LS
MN9
ZEN056V130A24LS
1
2
3
R92
102K 1%
R92
102K 1%
MN12
MIC29152WU
Micrel's1.5A LDO, TO263-5
MN12
MIC29152WU
Micrel's1.5A LDO, TO263-5
VIN
2VOUT 4
SD
1
GND1
3
ADJ 5
GND2
6
R89
169K 1%
R89
169K 1%
J9
MP179P 2.1mm
J9
MP179P 2.1mm
1
2
3

Evaluation Kit Hardware
SAM4S-EK2 User Guide 4-5
11176A–ATARM–24-Sep-12
VDDIO pins:
Power for the Peripherals I/O lines.
The voltage ranges from 1.62V to 3.6V.
VDDOUT pin:
Output of the internal voltage regulator.
VDDCORE pins:
Power for the core, including the processor, embedded memories and peripherals.
The voltage ranges from 1.62V to 1.95V.
VDDPLL pin:
Power for the PLL A, PLL B and 12 MHz oscillator.
The voltage ranges from 1.62V to 1.95V.
Note: VDDPLL should be decoupled and filtered from VDDCORE.
4.3.6 UART
The Universal Asynchronous Receiver Transmitter features a two-pin UART that can be used for com-
munication and trace purposes. It offers an ideal channel for in-situ programming solutions. This UART
is associated with two PDC channels to reduce the processor time on packet handling.
This two-pin UART (TXD and RXD only) is buffered through an RS232 Transceiver MN6 and brought to
the DB9 male connector J7.
Figure 4-5. UART
4.3.7 USART
The Universal Synchronous/Asynchronous Receiver Transmitter (USART) provides one full duplex uni-
versal synchronous/asynchronous serial link. The data frame format is extensively configurable (data
length, parity, number of stop bits) to support a broad range of serial communication standards. The
USART is also associated with PDC channels for TX/RX data access.
Note: For design optimization purposes, both transmitters have been implemented on the same
PIO lines, that is PA21, 22, 23, 24, 25.
To avoid any electrical conflict, the RS485 transceiver is isolated from the receiving line PA21.
Should you need to implement an RS485 channel in place of the RS232, follow the procedure below:
1. make sure your software will permanently set PA23 to a high level - this will permanently disable the
RS232 receiver.
2. change JP31 to make sure that 2-3 pins are connected.
+3V3
DGND DGND
+3V3+3V3
FGND
PA10
PA9
C39
100nF
C39
100nF
C40
100nF
C40
100nF
TP5
SMD
TP5
SMD
J7J7
5
4
3
2
1
9
8
7
6
10 11
R46
100K
R46
100K
C38
100nF
C38
100nF
TP6
SMD
TP6
SMD
C41
100nF
C41
100nF
R47 0RR47 0R
R480RR480R
C42
100nF
C42
100nF
MN6
MAX3232CSE
MN6
MAX3232CSE
T1IN
11
T2IN
10 R1OUT
12
R2OUT
9
T1OUT 14
T2OUT 7
R1IN 13
R2IN 8
V+
2
C1+ 1
C1- 3
C2+ 4
C2- 5
V-
6
VCC
16
GND
15
R45
100K
R45
100K

Evaluation Kit Hardware
SAM4S-EK2 User Guide 4-6
11176A–ATARM–24-Sep-12
4.3.7.1 RS232
SAM4S-EK2 connects the USART1 bus (including TXD, RXD, RTS, CTS handshake signal controls and
EN command) to the DB9 male connector J5 through the RS232 Transceiver MN5.
Figure 4-6. USART Evaluation Kit Hardware
4.3.7.2 RS485
As noticed above, the USART1 is shared with the RS485 port, connected to the transceiver MN4, con-
nected to the 3-point connector J4. The design includes selectable jumpers for RS485 bus termination
resistors selection (JP10, JP11, JP12).
Figure 4-7. RS485
4.3.8 Display Interface
The SAM4S-EK2 carries a TFT Transmissive LCD module with touch panel, FTM280C34D. Its inte-
grated driver IC is ILI9325. The LCD display area is 2.8 inches diagonally measured, with a native
resolution of 240 x 320 dots.
DGND DGND
+3V3
J5
5
4
3
2
1
9
8
7
6
10 11
FGND
PA25
DGND
MN5
ADM3312EARU
C1+ 6
C1- 20
C2+ 2
C2- 4
C3+ 24
C3- 22
VCC
3
V+
1
V-
21
GND
23
SD
19
EN
5
T1IN
7T1OUT 18
R1IN 15 R1OUT
10
T2IN
8T2OUT 17
R2IN 14 R2OUT
11
T3IN
9T3OUT 16
R3IN 13 R3OUT
12
PA24
C34
100nF
PA21_232
C31
4.7uF
C35
100nF
R32
47K
PA22
C37
100nF
USART
C33
100nF
R37 47K
PA23
C36
100nF
C32
100nF
+3V3
R31 0R
R33 0R
R34 0R
R35 0R
R36 0R R38 0R
+3V3
PA25
PA21_485
R23
10K
R25 0R
R30
TBD
DNP
R24
TBD
DNP
+3V3
R26 0R
R27 0R
R28 0R
FGND
R29
120R
MN4
ADM3485ARZ
RO
1
RE
2
DE
3
DI
4
VCC 8
GND 5
A6
B7
JP11
Header2 JP 12 Header2
C30
100nF
JP10
Header2
+3V3
DGND
DGND
PA22
RS485
+3V3
PA24
J4
1
2
3
JP28
Header2 nm
DNP

Evaluation Kit Hardware
SAM4S-EK2 User Guide 4-7
11176A–ATARM–24-Sep-12
4.3.8.1 LCD Module
The LCD module gets reset from the NRST signal. As explained, this NRST is shared with the JTAG port
and the push-button BP1. The LCD chip select signal is connected to NCS1; the jumper JP13 can dis-
connect it so that this PIO line is available for other custom usage.
The SAM4SD32 communicates with the LCD through PIOC where an 8-bit parallel “8080-like” protocol
data bus has to be implemented in software.
Figure 4-8. LCD Block
4.3.8.2 Backlight Control
The LCD backlight is made of four integrated white chip-LEDs arranged in parallel. These are driven by
an AAT3155 charge pump, MN8. The AAT3155 is controlled by the SAM4SD32 through a single PIO
line PC13 interface; the 0 Ohm resistor R68 is mounted in series on this line, which permits to use it for
other custom purposes. In that case, the pull-up resistor R64 maintains the charge pump permanently
enabled by default.
On the anode drive line, a 0 Ohm resistor R59 is implemented in series for an optional current limitation.
Figure 4-9. Backlight Control
LCD_DB3
R59 0R
Six slotson PCBfor LCDshield
PC11
R63 4.7K
DNP
DGND
LED_A
PC26
LCD_DB2
NRST
PC8
LCD_DB0
PC27
LCD
C45
100nF
LCD_DB4
DGND
J8
FH26-39S-0.3SHW
VDD
1
DB17
2
DB16
3
DB15
4
DB14
5
DB13
6
DB12
7
DB11
8
DB10
9
DB9
10
DB8
11
DB7
12
DB6
13
DB5
14
DB4
15
DB3
16
DB2
17
DB1
18
DB0
19
VDD
20
RD
21
WR
22
RS
23
CS
24
RESET
25
IM0
26
IM1
27
GND
28
LED-A
29
LEDK1
30
LEDK2
31
LEDK3
32
LEDK4
33
Y+
34
Y-
35
X+
36
X-
37
NC
38
GND
39
PC28
DGND
R49
47K
X_RIGHT
Y_DOWN
Y_UP
X_LEFT
D1
PACDN044Y5R
TVS, SOT23-5
DNP
1
2
345
NOT POPULATED
The part is placed as
close as possible to J8
DGND
PC29
DGND
DGND
DGND
JP13 Header2
LCD_DB9
LCD_DB13
LCD_DB12
LCD_DB11
LCD_DB10
LCD_DB16
LCD_DB15
LCD_DB14
PC30
LCD_DB17
R58
4.7K
LCD_DB5
PC2
PC1
PC0
PC3
X_LEFT
LCD_DB9
R56
10K
PC6
PC5
PC4
PC7
PC23
X_RIGHT
+3V3
DGND
DGND
LCD_DB7
Y_DOWN
LCD_DB8
Y_UP
RA2
4.7Kx4
DNP
1
2
3
4 5
6
7
8
PC22
PC31
PC13
LCD_DB6
LCD_DB6
LCD_DB7
DGND
PC15
PC[0..31]
LED_K4
LCD_DB8
LCD_DB4
LCD_DB5
LED_K3
LED_K2
PC24
PINs
on
BOT
PIN 39
PIN 1
Z7
FTM28 0C34D
LCD_DB2
LCD_DB3
LCD_DB1
LED_K1
NRST
RA3
4.7Kx4
DNP
1
2
3
4 5
6
7
8
PC19
LCD_DB0
LCD_DB1
C44
100nF
R61 4.7K
DNP
DGND
+3V3
+C43
10uF
PC25
MN8
AAT3155ITP-T1
C1+
10
C1-
9
EN/SET
11
C2+ 7
C2- 6
OUTCP 8
IN
5
GND
4
D1 3
D2 2
D3 1
D4 12
C55
1uF
C54
1uF
C57
4.7uF
C56
1uF
R68
0R
R64
47K
LED_A
LED_K1
+3V3
LED_K4
LED_K3
LED_K2
+3V3
PC13
DGND
DGND
TP7
FB1
BN03K314S300R
LCD BACKLI GHT

Evaluation Kit Hardware
SAM4S-EK2 User Guide 4-8
11176A–ATARM–24-Sep-12
4.3.8.3 Touch Screen Interface
The LCD module integrates a 4-wire touch panel controlled by MN7 (ADS7843) which is a slave device
on the SAM4SD32 SPI bus. The controller sends back the information about the X and Y positions, as
well as a measurement for the pressure applied to the touch panel. The touch panel can be used with
either a stylus or a finger.
The ADS7843 touch panel controller connects to the SPI0 interface via the NPCS0 control signal. Two
interrupt signals are connected and provide events information back to the microcontroller: PenIrq and
Busy.
Note: PenIrq (PA16) is shared with ZigBEE signal IRQ0.
Busy (PA17) is shared with ZigBEE signal IRQ1.
Therefore, if using a ZigBEE interface in concurrence with the TouchScreen controller, take
care not to have both drivers enabled at the same time on either PA16 or PA17.
For that purpose, 0 Ohm resistors have been implemented on these PIO lines in order to disconnect
either end driver from the other:
On the touch panel controller side, R67 and R69.
On ZigBEE side, R117 and R120.
For further information, refer to the “Schematics” section.
Touch ADC auxiliary inputs IN3/IN4 of the ADS7843 are connected to test points (TP8, TP9) for optional
function extension.
Figure 4-10. Touch Panel Control
4.3.9 JTAG/ICE
A standard 20-pin JTAG/ICE connector is implemented on the SAM4S-EK2 for the connection of a com-
patible ARM JTAG emulator interface, such as the SAM-ICE from Segger.
Notes: 1. The NRST signal is connected to BP1 system button and is also used to reset the LCD
module. The 0 ohm resistor R44 may be removed in order to isolate the JTAG port from
this system reset signal.
2. The TDO pin is in input mode with the pull-up resistor disabled when the Cortex M4 is
not in debug mode. To avoid current consumption on VDDIO and/or VDDCORE due to
floating input, the internal pull-up resistor corresponding to this PIO line must be
enabled.
AGND_TP
JP32
Header2
LCD TOUCH SCREEN
R74
0R
C59
100nF
C58
100nF
R71
1R
C60
100nF
TP8
PA14
PA13
PA12
C61
4.7uF
PA11
PA17
TP9
DGND
R65
100K
+3V3
+3V3
AGND_TP
+3V3
R62
100K
R73
100K
R72
100K
L2
10uH-100mA
MN7
ADS7843E
XP
2
YP
3
XM
4
YM
5
DCLK 16
DIN 14
DOUT 12
CS 15
BUSY 13
PE NIRQ 11
VREF 9
VCC1 1
VCC2 10
GND 6
IN3
7
IN4
8
X_RIGHT
Y_DOWN
X_LEFT
Y_UP
R67 0R
R70 0R
R69 0R PA16

Evaluation Kit Hardware
SAM4S-EK2 User Guide 4-9
11176A–ATARM–24-Sep-12
Figure 4-11. JTAG Interface
4.3.10 Audio Interface
The SAM4S-EK2 board supports both audio recording and playback.
The audio volume can be adjusted using the potentiometer RV1, and the microphone amplifier gain can
be adjusted via jumpers (fixed gain of 24 or 26 dB).
4.3.10.1 Microphone Input
The embedded microphone is connected to an audio pre-amplifier using the TS922 operational amplifier
(MN11). The gain is set by using JP14 and JP15 jumpers; both must be set or removed at the same
time.
By modifying the jumper positions, you can select each of the following gain values:
20 dB (default setting, both JP14 and JP15 are off)
26 dB (both JP14 and JP15 are on).
Notes: 1. R83 is a default 0 Ohm resistor that enables the disconnection of PB0 from the audio
input path for custom usage.
2. The audio pre-amplifier MN11 is powered by a dedicated low dropout regulator
MIC5219-3.3 (MN14).
+3V3
DGND
NRST
PB5
PB7
PB6
PB4
R43
100K
R43
100K
R41
100K
R41
100K
R39
100K
R39
100K J6J6
VTref
1Vsupply 2
nTRST
3GND1 4
TDI
5GND2 6
TMS
7GND38
TCK
9GND4 10
RTCK
11 GND5 12
TDO
13GND6 14
nSRST
15 GND7 16
DBGRQ
17 GND818
DBGACK
19 GND920
R42
100K
R42
100K
R40
100K
R40
100K
R44 0RR44 0R

Evaluation Kit Hardware
SAM4S-EK2 User Guide 4-10
11176A–ATARM–24-Sep-12
Figure 4-12. Microphone Input
4.3.10.2 Headphone Output
The SAM4S-EK2 evaluation kit supports mono/stereo audio playback driven by a TPA0223 audio ampli-
fier connected to two DAC channels of the microcontroller.
The TPA0223 is a 2W mono Bridge-Tied-Load (BTL) amplifier designed to drive speakers with as low as
4 Ohm impedance. The amplifier can be reconfigured on the fly to drive two stereo Single-Ended (SE)
signals into head phones.
Figure 4-13. Headphone Output
R75 47K
C74
100nF
C77
4.7uF
R83
0R
R91
0R
AGND
DGND
JP14 and JP15 should be set
or removed together
R90
100K
R76 47K
AVDD
R93
100K
JP15
Header2
C72
1nF
AGND AGND VCC33
C69
1nF
AGND
R77
470R
PB0
R86
47K
AGND
MIC1
SVB6050
12
MN11
TS922
IN1-
2
IN1+
3
OUT2
7
IN2-
6
IN2+
5
GND 4
VCC 8
OUT1 1
FB2
BN03K314S300R
AVDD
R79
1K
JP14 Header2
R87
47K
R81
100R
AVDD
AUDIO IN
C71
22nF
AGND
R82
1K
R78
1K R80
1K
R84
1K
R85
1K
R88
470R
C62
100pF
C63
22uF
C73
22uF
C67
1uF
C68
1uF
AGND
AGNDAGND
R100 33K
J11
Phonejack Stereo 3.5
5
4
3
2
1
+
C83 220uF-TAN-6.3V
+
C81 220uF-TAN-6.3V
R97 1K
R95 1K
R104 47K C86 0.47uF
AGND
AGND
AUDIO OUT
C79
1uF
JP29
1
2
3
AUDIO_OUTL
C82
100nF
DGND
TP12
TestPadSQ-40TH
R105 33K
C84 0.47uF
C88 0.47uF
MN13
TPA0223DGQ
VDD
3
RIN
5
MONO-IN
1
LIN
9
LO/MO- 10
RO/MO+ 6
ST/MN 7
SHUTD0WN 2
BYPASS 4
GND 8
PAD
11
+C80
10uF
C85 0.47uF
JP17 Heade r2
JP19 Heade r2
VDD_AMP
R103 100K
R101 100K R102 100K
AGND
JP20
Header2
AGND
AGND
VDD_AMP
PB13
C87
1uF
J10
1
2
+5V
R98 33K
AGND
R99 47K
FB3
BN03K314S300R
VCC33
AGND

Evaluation Kit Hardware
SAM4S-EK2 User Guide 4-11
11176A–ATARM–24-Sep-12
Using a readily available 1/8-in. (3,5 mm) stereo headphone jack, the control switch is closed when no
plug is inserted. When closed, a 100-kOhm/1-kOhm divider pulls the ST/MN input low. When a jack plug
is inserted, the 1-kOhm resistor is disconnected and the ST/MN input is pulled high. The mono speaker
(J10 connector) is also physically disconnected from the RO/MO+ output so that no sound is heard from
the speaker while the headphones are inserted.
4.3.11 USB Device
The SAM4SD32 UDP port is compliant with the Universal Serial Bus (USB) rev 2.0 Full Speed device
specification. J15 is a micro B-type receptacle for USB device.
Both 27-Ohm resistors R114 and R116 build up a 90-Ohm differential impedance together with the
(embedded) 6-Ohm output impedance of the SAM4SD32 full speed channel drivers.
R110 and R112 build up a divider bridge from VBUS +5V to implement plug-in detection (5V level gets
lowered to a PIO compatible 3.3V level) through PC21.
Figure 4-14. USB
4.3.12 Analog Interface
4.3.12.1 Analog Reference
The 2.5V voltage reference is based on a LM4040 (Precision Micropower Shunt Voltage Reference).
This ADVREF level can be set as 2.5V or 3.3V via the jumper JP2.
Figure 4-15. Analog Vref
C94
10pF
R116 27R
DGND
RV2
V5.5MLA0603
PC21
PB11
FGND
RV1
V5.5MLA0603
USB
5V D- D+ ID G
J15
TBD USB Micro B
1 2 3 4
7
5
6
8
9
10 11
R112 68K DGND
R110 47K
FGND
R114 27R
PB10
ADVREF
DGND
DGND
VCC33
+5V
JP2JP2
1
2
3
C5
100nF
C5
100nF
ADVREF 1
R13
2.2K
R13
2.2K
MN2
LM4040-2.5
MN2
LM4040-2.5
SAM4SD32

Evaluation Kit Hardware
SAM4S-EK2 User Guide 4-12
11176A–ATARM–24-Sep-12
4.3.12.2 Analog Input
The BNC connector CN1 is connected to the ADC port PB1 as an external analog input. An on-board 50-
Ohm resistor termination can be applied by closing jumper JP16. A low pass filter can be implemented
for the BNC connector CN1 by replacing R94 and C78 with custom resistor and capacitor values,
depending on your application requirements.
A 10-KOhm potentiometer (VR1) is also connected to this channel to implement an easy access to ADC
programming and debugging (or implement an analog user control like display brightness, volume, etc.).
Either of these two functions can be selected by jumper JP18.
Figure 4-16. ADC Input
4.3.12.3 Analog Output
The BNC connector CN2 is connected to the DAC port PB13 and provides an external analog output. An
on-board 50-Ohm resistor termination can be enabled by closing jumper JP21. A filter can be imple-
mented on this output channel by replacing R106 and C90 with appropriate resistor and capacitor
values, depending on the application requirements.
Figure 4-17. DAC Output
4.3.13 QTouch Elements
QTouch keys consist in a series of sensors formed by the association of a copper area and the capaci-
tive effect of human fingers approaching it.
4.3.13.1 Keys
The SAM4S-EK2 implements five individual capacitive touch keys (UP, DOWN, RIGHT, LEFT and
VALID) using five pairs of PIO.
ADC
AD5
C78
10nF
C89
10nF
DGND
JP16
Header2
Potentiometer
Clockwise 2-->3
R96
49.9R
VR1
10K VR
1 3
2
DGND
VCC33 JP18
1
2
3
R94
0R
PB1
CN1
BNC
DAC1
R109
49.9R
DGND
JP21
Header2
R106
0R
C90 2.2uF JP30
1
2
3
AUDIO_OUTL
DAC
PB13
CN2
BNC

Evaluation Kit Hardware
SAM4S-EK2 User Guide 4-13
11176A–ATARM–24-Sep-12
Figure 4-18. QST Keys
4.3.13.2 Slider
A group of channels forms a Slider. A Slider is composed of three channels for a QTouch acquisition
method using three pairs of PIOs. Such a sensor is used to detect a linear finger displacement on a sen-
sitive area. A typical implementation is volume control.
Figure 4-19. QT_Slider
4.3.14 User Buttons
There are two mechanical user buttons on the SAM4S-EK2, which are connected to PIO lines and
defined to be "left" and "right" buttons by default.
In addition, a mechanical button controls the system reset, signal NRST.
Figure 4-20. System Buttons
PC25
PC24
PC31
PC30
PC29
PC28
PC23
PC22
PC27
PC26
R531KR531K
C49
22nF
C49
22nF
R60 1KR60 1K
R51 1KR51 1K
R57 1KR57 1K
C51
22nF
C51
22nF
R55 1KR55 1K
C47
22nF
C47
22nF
K1
DNP
K1
DNP
C53
22nF
C53
22nF
C52
22nF
C52
22nF
22nF use X7R
S1
QTouchSlider
SL
SM
SR
SR
PA1
PA3
PA0
C48
22nF
C50
22nF
C46
22nF
PA2
PA4
PA5
R50 1K
R54 1K
R52 1K
PB3
PC12
DGND
NRST
JP26JP26
BP1BP1
14
23
BP3BP3
14
23
JP25JP25
BP2BP2
14
23