
Product overview
EL375118 Version: 3.9
The measurement takes place via a differential input channel. It is digitized with a resolution of 24bit and
10ksps and transported electrically isolated from the fieldbus to the higher-level automation device with
optional oversampling. The integrated supply and the switchable auxiliary resistors enable direct connection
of a resistor bridge (strain gauge SG) or load cell with 2-/3-/4-/6-wire connection technology, a fixed resistor,
a PTC or a potentiometer. The signal state of the EtherCAT Terminal is indicated by light emitting diodes.
If a lower sampling rate is required, a data rate reduction (referred to as decimation) can be set internally,
based on the fixed analog sampling rate of 10ksps. The sampling rate of ≤10ksps achieved in this way can
then be transferred to the controller via EtherCAT, based on the task cycle time and a suitable oversampling
factor.
The terminal has two configurable numeric software filters up to FIR 39th order (40 taps) or IIR 6th order. The
first filter is applied to the 10ksps raw data, the second filter is based on the user-settable decimation, with a
view to suppressing aliasing effects. Both filters can be set based on an integrated list (a number of low-
pass, high-pass, mean value filters) or a freely selectable coefficient table.
Non-linear characteristic sensor curves can be corrected flexibly through an integrated sampling points table.
Simple mathematical operations are also possible.
Each terminal has a unique ID number, which is printed and electronically readable. The optionally available
factory calibration certificate (EL3751-0020, EL3751-0024) can be assigned via this ID number; re-calibration
is possible.
2.2 Technical data
2.2.1 Common technical data
Technical data EL3751
Analog inputs 1 channel
Connection technology 2 - 6 wire
Resolution 24 bit including sign, 32 bit display
Sampling type simultaneous
Ground reference differential
Selection of oversampling factors 1, 2, 4, 5, 8, 10, 16, 20, 25, 32, 40, 50, 64
ADC conversion method deltaSigma ΔΣ, 1.28 msps (internal sampling rate)
Limit frequency input filter hardware Before AD converter: 30 kHz hardware filter
Within ADC after conversion: -3dB @3.2 kHz, mean
value filter 5th order
Measuring error Typically ±0.01% @ 23°C, exceptions for individual
measuring ranges, details see function tables and 2)
below.
Max. sampling rate/conversion time 10ksps/ 100µs (fixed, additionally free
downsampling in firmware through decimation factor)
Supported EtherCAT cycle time
(depending on the operation mode)
DistributedClocks: min.100µs, max.25ms
(max.10ms recommended)
FrameTriggered/Synchron: min.200µs, max.100ms
FreeRun: not supported
Signal delay (step response) tbd.
Signal delay (linear) tbd.
Phase response linear, constant envelope delay
Acquisition method Simultaneous (1 channel, simultaneous with DC
synchronization of several terminals)
Dielectric strength - destruction limit max. permitted short-term/continuous voltage
• Voltage between each contact point ±I1, ±I2, +UV,
and –UV,: non-supplied ±40V, supplied ±36V