Casio CTK-601 User manual

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POWER
FULL RANGE
CHORD
FINGERED
MAX START
TEMPO
REVERB
SYNTH
MIXER
MEMORY
STEP
ACCOMP
VOLUME
STOP
MIN
CASIO CHORD
NORMAL
FREE
SESSION
TOUCH
RESPONSE
LAYER
SPLIT
CURSOR
PITCH BEND MODE VOLUME INTRO SYNCHRO / ENDING
NORMAL / FILL-IN VAR / FILL-IN
REVERB
GM
FREE
SESSION
LAYER
SPLIT
TOUCH
RESPONSE
HALL
STAGE
ROOM
SYNTH
MIXER
MEMORY
STEP
CHORD/1 23456
MEMORY TRACK/DRUM PAD
DEMO
TRANSPOSE/
TUNE/MIDI
RHYTHM TONE
ENTER
AMP
ENVELOPE
DIGITAL REVERB SYSTEM
2WAY MULTI-TRACK MEMORY
000-048 DECAY 00 FLAT
049-137 SUSTAIN 01-19 VIBRATO
20-49 OTHERS
PITCH
ENVELOPE
ENVELOPE
200 TONES
100 RHYTHMS
ELECTRONIC KEYBOARD
CTK-601
CTK-601

— 1 —
SPECIFICATIONS
GENERAL
Keyboard: 61 standard-size keys, 5 octaves (with touch response on/off)
Drum pads: 6
Tones: 200 (128 General MIDI, 32 synthesized, 8 drum, 32 user); with layer and
split
Rhythm instrument tones: 51
Polyphony: 24 notes maximum (12 for certain tones)
Digital effects: 3 reverb types (HALL, STAGE, ROOM)
Auto accompaniment
Rhythm patterns: 100
Tempo: Variable (216 steps, = 40 to 255)
Chords: 3 fingering methods (CASIO CHORD, FINGERED, FULL RANGE
CHORD)
Rhythm controller: START/STOP, INTRO, NORMA/FILL-IN, VAR/FILL-IN, SYNCHRO/END-
ING
Accomp volume: 0 to 127 (128 steps)
Free session
Number of patterns 100 (auto-accompaniment in accordance with selected chord progres-
sion)
Memory function
Songs: 2
Recording tracks: 6 (2 through 6 are melody tracks)
Recording methods: Real-time, step
Memory capacity: Approximately 5,200 notes (total for two songs)
Edit function: Equipped
Demo tunes: 2
Synthesizer function
Parameters: PCM set, amp envelope set, attack rate, release rate, pitch envelope set,
pitch, level, touch sense, pan
Mixer function
Channels: 16
Parameters: Program change number, volume, expression, pan, coarse tuning, fine
tuning, on/off/solo
MIDI: 16 multi-timbre receive, GM Level 1 standard
Other functions
Pitch bend range: 12 semitones upwards and downwards
Transpose: 25 steps (–12 semitones to +12 semitones)
Tuning: Variable (A4 = approximately 440 Hz ±50 cents)
CONTENTS Page
Specifications............................................................................................................................................ 1
Block Diagram........................................................................................................................................... 3
Circuit Description..................................................................................................................................... 4
Adjustment .............................................................................................................................................. 11
Major Waveforms .................................................................................................................................... 13
Printed Circuit Boards ............................................................................................................................. 14
Schematic Diagrams ............................................................................................................................... 15
Exploded View ........................................................................................................................................ 20
Parts List ................................................................................................................................................. 21

— 2 —
ELECTRICAL
Current drain with 9 V DC:
No sound output 200 mA ±20 %
Maximum volume 810 mA ±20 %
with 12 keys from C3 to B3 pressed in Square wave tone
Volume: maximum, Touch response: maximum
Reverb: Hall
Phone output level (Vrms with 8 Ωload each channel):
with key C6 pressed in Bassoon tone R-ch 100 mV ±20 %
Speaker output level (Vrms with 4 Ωload each channel):
with key F5 pressed in Bassoon tone R-ch 1000 mV ±20 %
Minimum operating voltage: 6.3 V
About General MIDI
General MIDI standardizes MIDI data for all sound source types, regardless of manufacturer. General MIDI
specifies such factors as tone numbering, drum sounds, and available MIDI channels for all sound sources.
This standard makes it possible for all MIDI equipment to reproduce the same nuances when playing
General MIDI data, regardless of the manufacturer of the sound source.
This keyboard supports General MIDI, so it can be used to play commercially available pre-recorded
General MIDI data and General MIDI data send to it from a personal computer.
Terminals
MIDI terminals: IN, OUT
Assignable terminal: Standard jack (sustain, sostenuto, soft, rhythm start/stop)
Headphone/Output terminal: Stereo standard jack
Output Impedance: 120 Ω
Output Voltage: 4.5 V (RMS) MAX
Power supply terminal: 9 V DC
Power supply Dual power supply system
Batteries: Six D-size batteries
Battery life: Approximately 5 hours continuous operation on manganese batteries
AC adaptor: AD-5
Auto power off: Turns power off approximately six minutes after last key operation. En-
abled under battery power only, can be disabled manually.
Power consumption: 9 V --- 7.7 W
Speaker output: 2.5 W + 2.5 W
Dimensions (HWD): 93.1 ×37.3 ×12.0 cm (36 11/16 ×14 11/16 ×4 3/4 inches)
Weight: Approximately 5.0 kg (11.0 lbs) (without batteries)

— 3 —
KC0 ~ KC7
FI0 ~ FI9
SI0 ~ SI9
KI0 ~ KI2
PB0 ~ PB3
P10, P13
P14, P17
Working Storage
RAM (256K-bit)
LSI4
TC55257DFL-70L(EL)
MIDI
EA0 ~
EA14
EIO0 ~
EIO7
Sound Source ROM
(16M-bit)
LSI3
UPD23C16000WGX-
C51
LRCK
SO
BCK
D/A Converter
LSI6
UPD6379GR
Filter
Q107 ~ Q110
Main
Volume
Power Amplifier
IC101
TA8248K
Keyboard
MA0 ~ MA19
Power Supply Circuit
Q101 ~ Q105,
D106/107, D190
VCC AVDD VDD
DVDDLVDD VC
APO
Effect RAM
(256K-bit)
LSI5
TC55257DFL-
70L(EL)
MD0
~
MD7
Speakers
Output
MA0
~
MA14
MA0, MA1 LRCK, SO
BCK, SINK
LCD
LCD Driver
LSI401
SED1278F0A
SEG1 ~ SEG40
INOUT
Reset IC
IC1
RN5VD40AA
RESET
COM1 ~ COM16
DSP
LSI2
HG51B277FB-1
MD0 ~ MD15 CPU
LSI1
UPD913GF-3BA
Buttons
Assingnable Jack
PB4
VDD Power Switch
@
NMI
FI10
P23
PA0 ~ PA5
PB0 ~ PB3
BLOCK DIAGRAM

— 4 —
CIRCUIT DESCRIPTION
KEY MATRIX
BUTTON MATRIX
0AP1AP2AP3AP
0BP
egnaRlluF
drohC ortnI hcuoT esnopseR breveR
1BPderegniF /lamroN
nI-lliF noisseSeerF pmoccA emuloV
2BPdrohCoisaC /orhcnyS
gnidnE reyaLhtnyS
3BPlamroN /noitairaV
nI-lliFtilpSrexiM
0CK1CK2CK3CK4CK5CK6CK7CK
01IF
daPmurD
3daPmurD 1dneBhctiP
H
H
retnE
96+ enoT
0IK daPmurD
4daPmurD 2dneBhctiP
G
/tratS
potS 83— mhtyhR
1IK daPmurD
5petS opmeT
H
E
720 omeD
2IK daPmurD
6yromeM opmeT
G
F
451 /esopsnarT
IDIM/enuT
KC0 KC1 KC2 KC3 KC4 KC5 KC6 KC7
FI0 C2 (1) C#2 (1) D2 (1) D#2 (1) E2 (1) F2 (1) F#2 (1) G2 (1)
SI0 C2 (2) C#2 (2) D2 (2) D#2 (2( E2 (2) F2 (2) F#2 (2) G2 (2)
FI1 G#2 (1) A2 (1) A#2 (1) B2 (1) C3 (1) C#3 (1) D3 (1) D#3 (1)
SI1 G#2 (2) A2 (2) A#2 (2) B2 (2) C3 (2) C#3 (2) D3 (2) D#3 (2)
FI2 E3 (1) F3 (1) F#3 (1) G3 (1) G#3 (1) A3 (1) A#3 (1) B3 (1)
SI2 E3 (2) F3 (2) F#3 (2) G3 (2) G#3 (2) A3 (2) A#3 (2) B3 (2)
FI3 C4 (1) C#4 (1) D4 (1) D#4 (1) E4 (1) F4 (1) F#4 (1) G4 (1)
SI3 C4 (2) C#4 (2) D4 (2) D#4 (2) E4 (2) F4 (2) F#4 (2) G4 (2)
FI4 G#4 (1) A4 (1) A#4 (1) B4 (1) C5 (1) C#5 (1) D5 (1) D#5 (1)
SI4 G#4 (2) A4 (2) A#4 (2) B4 (2) C5 (2) C#5 (2) D5 (2) D#5 (2)
FI5 E5 (1) F5 (1) F#5 (1) G5 (1) G#5 (1) A5 (1) A#5 (1) B5 (1)
SI5 E5 (2) F5 (2) F#5 (2) G5 (2) G#5 (2) A5 (2) A#5 (2) B5 (2)
FI6 C6 (1) C#6 (1) D6 (1) D#6 (1) E6 (1) F6 (1) F#6 (1) G6 (1)
SI6 C6 (2) C6# (2) D6 (2) D#6 (2) E6 (2) F6 (2) F#6 (2) G6 (1)
FI7 G#6 (1) A6 (1) A#6 (1) B6 (1) C7 (1)
SI7 G#6 (2) A6 (2) A#6 (2) B6 (2) C7 (2)

— 5 —
Reset IC
IC1
RN5VD40AA
DSP
LSI2
HG51B277FB-1
VDD
Reset signal
To power supply circuit
VDD Battery set
RESET
VDD
POWER
From power switch NMI
APO
PLE
CPU
LSI1
UPD913GF-3BA
SCKO
F#3 G#3 A#3 C#4 D#4 F#4 G#4 A#4 C#5 D#5 F#5 G#5 A#5
F3 G3 A3 B3 C4 D4 E4 F4 G4 A4 B4 C5 D5 E5 F5 G5 A5 B5 C6
D#3
C2 D2 E2 F2 G2 A2 B2 C3 D3 E3 B6A6G6F6E6D6 C7
C#3A#2G#2
F#2D#2
C#2 A#6 G#6F#6D#6
C#6
Key
Second contact (2) First contact (1) FI
KC
SI
Note: Each key has two contacts,
the first conatct (1) and second contact (2).
POWER SUPPLY CIRCUIT
The power supply circuit generates five voltages as shown in the following table. VDD voltage is always
generated. The others are controlled by APO signal from the CPU.
NOMENCLATURE OF KEYS
RESET CIRCUIT
When batteries are set or an AC adapter is connected, the reset IC provides a low pulse to the CPU. The
CPU then initializes its internal circuit, and clears the working storage RAM.
When the power switch is pressed, the CPU receives a low pulse of POWER signal. The CPU sends APO
signal to the power supply circuit, also sends a reset signal to the DSP.
emaNegatloVfonoitareporoF
DDVV5+ MARtceffE,MARegarotsgnikroW,MORecruosdnuoS,PSD,CIteseR,UPC
DDVDV5+kcajIDIM,kcajniatsuS,kcajrewoP,revirdDCL
DDVAV5+retliF,CAD
DDVLV6.5+revridDCL
CCVV9+pmaltoliP,reifilpmarewoP

— 6 —
CPU (LSI1: UPD913GF-3BA)
The 16-bit CPU contains a 1k-byte RAM, three 8-bit I/O ports, two timers, a key controller and serial interfaces.
The CPU detects key velocity by counting the time between first-key input signal FI and second-key SI from
the keyboard. The CPU reads sound data and velocity data from the sound source ROM in accordance with
the selected tone; the CPU can read rhythm data simultaneously when a rhythm pattern is selected. Then the
CPU provides 16-bit serial sound data to the DSP. The CPU also controls MIDI input/output and stores
sequencer data into the working storage RAM.
The following table shows the pin functions of LSI1.
.oNniPlanimreTtuO/nInoitcnuF
10DXTtuOtuptuolangisIDIM
20DXRnItupnilangisIDIM
30KCStuOtuptuolangis)ffOrewoPotuA(OPA
5,42DXR,1DXTtuO/nIrevirdDCLehtrofsubataD
61KCStuOtuptuoeslupgnizinorhcnysZHM1
7CCVAnIecruos)V5+(DDVD
80NAnI .lanimretnoitcetedrotpadaCA V0semocebdnaseirettabybderewopsidraobyekehtnehwV5+ .detcennocsirotpadaCAnehwnoitcnufOPAehtlecnacot
91NA— .dnuorgotdetcennoC.desutoN
01DNGAnIecruos)V0(dnuorG
11KCBtuOtuptuokcolctiB
21OStuOtuptuoataddnuoslaireS
31KCRLtuOtuptuokcolcdroW
41DNGnIecruos)V0(dnuorG
61,511TLX,0TLXtuO/nItuptuo/tupnikcolczHM02
71CCVnIecruosV5+
91,811DM,0DMnIlanimretnoitcelesedoM
02BTSRnItupnilangisteseR
12IMNnItupnilangisNOrewoP
2201P/TNItuO/nIrevirdDCLehtrofsubataD
03~32
3IF~0IF
3IS~0IS
nIlangistupniyekroflanimreT
83~137CK~0CKtuOlangisnacsyekroflanimreT
64~93
7IF~4IF
7IS~4IS
nIlangistupniyekroflanimreT
05~74
9IF,8IF
9IS,8IS
—desutoN
1501IFnIlangistupninottubroflanimreT
2532P/01IStuOrevirdDCLehtroflangiselbanepihC
55~352IK~0IKnIlangistupninottubroflanimreT
65BNWMtuOPSDehtroflangiselbaneetirW
67~7571AM~0AMtuOsubsserddA
770BSCMtuOMORecruosdnuosehtroftuptuolangiselbanepihC
871BSCMtuOdesutoN
972BSCMtuOPSDehtroftuptuolangiselbanepihC

— 7 —
DIGITAL SIGNAL PROCESSOR (LSI2: HG51B227FB-1)
The DSP receives 16-bit serial sound data output from the CPU and adds the selected effect to the sound data
using the effect RAM. Then the DSP provides the sound data to the DAC. The DSP also controls button input/
output.
The following table shows the pin functions of LSI2.
.oNniPlanimreTtuO/nInoitcnuF
08CCVnIecruosV5+
18DNGnIecruos)V0(dnuorG
28BDRMtuOMORecruosdnuosehtroftuptuolangiselbanedaeR
89~3851DM~0DMtuO/nIsubataD
99ELPtuOPSDehtroftuptuolangisteseR
00171PtuO/nIrevirdDCLehtrofsubataD
.oNniPlanimreTtuO/nI noitcnuF
08,3~13BP~0BPnIslanimrettupninottuB
44BPnItupnikcaJELBANGISSA
5OStuOCADehtroftuptuoataddnuoslaireS
6OKCWtuOCADehtroftuptuokcolcdroW
73DDVnIecruosV5+
8TSET—desutoN
9BSERnItupnilangisteseR
012SSVnIecruos)V0(dnuorG
21,11TUOX,NIXtuO/nItuptuo/tupnikcolczHM02
31IKCWnIUPCehtmorftupnikcolcdroW
41ISnIUPCehtmorftupniataddnuoslaireS
51IKCBnIUPCehtmorftupnikcolctiB
61CNISnItupnieslupgnizinorhcnyszHM1
712DDVnIecruosV5+
52~817OI~0OItuO/nIsubataD
62BECRtuOMARegarotsgnikrowehtroftuptuolangiselbanepihC
723SSVnIecruos)V0(dnuorG
821DAnIsubsserddA
92BEOtuOMARegarotsgnikrowroflangiselbanetuptuO
03BEWnIlangiselbaneetirW
133DDVnIecruosV5+
232ECnI.evitcahgiH.tupnilangiselbanepihC
330DAnIsubsserddA
43B1ECnI.evitcawoL.tupnilangiselbanepihC
34,14~537OIE~0OIEtuO/nIMARtceffeehtrofsubataD
,84~64,44,24
16,95~15
21AE~0AEtuOMARtceffeehtrofsubsserddA
54BECEtuOMARtceffeehtroftuptuolangiselbanepihC

Pin No. Terminal In/Out Function
49 EOEB Out Read enable signal output for the effect RAM
50 VSS3 In Ground(0V) source
60 EWEB Out Write enable signal output for the effect RAM
62,66,70,74,78 VSS2 In Ground source
63,67,71,75,79 VDD2 In +5 V source
64,65,68,69,
72,73 PA0~PA5 Out Button scan signal output
76,77 PA6/7 Out Not used
LCD DRIVER (LSI401:SED1278F0A)
The LCD driver can drive a dot matrix LCD having 40 segment and 16 common lines. The LSI contains 240
graphic symbols in the built-in character generator ROM, and stores 80 characters in the built-in display data
RAM. In accordance with command from the CPU, the LSI is capable of displaying up to 16 characters
simultaneously. the following table shows the pin functions of LSI 401.
Pin No. Terminal In/Out Function
1 ~ 22,
63 ~ 80 SEG1 ~ SEG40 Out Segment signal output
23 VSS GND (0 V) source
24, 25 OSC1,OSC2 In/Out Terminals for the built-in clock pulse generator. The external
resistor connected determines the oscillation frequency.
26 ~ 30 V1~V5 In LCD drive voltage input. Those voltages are used for generating the stepped pulse of the
LCD drive signals.
31, 32 LP,XCLS Not used
33 VDD In DVDD (+5 V) source
34, 35 FR,DO Not used
36 RS In Data/command determination terminal.
High: data, Low: command
37 R/W In Read/write terminal. High: read, Low: write
38 E In Chip enable signal High: enable, the writing is done at fall edge.
Low: disable
39 ~ 42 DB0 ~ DB3 Not used. Connected to GND (0 V)
43 ~ 46 DB4 ~ DB7 In/Out Data bus
47 ~ 62 COM1 ~ COM16 Out Common signal/output
- 8 -

— 9 —
2.2K
270PF
560PF
0.01 µF
AG AG AG
AG
AG
22 ΩQ110
2SC1740SQ.R
AG
AVDD
AVDD
10K
18K
6.3V 1000 µ
22K
1K
Q107
2SC1740SQ.R
10 V22 µFrom DAC
To main volume
+
10K10K10K
150PF
Synch signal
Data
Word clock
Bit clock
Data
Word clock
Bit clock
DSP
LSI2
HG51B277FB
DAC
IC6
UPD6379GR
CPU
LSI1
UPD913GF-3BA
L OUT
R OUT
SI
LRCK
CLK
SO
WCKO
SCK1
SO
LRCK
BCK
SINC
SI
WCKI
BCKI
FILTER BLOCK
Since the sound signals from the DAC are stepped waveforms, the filter block is added to smooth the
waveforms.
DAC (LSI6: UPD6379GR)
The DAC receives 16-bit serial data output from the DSP. The data contains digital sound data of the
melody, chord, bass, and percussion for the right and left channels. The DAC converts the data into
analog waveforms and output them to each channel separately.

— 10 —
POWER AMPLIFIER (IC101: TA8248K)
The power amplifier is a two-channel amplifier with standby switch.
The following table shows the pin function of IC101.
.oNniPlanimreTtuO/nInoitcnuF
1CN—desutoN
22.S.B— roticapacpartstoobaroflanimreT
32TUOtuOtuptuo2lennahC
4CCVnIecruosV9+
51TUOtuOtuptuo1lennahC
61.S.B— roticapacpartstoobaroflanimreT
7DNGrewoPnIecruos)V0(dnuorG
8ybdnatSnInO:V9+,ffO:V0.tupnilangislortnocrewoP
9CD— roticapacgnilpuocedaroflanimreT
011FNnItupnikcabdeefevitageN
111NInItupni1lennahC
212NInItupni2lennahC
312FNnItupnikcabdeefevitageN
51,41DNGerPnIecruos)V0(dnuorG

— 11 —
3) Equipment connection/Procedure
Vop voltage setting
Output
Set Voltmeter
TP2
Input
Connection Input Point Input Signal Adjust Output Connection Output Point Adjust for
VR410 Voltmeter TP2 Adjust for 4.4 ±0.1 V reading
on voltmeter.
Makefineadjustmentaccord-
ing to the next instruction.
51.74°
LCD
Eye Watching the LCD at a 51.74°angle to the horizontal, adjust Vop
voltage so that unenergized segments are seen dimly.
ADJUSTMENT
DISPLAY PCB
1) Items to be adjusted:
metItnemurtsnIgnirusaeM
gnittesegatlovpoVretemtloV
2) Adjustment and Test Point Locations
VR410
TP2
(TOP VIEW)

— 12 —
MAJOR WAVEFORMS
1NMI signal
JE connector pin 16
2APO signal
JD connector pin 9
5Key scan signal KC0
JB connector pin 1
6Key scan signal KC1
JB connector pin 2
3Button scan signal PA0
JD connector pin 14
4Button scan signal PA1
JE connector pin 14
9DAC output (L-ch)
JD connector pin 6
0Dac output (R-ch)
JD connector pin 7
ASound signal (L-ch)
JF connector pin 2
BSound signal (R-ch)
JF connector pin 1
7RS signal PA4
JC connector pin 7
8R/W signal PA5
JC connector pin 6
Tone : Whistle (078)
Key : A4
Touch response : Off
Reverb : Off
Volume : Maximum
1
2
CH1
CH2
3
4
CH1
CH2
5
6
CH1
CH2
7
8
CH1
CH2
9
0
CH1
CH2
A
B
CH1
CH2
0.5 s 20 ms
50 µs0.5 s
1 ms 1 ms
CH1: 5 V
–CH2: 5 V
–CH1: 5 V –CH2: 5 V
–
CH1: 5 V
–CH2: 5 V
–CH1: 5 V –CH2: 5 V –
CH1: 50 mV
˜CH2: 50 mV
˜CH1: 50 mV ˜CH2: 50 mV ˜
Power button ON
Power ON

— 13 —
PRINTED CIRCUIT BOARDS
Sub PCB JCM462-MA2M
Main PCB JCM462-MA1M
Top View
Top View Bottom View
5
6
9
10
2
3
7
8
1
4
12 11

— 14 —
SCHEMATIC DIAGRAMS
Main PCB JCM462-MA1M
10 9
7
8
2
3
56
1
4

— 15 —
Sub PCB JCM462-MA2M/Volume PCB JCM462-MA3M
12 11

— 16 —
Display PCB JCM462-LCD1M

— 17 —
Keyboard PCBs JCM617T-KY1M/KY2M

— 18 —
LCD
Common
Segment
SEG 1 SEG 2 SEG 3 SEG 4 SEG 5 SEG 6 SEG 7 SEG 8 SEG 9 SEG10 SEG11 SEG12 SEG13 SEG14 SEG15 SEG16 SEG17 SEG18 SEG19 SEG20 SEG21 SEG22 SEG23 SEG24 SEG25 SEG26 SEG27 SEG28 SEG29 SEG30 SEG31 SEG32 SEG33 SEG34 SEG35 SEG36
COM13 COM14 COM15 COM16 SEG17 SEG 8 SEG 9 SEG10 SEG32 COM 9 SEG33 SEG34 SEG35 SEG36 SEG37 SEG38 SEG39 SEG40 SEG 3 COM12 SEG 2 SEG 1 SEG11 COM 9 SEG12 COM16 SEG29 COM15 COM14 COM13 SEG30 SEG31 SEG32 COM12 COM11 COM10 SEG20 COM 9 SEG19 SEG18 COM13 COM14 COM15 COM16 COM10 COM12 SEG21 COM11
SEG37 SEG38 SEG39 SEG40 COM 1 COM 2 COM 3 COM 4 COM 5 COM 6 COM 7 COM12
SEG 1 SEG 2 SEG 3 SEG 4 SEG 5 SEG 6 SEG 7 SEG 8 SEG 9 SEG10 SEG11 SEG12 SEG13 SEG14 SEG15 SEG16 SEG17 SEG18 SEG19 SEG20 SEG21 SEG22 SEG23 SEG24 SEG25 SEG26 SEG27 SEG28 SEG29 SEG30 SEG31 SEG32 SEG33 SEG34 SEG35 SEG36
COM13 COM14 COM15 COM16 SEG17 SEG 8 SEG 9 SEG10 SEG32 COM 9 SEG33 SEG34 SEG35 SEG36 SEG37 SEG38 SEG39 SEG40 SEG 3 COM12 SEG 2 SEG 1 SEG11 COM 9 SEG12 COM16 SEG29 COM15 COM14 COM13 SEG30 SEG31 SEG32 COM12 COM11 COM10 SEG20 COM 9 SEG19 SEG18 COM13 COM14 COM15 COM16 COM10 COM12 SEG21 COM11
SEG37 SEG38 SEG39 SEG40 COM 1 COM 2 COM 3 COM 4 COM 5 COM 6 COM 7 COM12

— 19 —
EXPLODED VIEW
20
26
15
13
21
27
11
10
8
1
R-3
7
3
6
14
25 R-1
23
12
17 18
24
14 16
22
9
2
R-2
5
4
19