CML Microcircuits PE0403 User manual

CMLMicrocircuits
COMMUNICATIONSEMICONDUCTORS
PE0403
Evaluation Kit
User Manual

2014 CML Microsystems Plc
um0403/1 July 2014 Provisional Issue
Features
PE0403 - 724x for CMX724x family FirmASIC®
product range evaluation; fitted with CMX7240
to emulate CMX724x device performance
PE0403 - 734x for CMX734x family FirmASIC®
product range evaluation; fitted with CMX7340
to emulate CMX734x device performance
Instrumentation interface
(requires an additional –5 volt supply):
o50Output signal drivers
oInstrumentation interface to CMX7240 single-
ended input signals (PE0403 - 724x only)
oInstrumentation interface to CMX7340
differential input signals (PE0403 - 734x only)
On-board supply regulators operate from a
single 5 volt supply
19.2MHz oscillator or external clock input
to the on-board reference device
Command and control by PC via the
PE0002 Interface Card or via the user’s
microcontroller emulator or development
application
On-board access to all CMX7240/CMX7340
signals, commands and data
C-BUS Master for CMX7240/CMX7340
control of other CML Evaluation Kits

Evaluation Kit for CMX724x/CMX734x PE0403

2014 CML Microsystems Plc 2 um0403/1
1. Brief Description
The PE0403 Platform Evaluation Kit is designed to assist in the evaluation and application development of
the CMX724x and CMX734x ranges of FirmASIC®products. The kit is in the form of a populated PCB
comprising a generic CMX7240 or CMX7340 IC and the appropriate supporting components and circuitry.
ThePE0403 - 724x is fitted with a CMX7240 and the PE0403 - 734x is fitted with a CMX7340.
The board also incorporates all of the necessary power-supply regulation facilities for operation from a
single 5 volt supply, or a dual +/-5 volt supply if the instrumentation interface is required.
The board is fitted with a C-BUS connector allowing the PE0403 to be operated by connection to either of
the two C-BUS ports on a CML PE0002 Interface Card, and used with the associated PC GUI software, or
by direct connection between the CMX7240/CMX7340 C-BUS and the user's µC development application
or emulation system.
The common CMX724x/CMX734x Function ImageTM (FI) can be loaded, on power-up, directly into the on-
board target IC (CMX7240/CMX7340) using the PE0002 interface or the user's system.
Function images suitable for the CMX724x/CMX734x range of products can be downloaded from the CML
Technical Portal.

Evaluation Kit for CMX724x/CMX734x PE0403

2014 CML Microsystems Plc 3 um0403/1
CONTENTS
Section Page
1. Brief Description ..................................................................................................2
2. Preliminary Information.......................................................................................6
2.1. Laboratory Equipment .....................................................................................6
2.2. Handling Precautions.......................................................................................6
2.2.1. Static Protection........................................................................................6
2.2.2. Contents - Unpacking................................................................................6
2.3. Approvals.........................................................................................................6
3. Quick Start............................................................................................................7
3.1. With PE0002....................................................................................................7
3.1.1. Setting-Up .................................................................................................7
3.1.2. Operation ..................................................................................................7
3.2. Without PE0002...............................................................................................8
4. Signal Lists...........................................................................................................9
5. Circuit Schematics and Board Layouts ...........................................................15
6. Detailed Description ..........................................................................................17
6.1. Hardware Description....................................................................................17
6.1.1. Power Supplies .......................................................................................17
6.1.2. Clock Options..........................................................................................17
6.1.3. Control Interface......................................................................................18
6.1.4. Baseband Interfacing..............................................................................18
6.1.5. Instrumentation Interface ........................................................................18
6.1.6. Audio Interfaces......................................................................................19
6.1.7. Digital Interfacing ....................................................................................19
6.2. Adjustments and Controls .............................................................................19
6.3. Function ImageTM...........................................................................................20
6.3.1. Load Function ImageTM via C-BUS.........................................................20
6.3.2. Load Function ImageTM from Serial Memory Device ..............................21
6.3.3. Program Serial Memory..........................................................................22
6.4. Evaluation Tests............................................................................................22
6.4.1. Write to and Read from a Register .........................................................22
6.4.2. Check Analogue Path and Set Input Gain ..............................................23
6.4.3. Check Analogue Path and Set Output Gain............................................23
6.4.4. Generate Two External Digital Clocks ....................................................24
6.5. Troubleshooting.............................................................................................24
7. Performance Specification................................................................................25
7.1. Electrical Performance ..................................................................................25
7.1.1. Absolute Maximum Ratings ....................................................................25
7.1.2. Operating Limits......................................................................................25
7.1.3. Operating Characteristics........................................................................26
7.1.4. Operating Characteristics –Timing Diagrams........................................26

Evaluation Kit for CMX724x/CMX734x PE0403

2014 CML Microsystems Plc 4 um0403/1
Table Page
Table 1 Signal List..............................................................................................................9
Table 2 Test Points ..........................................................................................................12
Table 3 Jumpers ..............................................................................................................13
Table 4 LEDs....................................................................................................................14
Table 5 Clock Select Jumper Positions............................................................................17
Table 6 CMX7240/CMX7340 Register Settings –Analogue Path and Input Gain...........23
Table 7 CMX7240/CMX7340 Register Settings –Analogue Path and Output Gain........23
Table 8 CMX7240/CMX7340 Register Settings –External Digital Clocks.......................24
Figure Page
Figure 1 Block Diagram......................................................................................................5
Figure 2 PE0403 used with PE0002 ..................................................................................7
Figure 3 PCB Layout: Top................................................................................................15
Figure 4 PCB Layout: Bottom...........................................................................................16
Figure 5 Audio Input Jumper Settings..............................................................................19
Figure 6 Function Image™Load Tab –via C-BUS..........................................................20
Figure 7 Function Image™Load Tab –from Serial Memory (not supported) .................21
Figure 8 Program Serial Memory Tab (not supported) ....................................................22
It is always recommended that you check for the latest product datasheet version from the Datasheets
page of the CML website: [www.cmlmicro.com].
History
Version
Changes
Date
1
Initial release
1st July 2014

Evaluation Kit for CMX724x/CMX734x PE0403

2014 CML Microsystems Plc 5 um0403/1
CMX7240/
CMX7340
+V, J18
+3V3D
+4V0
J19 +V
Clocks
(19.2MHz
default)
SSP/GPIO, J6
C-BUS
Master,
J20
Instrumentation
Interface
DISC/ALT_IN MOD1/2_OUT
Supplies
-4V0
-V
Auxiliary
ADC & DAC,
J8
C-BUS&
Boot
Control,J7
+3V3A
Audio
Output,
J1
Mic
Input,
J21
Figure 1 Block Diagram

Evaluation Kit for CMX724x/CMX734x PE0403

2014 CML Microsystems Plc 6 um0403/1
2. Preliminary Information
2.1. Laboratory Equipment
The following laboratory equipment is needed to use this evaluation kit:
A 5 volt dc regulated power supply (or +/- 5 volt supply when using the instrumentation interface).
If the PE0403 is being used with the PE0002 Interface Card, the following items will also be required:
An IBM compatible PC with the following requirements:
One of the following Windows operating systems installed: 2000sp4, XPsp2, Vista or Win7
USB port
Minimum screen resolution 800 x 600. Recommended resolution 1024 x 768.
A USB type A male to mini B male cable.
Software application ES000243.exe, or later version, installed on the PC.
2.2. Handling Precautions
Like most evaluation kits, this product is designed for use in office and laboratory environments. The
following practices will help ensure its proper operation.
2.2.1. Static Protection
This product uses low-power CMOS circuits that can be damaged by electrostatic
discharge. Partially-damaged circuits can function erroneously, leading to misleading
results. Observe ESD precautions at all times when handling this product.
2.2.2. Contents - Unpacking
Please ensure that you have received all of the items on the separate information sheet (EK0403) and
notify CML within seven working days if the delivery is incomplete.
2.3. Approvals
This product is not approved to any EMC or other regulatory standard. Users are advised to
observe local statutory requirements, which may apply to this product.

Evaluation Kit for CMX724x/CMX734x PE0403

2014 CML Microsystems Plc 7 um0403/1
3. Quick Start
This section is divided into two sub-sections. The first is for those users who are using the PE0403 with a
PE0002 controller card and its Windows PC GUI software. The second is for users who are using the
PE0403 by itself, without a PE0002.
3.1. With PE0002
Note that the C-BUS connector, J7, and the power connector J18 are both right angle headers and are
designed to plug directly into sockets J5 (C-BUS 1 port) and J9 respectively, or sockets J3 (C-BUS 2 port)
and J7 respectively, of a PE0002.
3.1.1. Setting-Up
Refer to the PE0002 user manual and follow the instructions given in the quick start section. Ensure the
jumpers on J2 are open circuit. The CMX7240/CMX7340 BOOTEN1 and BOOTEN2 pins are driven from
the PE0002.
The basic arrangement, when used with the PE0002, is shown below:
PE0002
PC
USB Cable
PE0403
J18
J2
J3 or J5
C-BUS
Direct Connections
J2
J8
J9 or J7
+V
J7
Power
Supply
Figure 2 PE0403 used with PE0002
3.1.2. Operation
The Function ImageTM (FI) must now be loaded into the CMX7240/CMX7340 device. A FI is provided as a
‘C’ type header file and must be obtained from the CML Project Resource Portal. This can be loaded
directly from a file on the PE0002 host PC to the CMX7240/CMX7340.
The PE0403 should now be ready for evaluation of the CMX7240/CMX7340 with the chosen FI.

Evaluation Kit for CMX724x/CMX734x PE0403

2014 CML Microsystems Plc 8 um0403/1
3.2. Without PE0002
As an alternative to using the PE0002 controller kit, users may control the CMX7240/CMX7340 target
device with a user-supplied host controller card. The C-BUS connections are made via connector J7.
The power-up, or boot state of the CMX7240/CMX7340 BOOTEN1 and BOOTEN2 pins may be set using
jumpers on header, J2. Consult the relevant CMX734x documentation for valid modes. A jumper in-circuit
on header, J2, corresponds to a ‘0’ state on the boot pins. Alternatively the state of these pins may be set
via the connector, J7, pins 13 and 14. By default, 47kΩ pullup resistors on the PE0403 board provide a ‘1’
state on each of the two BOOTEN pins.
A FI for the CMX7240/CMX7340 device must be included in the customer’s host system and loaded into
the CMX7240/CMX7340 device on power-up.

Evaluation Kit for CMX724x/CMX734x PE0403

2014 CML Microsystems Plc 9 um0403/1
4. Signal Lists
Table 1 Signal List
CONNECTOR PINOUT
Connector
Ref.
Connector
Pin No.
Signal
Name
Signal
Type
Description
J1
TIP
SPKR
O/P
AUDIO
RING
-
(O/P)
(dependent on the setting of JP4, see 6.1.6)
SLEEVE
GNDA
PWR
Analogue ground.
J4
-
CLK EXT
I/P
External input option for CMX7240/CMX7340
clock.
J6
1,4,5,6,
9,10,18
-
N/C
Do not make any connection to these pins
2
GPIO1
BI
General purpose I/O pin.
3
GPIO2
BI
General purpose I/O pin.
7
GPIOA
BI
General purpose I/O pin.
8
GPIOB
BI
General purpose I/O pin.
11
SYSCLK2
O/P
CMX7240/CMX7340 system clock 2 output.
12
SYSCLK1
O/P
CMX7240/CMX7340 system clock 1 output.
13
MOSI
O/P
SSP Master output, slave input.
14
SSOUT/
FSO
BI
SSP Frame sync.
15
MISO
I/P
SSP Master input, slave output.
16
EPSCSN
O/P
EEPROM Chip Select
17
SSPCLK
BI
SSP Clock.
19, 20
GNDD
PWR
Digital supply ground.
J7
3, 5, 7, 9,
15 to 20
-
N/C
Do not make any connection to these pins
1
RESET
I/P
CMX7240/CMX7340 Hardware Reset Pin
2
CSN
I/P
Chip select. Connects to host C.
4
CDATA
I/P
Serial Data input. Connects to host C.
6
SCLK
I/P
Serial clock input. Connects to host C.
8
RDATA
O/P
Serial data output. Connects to host C.

Evaluation Kit for CMX724x/CMX734x PE0403

2014 CML Microsystems Plc 10 um0403/1
CONNECTOR PINOUT
Connector
Ref.
Connector
Pin No.
Signal
Name
Signal
Type
Description
10
IRQN
O/P
Interrupt request. Connects to host C.
11, 12
GNDD
PWR
Digital supply ground.
J7
13
BOOTEN1
I/P
CMX7240/CMX7340 Hardware Boot Control.
14
BOOTEN2
I/P
CMX7240/CMX7340 Hardware Boot Control.
J8
1
AUXADC4
I/P
Auxiliary ADC input.
2
AUXDAC1
O/P
Auxiliary DAC output.
3
AUXADC3
I/P
Auxiliary ADC input.
4
AUXDAC2
O/P
Auxiliary DAC output.
5
AUXADC2
I/P
Auxiliary ADC input.
6
AUXDAC3
O/P
Auxiliary DAC output.
7
AUXADC1
I/P
Auxiliary ADC input.
8
AUXDAC4
O/P
Auxiliary DAC output.
9, 10
GNDA
PWR
Analogue supply ground.
J9
1 #
}IP1P
O/P
Channel 1(DISC) input positive, instrumentation
output.
2 #
I/P
Channel 1(DISC) input positive.
3
}IP1N
O/P
Channel 1(DISC) input negative, instrumentation
output.
4
I/P
Channel 1(DISC) input negative.
5, 6
GNDA
PWR
Analogue ground.
7
}IP2N
O/P
Channel 2(ALT) input negative, instrumentation
output.
8
I/P
Channel 2(ALT) input negative.
9 #
}IP2P
O/P
Channel 2(ALT) input positive, instrumentation
output.
10 #
I/P
Channel 2(ALT) input positive.
J10
1
ALT
I/P
Channel 2(ALT) instrument input, single ended.
J11
1
DISC
I/P
Channel 1(DISC) instrument input, single ended.