Coactive Aesthetics CA386-N1 User manual

CA386-N1
Networked
Embedded PC
REFERENCE
MANUAL
AESTHETICS, INC
VERSION 1.0

CA386-N1
Reference Manual
Disclaimers
Coactive Aesthetics reserves the right to make changes without further notice to any product herein to improve reliability,
function, or design. Coactive Aesthetics does not assume any liability arising out of the application or use of any product
or circuit described herein; neither does it convey any license under its patent rights nor the rights of others. Coactive
Aesthetics products are not authorized for use as components in life support devices or systems intended for surgical
implant into the body or intended to support or sustain wet life. Buyer agrees to notify Coactive Aesthetics of any such
intended end use whereupon Coactive Aesthetics shall determine availability and suitability of its product or products for
use intended.
Use, duplication, or disclosure by the United States Government is subject to restrictions as set forth in subparagraph (c)
(1) (ii) of the Rights in Technical Data and Computer Software clause at CFR 52.227-7013. Coactive Aesthetics, Inc. 4000
Bridgeway Suite 303, Sausalito, CA 94965.
Trademarks
Motorola is a registered trademark of Motorola, Inc.
Intel is a registered trademark of Intel Corp.
UNIX is a registered trademark of American Telephone and Telegraph Co.
IBM is a registered trademark of International Business Machines, Inc.
MS-DOS is a registered trademark of Microsoft Corp.
Echelon, LON, LonWorks, LonBuilder, LonManager, LonTalk, LonUsers, NEURON, 3120, and 3150 are trademarks of
Echelon Corporation.
All other trademarks are the property of their respective owners.
Copyrights
Copyright (c) 1994-1995 by Coactive Aesthetics.
All rights reserved.

Manual Revision 4
Covers:
CA386-N1 Hardware, Revision C
Programming the CA386-N1, Version 1.0
Coactive Aesthetics
4000 Bridgeway, Suite 303
Sausalito, CA 94965
[phone]
[phone] (FAX)
[email protected] (Email)
http://www.coactive.com (WWW)

Table of Contents
Table of Contents
Chapter 1 Hardware
1.1 Introduction 1
1.2 Specifications 2
1.3 Related Documentation 2
1.4 Power 2
1.5 Connectors and Jumpers 3
1.5.1 Overview 3
1.5.2 Flash Loader Start-up (JP1) 5
1.5.3 i386EX Reset Generation Jumper (JP2) 5
1.5.4 SMI Source Selection Jumper (JP3) 5
1.5.5 NMI Signal Generation Jumper (JP4) 5
1.5.6 DMA Channel Selection for PC/104 Bus (JP5, JP6) 5
1.5.7 Memory Size Configuration Jumpers (JP7, JP8) 6
1.5.8 User Definable Input Jumper/Switch (JP9) 6
1.5.9 RS-485 Option Jumper (JP10) 7
1.5.10 Asynchronous Serial Communications: COM1, COM2 (J1, J2, J5) 7
1.5.11 PC/104 Bus (J3, J4) 9
1.5.12 I/O Ports (J6) 9
1.5.13 Power Connectors (J7, J10) 11
1.5.14 Serial Peripheral Interface (SPI) (J8) 11
1.5.15 SIMM Memory Socket (U9) 12
1.6 Parts Listing 12
1.7 Mechanical Information 15
Chapter 2 DOS Programming
2.1 Introduction 1
2.1.1 Related Documents 1
2.2 Quick Start 1
2.2.1 Overview 1
2.2.2 Tools 2
2.2.3 QuickStart Steps 2
2.3 Desktop Development 3
2.3.1 CA386-N1 Companion Diskette 4
2.3.2 The RAM Disk 4
2.3.3 Development using the Remote Serial Disk 4
2.3.4 Development under DOS 5
2.4 Memory Map 7

Table of Contents
CA386-N1 REFERENCE MANUAL
2.5 Peripheral I/O 8
2.6 Flash Loader 9
2.6.1 General 9
2.6.2 Addresses 9
2.6.3 Memory Map 10
2.6.4 Downloading a .HEX File to Flash 10
2.6.5 Help Command 11
2.6.6 “:<.....>” (Hex Record) 11
2.6.7 “m <A1> <A2>” (Address Remapping) 11
2.6.8 “w <A1> <A2>” (Address Window) 11
2.6.9 “e <A> [L]” (Erase Sectors) 12
2.6.10 “d <A> [L]” (Display Memory) 12
2.6.11 “j [A]” (Set Jump Address) 12
2.6.12 “b <n>” (Set Baud Rate) 12
2.6.13 “a <n>” (Auto Erase) 12
2.6.14 “v <n>” (Verify Mode) 12
2.6.15 “s” (Show Status) 13
2.6.16 “r” (Reboot) 13
2.7 Flash Disk Organization and Programming 13
2.7.1 ROM Disks 14
2.8 Peripherals 14
2.8.1 Serial Ports 15
2.9 Troubleshooting 15
2.9.1 Communicating with the CA386-N1 15
Appendix A CA386-N1 Schematic
Appendix B PC/104 Specification

Hardware 1-1
Chapter 1 Hardware
1
1
1.1 Introduction
This chapter describes the CA386-N1 hardware. It lists specifications for I/O, power, and mechanical dimen-
sions, covers communications issues, and describes all the jumpers and connectors and their pin-outs. A sche-
matic and a parts list are also included at the end of the chapter. Figure 1.1 is a simplified block diagram of the
CA386-N1.
FIGURE 1.1 CA386-N1 Block Diagram
STATUS LEDs NETWORK
SERVICE
PUSHBUTTON
RS-232 (COM1)
RS-232 (COM2)
512K FLASH EPROM
256K to 4MB RAM
INTERNAL PWR
78kB or 1.2MB
TWISTED
PAIR
TRANSCEIVER
NEURON
3120
PROCESSOR
SPI INTERFACE
3.0V
CLOCK
BATTERY
OPTIONAL
REAL-TIME
CLOCK
i386EX
MICROCONTROLLER
I/O CONNECTOR
8/16-BIT PC/104
CONNECTOR
Application
Input Jumper
NETWORK
CONNECTOR
POWER
CONNECTOR

Specifications
1-2 CA386-N1 REFERENCE MANUAL
1.2 Specifications
The CA386-N1 is an Intel i386EX based single-board computer with integrated LonTalk interface. Hardware
specifications are as follows:
•25MHz Intel i386EX Processor
•256K, 1M, or 4M SIMM DRAM
•512K Flash EPROM
•NEURON 3120 with MIP Firmware installed
•LonTalk Transceiver: TPT/XF-78, TPT/XF-1250, or FTT-10
•2 RS-232 asynchronous serial ports (COM1, COM2)
•RS485 option on COM1
•8 TTL-level digital I/O
•3 programmable counter/timers
•Battery-backed real-time clock (optional)
•8/16-bit PC/104 Bus
•Power Requirements: single +5 volt operation (+12V, -12V required if certain PC/104 peripherals are
used)
•Power Consumption: nominal 500mA@5VDC
•Power Connector: 5-wire 5.08mm removable-plug screw terminal
•Network Connector: 2-wire 5.08mm removable-plug screw terminal or dual RJ45 jacks
•Dimensions: 4” (10.2mm) x6.25”(15.9mm) x approximately 1/2”
•Operating Temperature: 0-70 C
1.3 Related Documentation
The following documents are useful for a full understanding of the CA386-N1 system:
•Intel386EX Embedded Microprocessor Hardware Reference - available from Intel Corporation Liter-
ature Sales, P.O. Box 7641, Mt. Prospect, IL 60056-7641
•LONWorks Technology Device Data - available from Motorola Literature Distribution Center, P.O.
Box 20912, Phoenix, AZ 85036
1.4 Power
Power is supplied to the CA386-N1 through either connector J7 or J10. There are lines on both J7 and J10 for the
following voltages:
•+5VDC
•+12VDC
•-12VDC
•Gnd
•Vin - Variable Voltage Input for use with a power supply or converter

Connectors and Jumpers
Hardware 1-3
The board is designed to be powered in one of two ways:
•“Raw” power and ground connected through J7-Vin, and a regulator attached to J10 which takes the
raw power in and produces +5V (and +12V, -12V if required).
•+5V (and +12V, -12V if required) supplied through J7; J10 unused.
The first method is useful for providing an internal power supply or converter in an enclosure.
1.5 Connectors and Jumpers
1.5.1 Overview
Figure 1.2 shows the locations of all the connectors and jumpers on the CA386-N1. The following sections
describe each jumper and connector in detail. Note that each connector or jumper shown below is oriented such
that the power and network connectors (J7, J9) are at the “top” of the board. Also note that the reference designa-
tors (labels) are shown in their actual location and orientation relative to the connector or jumper.

Connectors and Jumpers
1-4 CA386-N1 REFERENCE MANUAL
FIGURE 1.2 CA386-N1 Parts Locations
C
JP10

Connectors and Jumpers
Hardware 1-5
1.5.2 Flash Loader Start-up (JP1)
This input jumper, when shorted during power-up, causes the Flash loader to come up. The default is unshorted.
1.5.3 i386EX Reset Generation Jumper (JP2)
When shorted, this jumper will reset the i386EX CPU. The default is un-shorted.
1.5.4 SMI Source Selection Jumper (JP3)
JP3 allows selection of how the SMI signal is generated. The choices are (a) generation via software control
(using Digital I/O Port 2, Pin-7), (b) manual generation, and (c) no SMI generation.
FIGURE 1.3 JP3: SMI Source Selection
1.5.5 NMI Signal Generation Jumper (JP4)
Shorting JP4 produces the NMI signal for the i386EX CPU. The default position of this jumper is open.
1.5.6 DMA Channel Selection for PC/104 Bus (JP5, JP6)
The PC/104 Bus supports 8 DMA channels, but the CA386-N1 can only support one of these eight. The JP5 and
JP6 jumper blocks determine which of the eight DMA channels on the PC/104 bus is selected.
Jumper Run Flash Loader Run Application/OS
JP1 short open (default)
TABLE 1.1 JP1: Run Flash Loader
Jumper Normal Run Reset 386EX
JP2 open (default) short
TABLE 1.2 JP2: 386EX Reset Generation
Jumper No NMI signal Generate NMI signal
JP4 open (default) short
TABLE 1.3 JP4: NMI Signal Generation Jumper
JP3
JP3
Software control via
JP3
digital port 2, pin-7 Manual SMI
generation (default)
1
1
1

Connectors and Jumpers
1-6 CA386-N1 REFERENCE MANUAL
FIGURE 1.4 JP5, JP6: PC/104 DMA Channel Selection Jumpers
1.5.7 Memory Size Configuration Jumpers (JP7, JP8)
Jumpers JP7 and JP8 control the configuration of DRAM memory on the CA386-N1. The sizes supported are:
256KB, 1MB, and 4MB.
FIGURE 1.5 JP7, JP8: Memory Size Configuration Jumpers
1.5.8 User Definable Input Jumper/Switch (JP9)
JP9 is an optional jumper/switch which may be used as an application specific configuration input; for example
JP9 may be used to define a hardware-level network address. By default this jumper is unconnected and not used.
o o o o
DACK1
DACK7
DACK0
DRQ7
JP6
o o o o
DRQ0
1
JP5
(default positions shown)
1
DRQ1
JP8 JP7
JP7
JP8
JP8 JP7
4MB
1Mb
256KB
111
111

Connectors and Jumpers
Hardware 1-7
FIGURE 1.6 JP9: User-Definable Input Jumper/Switch (I/O address 38Eh)
1.5.9 RS-485 Option Jumper (JP10)
JP10 is a jumper which configures COM1 as RS-232 (J5) or RS-485 (J1). NOTE: The RS-485 option is not
available on all revisions of the CA386-N1, including revision B. JP10 is not present on revision B, and
COM1 is available on both J5 and J1 as RS-232.
FIGURE 1.7 JP10: RS-485 Option Jumper
1.5.10 Asynchronous Serial Communications: COM1, COM2 (J1, J2, J5)
The CA386-N1 has two serial ports: 1 RS232 and 1 RS232 or RS485. One is connected to a female DB9 connec-
tor (J5). Both are accessible via header connectors (J1, J2). J1 and J2 are designed to connect directly via a 10-
pin ribbon-cable to a DB9 connector. Figure 1.8 shows the pin-outs for these connectors with COM1 configured
for RS232.
1
JP9
DI0
DI1
DI2
DI3
DI4
DI5
DI6
DI7
GND
GND
GND
GND
GND
GND
GND
GND
1
1
JP10 JP10
RS-232 RS-485
(Default)

Connectors and Jumpers
1-8 CA386-N1 REFERENCE MANUAL
FIGURE 1.8 J1, J2, J5: RS-232 Communications
Figure 1.8 shows the pin-out for COM1(J1) when configured as RS-485.
FIGURE 1.9 J1, J2, J5: RS-232 and RS-485 Communications
1
1
1
J5
J1 J2
Female DB9
GND
Tx
Rx
(COM2)
(COM1)
(COM1)
DB9 Connections
2 - Tx
3 - Rx
5 - GND
Connector
(UNUSED)
1
1
1
J5
J1 J2
Female DB9
Tx_high
Rx_high
(COM2)
(COM1)
Connector
Tx_low
Rx_low
GND
Tx
Rx
(UNUSED)

Connectors and Jumpers
Hardware 1-9
1.5.11 PC/104 Bus (J3, J4)
Connectors J4 and J3 provide the 8 and 16-bit PC/104 connections respectively. See the PC/104 Bus Specifica-
tion for full information on the PC/104 bus signals.
Table 1.4 shows the complete mapping between the CA386-N1 and PC/104 IRQ signals. Note that some of these
mappings are different for Rev C and Rev B of the CA386-N1 (shown in bold in the table).
1.5.12 I/O Ports (J6)
The built-in I/O ports of the i386EX processor are available on connector J6. This is a 50-pin header connector
compatible with many industry-standard I/0 racks. The I/O signals from this connector are all TTL level.
Figure 1.10 shows the signals on connector J6. Sample I/O racks that can be interfaced to J6 include:
•Dataforth(1-800-444-7644) Part# SCMD-PB8
•IOMation (617-255-8100 / 617-255-8181 (FAX)) Part# DB-16
•OPTO-22 (909-695-9299 / 909-695-2712 (FAX)) Part# PB8H, PB16H
CA386-1 Rev C PC/104 CA386-N1 Rev B PC/104
IRQ-7 IRQ-7 IRQ-7 IRQ-5
IRQ-6 IRQ-6 IRQ-6 IRQ-6
IRQ-5 IRQ-5 IRQ-5 IRQ-7
IRQ-9 IRQ-9 IRQ-1 IRQ-9
IRQ-14 IRQ-14 IRQ-9 IRQ-14
N/C IRQ-3 N/C IRQ-3
N/C IRQ-4 N/C IRQ-4
N/C IRQ-10 N/C IRQ-10
N/C IRQ-11 N/C IRQ-11
N/C IRQ-12 N/C IRQ-12
N/C IRQ-15 N/C IRQ-15
IRQ-1 N/C IRQ-14 N/C
IRQ-13 N/C IRQ-13 N/C
IRQ-8 N/C IRQ-8 N/C
TABLE 1.4 IRQ Mappings

Connectors and Jumpers
1-10 CA386-N1 REFERENCE MANUAL
FIGURE 1.10 J6: Multipurpose Digital I/O Port
1
J6
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
+5V DC
N/C
N/C
N/C
N/C
N/C
N/C
Timer Gate 2
Timer Clk 2
Timer Out 2
Timer Gate 1
Timer Clk 1
Timer Out 1
N/C
Timer Clk 0
Timer Out 0
DIO7 (Port 1, Pin 7)
DIO6 (Port 1, Pin 6)
DIO5 (Port 1, Pin 5)
DIO4 (Port 1, Pin 4)
DIO3 (Port 1, Pin 3)
DIO2 (Port 1, Pin 2)
DIO1 (Port 1, Pin 1)
DIO0 (Port 1, Pin 0)
+5V DC

Connectors and Jumpers
Hardware 1-11
1.5.13 Power Connectors (J7, J10)
Figure 1.11 shows the J7 and J10 power connectors. J7 is a Weidmuller 5.08mm removable screw terminal con-
nector. J10 is a .15” 5-pin header connector. See Section 1.4, Power for a description of the use of these sig-
nals.
FIGURE 1.11 J7, J10: Power Connectors
1.5.14 Serial Peripheral Interface (SPI) (J8)
The SPI port of the i386EX is available through connector J8.
FIGURE 1.12 J8: SPI Port
J10
1
J7
5.08mm removable
screw terminal
+5V
Gnd +12V
-12VVin
1
Vin
Gnd
+5V
+12V
-12V
1
J8
SPI
Pin-1: STXCLK
Pin-2: SRXCLK
Pin-3: SSIOTX
PIN-4: SSIORX

Parts Listing
1-12 CA386-N1 REFERENCE MANUAL
1.5.15 SIMM Memory Socket (U9)
Socket U9 accepts standard 30-pin SIMM memory modules. Sizes supported are:
•256KByte
•1MByte
•4MByte
The recommended minimum speed for memory is 80nS. Either 8- or 9-bit SIMMs are acceptable. See
Section 1.5.7, Memory Size Configuration Jumpers (JP7, JP8) for details on configuring the controller
for different memory sizes.
1.6 Parts Listing
Reference Designation Description
PASSIVES **************************
C37, C38 18 pF @ 100V monolithic
C31 220 pF cap
C44, C45 1000 pF cap
C46 1000 pF @2KV (U16 Option Only)
C1-10, C12-18, C25-
30, C32-36, C39-43,
C47
0.1uF Bypass Caps
C11 10uF Electrolytic,16V
C19-24, C48, C49 22 uF Electrolytic, 35V
R1, R2, R11 33 Ohm resistor
R23 270 Ohm resistor
R8, R9, R12 330 Ohm resistor
R3-R7, R10, R13-14,
R19, R21, R24-30, R32 10K Ohm resistor
R31 47K Ohm resistor
Y1 10 MHz XTAL
X2 14.318 MHz XTAL
X1 50 MHz Oscillator
R18 4 x 33 Array Resistor Network
R16, R17 5 x 33 Array Resistor Network
R20 9 x 10K Buss Resistor Network
R15 7 x 10K Buss Resistor Network
R22 5 x 470 Buss Resistor Network
D6, D7, D8 4 x 1N4148 Diode Array
TABLE 1.5 CA386-N1 Parts List