Cypress EX-USB FX3 Operating and maintenance manual

FX3 Programmers Manual
Doc. # 001-64707 Rev. *C
Cypress Semiconductor
198 Champion Court
San Jose, CA 95134-1709
Phone (USA): 800.858.1810
Phone (Intnl): 408.943.2600
http://www.cypress.com

2 FX3 Programmers Manual, Doc. # 001-64707 Rev. *C
Copyrights
Copyrights
© Cypress Semiconductor Corporation, 2011-2012. The information contained herein is subject to change without notice.
Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a
Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted
nor intended to be used for medical, life support, life saving, critical control or safety applications, unless pursuant to an
express written agreement with Cypress. Furthermore, Cypress does not authorize its products for use as critical components
in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user.
The inclusion of Cypress products in life-support systems application implies that the manufacturer assumes all risk of such
use and in doing so indemnifies Cypress against all charges.
Any Source Code (software and/or firmware) is owned by Cypress Semiconductor Corporation (Cypress) and is protected by
and subject to worldwide patent protection (United States and foreign), United States copyright laws and international treaty
provisions. Cypress hereby grants to licensee a personal, non-exclusive, non-transferable license to copy, use, modify, create
derivative works of, and compile the Cypress Source Code and derivative works for the sole purpose of creating custom soft-
ware and or firmware in support of licensee product to be used only in conjunction with a Cypress integrated circuit as speci-
fied in the applicable agreement. Any reproduction, modification, translation, compilation, or representation of this Source
Code except as specified above is prohibited without the express written permission of Cypress.
Disclaimer: CYPRESS MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS MATE-
RIAL, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
PARTICULAR PURPOSE. Cypress reserves the right to make changes without further notice to the materials described
herein. Cypress does not assume any liability arising out of the application or use of any product or circuit described herein.
Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure
may reasonably be expected to result in significant injury to the user. The inclusion of Cypress’ product in a life-support sys-
tems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all
charges.
Use may be limited by and subject to the applicable Cypress software license agreement.
All trademarks or registered trademarks referenced herein are property of the respective corporations.

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Contents
1. Introduction 9
1.1 Chapter Overview ......................................................................................................10
1.2 Document Revision History ......................................................................................10
1.3 Documentation Conventions .....................................................................................11
2. Introduction to USB 13
2.1 USB 2.0 System Basics.............................................................................................13
2.1.1 Host, Devices, and Hubs................................................................................13
2.1.2 Signaling Rates ..............................................................................................13
2.1.3 Layers of Communication Flow......................................................................13
2.1.4 Device Detection and Enumeration................................................................17
2.1.5 Power Distribution and Management .............................................................18
2.1.6 Device Classes ..............................................................................................18
2.2 USB 3.0: Differences and Enhancements over USB 2.0...........................................18
2.2.1 USB 3.0 Motivation ........................................................................................18
2.2.2 Protocol Layer ................................................................................................19
2.2.3 Link Layer.......................................................................................................21
2.2.4 Physical Layer................................................................................................21
2.2.5 Power Management .......................................................................................22
2.3 Reference Documents ...............................................................................................22
3. FX3 Overview 23
3.1 CPU ...........................................................................................................................23
3.2 Interconnect Fabric ....................................................................................................24
3.3 Memory......................................................................................................................25
3.4 Interrupts....................................................................................................................26
3.5 JTAG Debugger Interface..........................................................................................27
3.6 Peripherals.................................................................................................................28
3.6.1 I2S..................................................................................................................28
3.6.2 I2C..................................................................................................................30
3.6.3 UART .............................................................................................................31
3.6.4 SPI .................................................................................................................32
3.6.5 GPIO/Pins ......................................................................................................33
3.6.6 GPIF...............................................................................................................38
3.7 DMA Mechanism .......................................................................................................39
3.8 Memory Map and Registers.......................................................................................42
3.9 Reset, Booting, and Renum.......................................................................................43
3.10 Clocking .....................................................................................................................44
3.11 Power.........................................................................................................................46
3.11.1 Power Domains..............................................................................................46
3.11.2 Power Management .......................................................................................46

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4. FX3 Software 49
4.1 System Overview.......................................................................................................49
4.2 FX3 Software Development Kit (SDK).......................................................................50
4.3 FX3 Firmware Stack ..................................................................................................50
4.3.1 Firmware Framework .....................................................................................50
4.3.2 Firmware API Library .....................................................................................50
4.3.3 FX3 Firmware Examples................................................................................51
4.4 FX3 Host Software ....................................................................................................51
4.4.1 Cypress Generic USB 3.0 Driver ...................................................................51
4.4.2 Convenience APIs .........................................................................................51
4.4.3 USB Control Center .......................................................................................51
4.4.4 Bulkloop .........................................................................................................51
4.4.5 Streamer ........................................................................................................51
4.5 FX3 Development Tools ............................................................................................ 52
4.5.1 Firmware Development Environment.............................................................52
4.5.2 GPIF II Designer ............................................................................................52
5. FX3 Firmware 53
5.1 Initialization................................................................................................................53
5.1.1 Device Boot ...................................................................................................55
5.1.2 FX3 Memory Organization .............................................................................55
5.1.3 FX3 Memory Map ..........................................................................................55
5.2 API Library.................................................................................................................59
5.2.1 USB Block......................................................................................................59
5.2.2 GPIF II Block.................................................................................................. 62
5.2.3 Serial Interfaces .............................................................................................64
5.2.4 DMA Engine...................................................................................................66
5.2.5 RTOS and OS primitives................................................................................71
5.2.6 Debug Support...............................................................................................72
5.2.7 Power Management.......................................................................................73
5.2.8 Low Level DMA..............................................................................................73
6. FX3 APIs 75
7. FX3 Application Examples 77
7.1 DMA examples .......................................................................................................... 77
7.1.1 cyfxbulklpauto – AUTO Channel....................................................................77
7.1.2 cyfxbulklpautosig – AUTO_SIGNAL Channel ................................................77
7.1.3 cyfxbulklpmanual – MANUAL Channel ..........................................................77
7.1.4 cyfxbulklpmaninout – MANUAL_IN and MANUAL_OUT Channels ...............78
7.1.5 cyfxbulklpautomanytoone – AUTO_MANY_TO_ONE Channel.....................78
7.1.6 cyfxbulklpmanmanytoone – MANUAL_MANY_TO_ONE Channel................78
7.1.7 cyfxbulklpautoonetomany – AUTO_ONE_TO_MANY Channel.....................78
7.1.8 cyfxbulklpmanonetomany – MANUAL_ONE_TO_MANY Channel................78
7.1.9 cyfxbulklpmulticast – MULTICAST Channel ..................................................78
7.1.10 cyfxbulklpman_addition – MANUAL Channel with Header / Footer Addition.78
7.1.11 cyfxbulklpman_removal – MANUAL Channel with Header / Footer Deletion 78
7.1.12 cyfxbulklplowlevel – Descriptor and Socket APIs ..........................................79
7.1.13 cyfxbulklpmandcache – MANUAL Channel with D-cache Enabled ...............79
7.1.14 cyfxbulklpmanual_rvds – Real View Tool Chain Project Configuration..........79
7.2 Basic Examples ......................................................................................................... 79
7.2.1 cyfxbulklpautoenum – USB Enumeration ......................................................79

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7.2.2 cyfxbulksrcsink – Bulk Source and Sink.........................................................79
7.2.3 cyfxbulkstreams – Bulk Streams ....................................................................79
7.2.4 cyfxisolpauto – ISO loopback using AUTOchannel........................................79
7.2.5 cyfxisolpmaninout – ISO loopback using MANUAL_IN and MANUAL_OUT
Channels80
7.2.6 cyfxisosrcsink – ISO Source Sink ..................................................................80
7.2.7 cyfxflashprog – Boot Flash Programmer........................................................80
7.2.8 cyfxusbdebug – USB Debug Logging ............................................................80
7.2.9 cyfxbulklpauto_cpp – Bulkloop Back Example using C++ .............................80
7.2.10 cyfxusbhost – Mouse and MSC driver for FX3 USB Host..............................80
7.2.11 cyfxusbotg – FX3 as an OTG Device.............................................................80
7.2.12 cyfxbulklpotg – FX3 Connected to FX3 as OTG Device ................................80
7.3 Serial Interface Examples ..........................................................................................80
7.3.1 cyfxgpioapp – Simple GPIO ...........................................................................81
7.3.2 cyfxgpiocomplexapp – Complex GPIO ..........................................................81
7.3.3 cyfxuartlpregmode – UART in Register Mode................................................81
7.3.4 cyfxuartlpdmamode – UART in DMA Mode ...................................................81
7.3.5 cyfxusbi2cregmode – I2C in Register Mode ..................................................81
7.3.6 cyfxusbi2cdmamode – I2C in DMA Mode ......................................................81
7.3.7 cyfxusbspiregmode – SPI in Register Mode ..................................................81
7.3.8 cyfxusbspidmamode – SPI in DMA Mode......................................................81
7.3.9 cyfxusbspigpiomode – SPI using GPIO .........................................................81
7.3.10 cyfxusbi2sdmamode – I2S in DMA Mode ......................................................81
7.4 UVC examples...........................................................................................................82
7.4.1 cyfxuvcinmem – UVC from System Memory..................................................82
7.4.2 cyfxuvcinmem_bulk – Bulk Endpoint Based UVC from System Memory.......82
7.5 Slave FIFO Examples................................................................................................82
7.5.1 slfifoasync – Asynchronous Slave FIFO ........................................................82
7.5.2 slfifosync – Synchronous Slave FIFO ............................................................82
7.5.3 slfifoasync5bit: Async Slave Fifo 5 Bit Example.............................................82
7.5.4 slfifosync5bit: Sync Slave Fifo 5 Bit Example ................................................82
7.6 Mass Storage Example..............................................................................................82
7.7 USB Audio Class Example ........................................................................................83
7.8 Two Stage Booter Example (boot_fw) .......................................................................83
8. FX3 Application Structure 85
8.1 Application code structure .........................................................................................85
8.1.1 Initialization Code...........................................................................................85
8.1.2 Application Code ............................................................................................89
9. FX3 Serial Peripheral Register Access 99
9.1 Serial Peripheral (LPP) Registers ..............................................................................99
9.1.1 I2S Registers..................................................................................................99
9.1.2 I2C Registers ...............................................................................................105
9.1.3 UART Registers ...........................................................................................113
9.1.4 SPI Registers ...............................................................................................119
9.2 FX3 GPIO Register Interface...................................................................................125
9.2.1 Simple GPIO Registers ................................................................................125
9.2.2 GPIO_SIMPLE Register...............................................................................126
9.2.3 GPIO_INVALUE0 Register...........................................................................126
9.2.4 Gpio_invalue1 Register................................................................................127
9.2.5 GPIO_INTR0 Register .................................................................................127

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9.2.6 GPIO_INTR1 Register .................................................................................127
9.3 Complex GPIO (PIN) Registers...............................................................................127
9.3.1 PIN_STATUS Register.................................................................................128
9.3.2 PIN_TIMER Register ...................................................................................130
9.3.3 PIN_PERIOD Register.................................................................................130
9.3.4 PIN_THRESHOLD Register ........................................................................130
9.3.5 GPIO_PIN_INTR..........................................................................................130
10. FX3 P-Port Register Access 131
10.1 Glossary ..................................................................................................................131
10.2 Externally Visible PP Registers ...............................................................................132
10.2.1 PP_ID Register ............................................................................................132
10.2.2 PP_INIT Register .........................................................................................133
10.2.3 PP_CONFIG Register..................................................................................134
10.2.4 PP_INTR_MASK Register ...........................................................................135
10.2.5 PP_DRQR5_MASK .....................................................................................135
10.2.6 PP_SOCK_MASK........................................................................................135
10.2.7 PP_ERROR .................................................................................................136
10.2.8 PP_DMA_XFER...........................................................................................136
10.2.9 PP_DMA_SIZE ............................................................................................137
10.2.10PP_WR_MAILBOX......................................................................................137
10.2.11PP_EVENT ..................................................................................................137
10.2.12PP_RD_MAILBOX.......................................................................................138
10.2.13PP_SOCK_STAT.........................................................................................138
10.3 INTR and DRQ signaling .........................................................................................138
10.4 Transferring Data into and out of Sockets ...............................................................139
10.4.1 Bursting and DMA_WMARK........................................................................139
10.4.3 Short Transfer – Partial Buffer .....................................................................141
10.4.4 Short Transfer – Zero Length Buffers ..........................................................142
10.4.5 Long Transfer – Integral Number of Buffers.................................................143
10.4.6 Long Transfer – Aborted by AP ...................................................................144
10.4.7 Long Transfer – Partial Last Buffer on Ingress ............................................145
10.4.8 Long Transfer – Partial Last Buffer on Egress.............................................145
10.4.9 Odd sized transfers......................................................................................146
10.4.10DMA transfer signalING on ADMUX interface.............................................146
11. FX3 Boot Image Format 149
11.1 Firmware Image Storage Format.............................................................................149
12. FX3 Development Tools 151
12.1 GNU Toolchain ........................................................................................................151
12.2 Eclipse IDE ..............................................................................................................151
12.2.1 JTAG Probe .................................................................................................151
12.2.2 Eclipse Projects ...........................................................................................151
12.2.3 Attaching Debugger to a Running Process..................................................179
12.2.4 Using Makefiles............................................................................................184
12.2.5 Eclipse IDE settings .....................................................................................184
13. FX3 Host Software 189
13.1 FX3 Host Software ..................................................................................................189
13.1.1 Cypress Generic Driver................................................................................189
13.1.2 CYAPI Programmer’s reference...................................................................189

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13.1.3 CYUSB.NET Programmer’s reference.........................................................189
13.1.4 Cy Control Center ........................................................................................190
14. GPIF™ II Designer 191

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FX3 Programmers Manual, Doc. # 001-64707 Rev. *C 9
1. Introduction
Cypress EZ-USB®FX3™ is the next-generation USB 3.0 peripheral controller providing highly
integrated and flexible features that enable developers to add USB 3.0 functionality to any system.
Figure 1-1. EZ USB FX3 System Diagram
EZ-USB FX3 has a fully configurable, parallel, general programmable interface called GPIF™ II,
which can connect to any processor, ASIC, DSP, image sensor, or FPGA. It has an integrated PHY
and controller along with a 32-bit microcontroller (ARM926EJ-S) for powerful data processing and
for building custom applications. It has an interport DMA architecture that enables data transfers of
greater than 400 Mbps.
The FX3 is a fully compliant USB 3.0 and USB 2.0 peripheral. An integrated USB 2.0 OTG controller
enables applications that need dual role usage scenarios. It has 512 KB of on-chip SRAM for code
and data. It supports serial peripherals such as UART, SPI, I2C, and I2S that enable communicating
to on board peripherals; for example, the I2C interface is typically connected to an EEPROM.
GPIF II is an enhanced version of the GPIF in FX2LP™, Cypress’s flagship USB 2.0 product. It
provides easy and glueless connectivity to popular industry interfaces such as asynchronous and
synchronous Slave FIFO, asynchronous SRAM, asynchronous and synchronous Address Data
Multiplexed interface, parallel ATA, and so on. The GPIF II controller on the FX3 device supports a
total of 256 states. It can be used to implement multiple disjointed state machines.
The FX3 comes with the easy-to-use EZ-USB tools providing a complete solution for fast application
development. The software development kit includes application examples to accelerate time to
market.

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Introduction
The FX3 is fully compliant with USB 3.0 V1.0 Specification and is also backward compatible with
USB 2.0. It is also complaint with the Battery Charging Specification V1.1 and USB 2.0 OTG
Specification.
1.1 Chapter Overview
The following chapters describe in greater details each of the components of the Programmers
Manual.
Introduction to USB on page 13 presents an overview of the USB standard.
FX3 Overview on page 23 presents a hardware overview of the FX3 system.
FX3 Software on page 49 provides an overview of the SDK that is provided with the FX3.
FX3 Firmware on page 53 provides a brief description of each programmable firmware block. This
includes the system boot and initialization, USB, GPIF 2, serial interfaces, DMA, power
management, and debug infrastructure.
FX3 APIs on page 75 provides the description of the APIs for USB, GPIF2, serial interfaces, DMA,
RTOS, and debug.
FX3 Application Examples on page 77 presents code examples, which illustrate the API usage and
the firmware framework.
FX3 Application Structure on page 85 describes the FX3 application framework and usage model for
FX3 APIs.
FX3 Serial Peripheral Register Access chapter on page 99 describes the register based access from
an application processor when FX3 device is configured for PP mode slave operation.
FX3 Boot Image Format chapter on page 149 describes the FX3 image (img) format as required by
the FX3 boot-loader.
FX3 Development Tools on page 151 describes the available options for the firmware development
environment, including JTAG based debugging.
FX3 Host Software on page 189 describes the Cypress generic USB 3.0 WDF driver, the
convenience APIs, and the USB control center.
GPIF™ II Designer on page 191 provides a guide to the GPIF II Designer tool.
1.2 Document Revision History
Table 1-1. Revision History
Revision PDF
Creation Date Originof Change Description of Change
** 05/10/2011 SHRS New user guide
*A 07/14/2011 SHRS FX3 Programmers Manual update for beta release.
*B 03/27/2012 SHRS FX3 Programmers Manual update for FX3 SDK 1.1 release.
*C 08/10/2012 SHRS FX3 Programmers Manual update for SDK 1.2 release.