
5.2.1.1
5.2.1.2
5.2.1.3
5.2.1.4
5.2.1.5
5.2.2
5.2.2.1
5.2.2.2
5.2.2.3
5.2.2.4
5.2.2.5
5.2.2.6
5.2.3
5.2.3.1
5.2.3.2
5.2.3.3
5.2.3.4
5.2.3.5
5.2.3.6
5.2.3.7
5.2.4
5.2.4
.1
5.2.4.2
5.2.4.3
5.2.4.4
5.2.4.5
5.2.4.6
5.2.4.7
5.2.4.8
5.2.5
5.2.5.1
5.2.5.2
5.2.5.3
5.2.5.4
5.2.5.5
5.2.5.6
5.2.5.7
5.2.5.8
5.3
5.3.1
5.3.1.1
5.3.1.2
5.3.1.3
5.3.1.4
CONTENTS (Coot)
Page
Device Select and
lOT
Decoder ..........................................................5-10
Interrupt
Control
and Skip Logic........................................................5-12
C Line Select Logic .............................................................................5-12
Interface Register ...............................................................................5-12
Sequence and Function Control Logic ................................................5-13
RXll
Interface(M7846) Block Diagram Description..................................5-14
Address Decoder ................................................................................5-14
Data
Path Selection ............................................................................5-14
Interface Data Buffer Register ............................................................5-16
Sequence
and
Function Control Logic ................................................5-16
Interrupt Control Logic......................................................................5-17
Vector Address Generator..................................................................5-17
RXV
11
Interface (M7946) Block Diagram Description...............................5-17
Address Decoding Logic.....................................................................5-17
I/0
Control Logic ..............................................................................
5-17
RX
Data
Buffer (RXDB) Register ......................................................5-17
RX
Command/Status
(RXCS) Register..............................................
5-17
Status and Control Signal Interface Logic ...........................................5-19
Interrupt
Contro
1Logic......................................................................
5-1
9
Initialize Logic....................................................................................5-19
RX211 Interface (M8256) Block Diagram Description................................5-19
Address Decoder, Buffer Selector, SSYN Register ..............................5-19
Command
and
Status Buffer...............................................................5-20
Data Buffer ........................................................................................5-20
Data
Input/Output
and
TRANSMIT
DA
TA
CIRCUIT
....................5-20
Address Circuits .................................................................................5-20
Interface Control Circuits...................................................................5-20
Bus Control Circuits............................................................................5-22
InterruptCircuits................................................................................5-22
RXV21 Interface (M8029) Block Diagram Description ...............................5-22
Input/Output
Transceiver, Buffer Selector..........................................5-22
Command
and
Status Buffer...............................................................5-22
Data
Buffer ........................................................................................5-24
Input/Output
Transceiver and Transmit/Receive
Data
Circuit...........5-24
Address Circuits .................................................................................5-24
Interface Control Circuits...................................................................5-24
Bus Control Circuits ...........................................................................5-25
Interrupt Circuits................................................................................
5-2
5
UNIT
LEVEL
DESCRIPTION
.........................................................................
5-25
Microprogrammed Controller (M7744) Hardware Description...................
5-25
PROM,
ROM
Register, Processor and Sequencer Circuits..................
5-25
Branch
Control
Circuits......................................................................5-30
I/O
Control Circuits...........................................................................5-30
Sector Buffer
and
Control Circuits......................................................
5-31
vii