DIGITAL-LOGIC MICROSPACE MSM800SEV User manual

TECHNICAL USER'S MANUAL FOR:
PC/104 plus
MSM800SEV
Nordstrasse 11/F
CH- 4542 Luterbach
Tel.: ++41 (0)32 681 58 00
Fax: ++41 (0)32 681 58 01
Email: [email protected]
Homepage: http://www.digitallogic.com

DIGITAL-LOGIC AG MSM800 SEV Manual V1.0A
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COPYRIGHT 

2005 - 2006 BY DIGITAL-LOGIC AG
No part of this document may be reproduced, transmitted, transcribed, stored in a retrieval system, in any
form or by any means, electronic, mechanical, optical, manual, or otherwise, without the prior written permis-
sion of DIGITAL-LOGIC AG.
The software described herein, together with this document, are furnished under a license agreement and
may be used or copied only in accordance with the terms of that agreement.
ATTENTION:
All information in this manual and about the product are subject to change without prior notice.
REVISION HISTORY:
Product
Version
BIOS
Version
Doc.
Version
Date/Vis: Modification:
Remarks, News, Attention:
V1.1 V1.05 V0.1 02.2006 KUF Initial Version
V1.1 V1.05 V0.2 03.2006 DAR Preliminary Version
V1.1 V1.05 V0.3 03.2006 DAR Preliminary Version
V1.2 V1.06 V0.4 06.2006 DAR Preliminary Version
V1.2 V1.08 V1.0 07.2006 DAR Final Release
V1.2 V1.08 V1.0A 07.2006 DAR LCD connector / Flat Panel description
Product Registration:
Please register your product at:
http://www.digitallogic.com -> SUPPORT
After registration, you will receive driver & software updates, errata information, customer information and
news from DIGITAL-LOGIC AG products automatically.

DIGITAL-LOGIC AG MSM800 SEV Manual V1.0A
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Table of Contents
1 Preface.............................................................................................................................5
1.1 How to use this Manual ................................................................................................... 5
1.2 Trademarks....................................................................................................................... 5
1.3 Disclaimer......................................................................................................................... 5
1.4 Who should use this Product.......................................................................................... 5
1.5 Recycling Information...................................................................................................... 6
1.6 Technical Support............................................................................................................ 6
1.7 Limited Warranty.............................................................................................................. 6
2 Overview..........................................................................................................................7
2.1 Standard Features............................................................................................................ 7
2.2 Unique Features............................................................................................................... 7
2.3 MSM800SEV Block Diagram............................................................................................ 8
2.4 MSM800SEV specifications............................................................................................. 9
2.5 Ordering codes examples ............................................................................................. 11
2.6 BIOS History................................................................................................................... 12
2.7 Mechanical Dimensions................................................................................................. 13
2.8 MSM800SEV Incompatibilities to a standard PC/AT .................................................... 14
2.8.1 PC104 BUS / ISA BUS .............................................................................................................. 14
2.8.2 ISA-Incompatibilitiy with ISA-PCCARD-Controller.................................................................... 15
2.8.3 ISA-Incompatibilitiy with 16Bit I/O Transfer with FPGA-Decoder ............................................ 15
2.8.4 ISA-Incompatibilitiy with 16Bit Memory Transfer with FPGA-Decoder ................................... 15
2.9 Related Application Notes............................................................................................. 15
2.10 Thermoscan ................................................................................................................ 16
2.11 High frequency Radiation (to meet EN55022) ........................................................... 17
3 PC/104 Bus Signals ......................................................................................................18
3.1 Expansion Bus ............................................................................................................... 21
3.1.1 Addressing PCI devices on the DLAG products:....................................................................... 21
4 Detailed System Description .......................................................................................22
4.1 Power Requirements ..................................................................................................... 22
4.2 Boot time ........................................................................................................................ 22
4.3 CPU, Boards and RAMs................................................................................................. 23
4.3.1 CPUs of this MICROSPACE Product ........................................................................................ 23
4.3.2 Numeric Coprocessor ................................................................................................................ 23
4.3.3 DRAM Memory .......................................................................................................................... 23
4.4 Interface.......................................................................................................................... 24
4.4.1 Keyboard AT compatible and PS/2 Mouse................................................................................ 24
4.4.2 Line Printer Port LPT1 ............................................................................................................... 24
4.4.3 Serial Ports COM1-COM2 ......................................................................................................... 24
4.4.4 Floppy Disk Interface ................................................................................................................. 25
4.4.5 Speaker Interface....................................................................................................................... 25
4.5 Controllers...................................................................................................................... 26
4.5.1 Interrupt Controllers ................................................................................................................... 26
4.6 Timers and Counters ..................................................................................................... 26
4.6.1 Programmable Timers ............................................................................................................... 26
4.7 Battery backed clock (RTC)........................................................................................... 27
4.7.2 External battery assembling:...................................................................................................... 28
4.8 Watchdog........................................................................................................................ 28
4.9 BIOS................................................................................................................................ 29
4.9.1 Core bios download ................................................................................................................... 29
4.9.2 ROM-BIOS Sockets ................................................................................................................... 30
4.9.3 EEPROM Memory for Setup...................................................................................................... 30
4.9.4 BIOS CMOS Setup .................................................................................................................... 30
4.10 CMOS RAM Map.......................................................................................................... 31

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4.11 EEPROM saved CMOS Setup..................................................................................... 37
4.12 Memory........................................................................................................................ 38
4.12.1 System Memory Map ................................................................................................................. 38
4.12.2 System I/O map ......................................................................................................................... 38
5 VGA, LCD.......................................................................................................................39
5.1.1 VGA / LCD Controller of the GEODE LX800 ............................................................................. 39
5.1.2 Graphic modes........................................................................................................................... 39
5.1.3 Flat Panel Functional Description .............................................................................................. 40
6 Description of the connectors .....................................................................................41
7 Jumper locations on the board....................................................................................53
7.1 The jumpers on MSM800SEV V1.1................................................................................ 53
8 Cable interface ..............................................................................................................54
8.1 The harddisk cable 44pin .............................................................................................. 54
8.2 The COM 1/2 serial interface cable ............................................................................... 55
8.3 The printer interface cable ............................................................................................ 56
8.4 The Micro Floppy interface cable.................................................................................. 57
9 Operating Systems Compatibility................................................................................58
9.1 Microsoft Windows ........................................................................................................ 58
9.2 Microsoft Windows CE 4.2 / 5.0..................................................................................... 58
9.3 LINUX .............................................................................................................................. 58
9.4 Realtime OS.................................................................................................................... 58
10 Driver Installation........................................................................................................59
10.1 Windows 2000 & XP.................................................................................................... 59
10.1.1 Encryption / Decryption Controller ............................................................................................. 59
10.1.2 Audio / Multimedia ..................................................................................................................... 62
10.1.3 VGA............................................................................................................................................ 63
10.1.4 Ethernet / LAN ........................................................................................................................... 65
10.1.5 Int15 emulator driver for W2k/XP............................................................................................... 67
10.1.6 Windows XP 2
nd
IDE bugfix ....................................................................................................... 67
11 Software.......................................................................................................................68
11.1 Windows Int15 Tool .................................................................................................... 68
11.1.1 Int15 Windows Software ............................................................................................................ 68
12 Special Peripherals, Configuration, Software ..........................................................69
12.1 The Special Function Interface for MICROSPACE Computers SFI......................... 69
12.1.1 INT 15h SFR Functions ............................................................................................................. 69
12.1.2 Int15 emulator driver for Windows ............................................................................................. 72
13 Starting up the system ...............................................................................................75
13.1 Diagnostics ................................................................................................................. 75
13.2 POST CODES .............................................................................................................. 76
14 Core BIOS....................................................................................................................78
14.1 Setup Menu Screens and Navigation ........................................................................ 78
14.2 Main Menu ................................................................................................................... 78
14.3 Motherboard................................................................................................................ 82
15 Assemblings view.......................................................................................................87
15.1 MSM800SEV 1.2 .......................................................................................................... 87
16 Drawings of older board versions.............................................................................89
16.1 Version 1.0 / V1.1 ........................................................................................................ 89
17 INDEX...........................................................................................................................91

DIGITAL-LOGIC AG MSM800 SEV Manual V1.0A
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1 PREFACE
This manual is for integrators and programmers of systems based on the MICROSPACE card family. It con-
tains information on hardware requirements, interconnections, and details of how to program the system.
The specifications given in this manual were correct at the time of printing; advances mean that some may
have changed in the meantime. If errors are found, please notify DIGITAL-LOGIC AG at the address shown
on the title page of this document, and we will correct them as soon as possible.
1.1 How to use this Manual
This manual is written for the original equipment manufacturer (OEM) who plans to build computer systems
based on the single board MICROSPACE-PC. It provides instructions for installing and configuring the
MSM800SEV board, and describes the system and setup requirements.
1.2 Trademarks
Chips & Technologies SuperState R
MICROSPACE, MicroModule, smartCore, smartModules DIGITAL-LOGIC AG
DOS Vx.y, Windows Microsoft Inc.
PC-AT, PC-XT IBM
NetWare Novell Corporation
Ethernet Xerox Corporation
DR-DOS, PALMDOS Digital Research Inc. / Novell Inc.
ROM-DOS Datalight Inc.
1.3 Disclaimer
DIGITAL-LOGIC AG makes no representations or warranties with respect to the contents of this manual and
specifically disclaims any implied warranty of merchantability or fitness for any particular purpose. DIGITAL-
LOGIC AG shall under no circumstances be liable for incidental or consequential damages or related ex-
penses resulting from the use of this product, even if it has been notified of the possibility of such damage.
DIGITAL-LOGIC AG reserves the right to revise this publication from time to time without obligation to notify
any person of such revisions. If errors are found, please contact DIGITAL-LOGIC AG at the address listed on
the title page of this document.
1.4 Who should use this Product
- Electronic engineers with know-how in PC-technology.
- Without electronic know-how we expect you to have questions. This manual assumes, that you have a
general knowledge of PC-electronics.
- Because of the complexity and the variability of PC-technology, we can’t give any warranty that the prod-
uct will work in any particular situation or combination. Our technical support will help you to might get a
solution.
- Pay attention to the electrostatic discharges. Use a CMOS protected workplace.
- Power supply OFF when you are working on the board or connecting any cables or devices.
This is a high technology product.
You need know-how in electronics and PC-technology to
install the system !

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1.5 Recycling Information
Hardware:
- Print: epoxy with glass fiber
wires are of tin-plated copper
- Components: ceramics and alloys of gold, silver
check your local electronic recycling
Software:
- no problems: re-use the diskette after formatting
1.6 Technical Support
1. Contact your local DIGITAL-LOGIC Technical Support in your country first !
2. Use the Internet Support Request form at http://www.digitallogic.com -> Support
3. Send a FAX or an E-mail to DIGITAL-LOGIC AG with a description of your problem.
DIGITAL-LOGIC AG
smartModule DesignIn Center
Nordstr. 11/F
CH-4542 Luterbach (SWITZERLAND)
Fax: ++41 32 681 58 01
E-Mail: [e-mail]
Internet www.digitallogic.com
 Support requests will only be accepted with detailed information of the product (BIOS-, Board- Version) !
1.7 Limited Warranty
DIGITAL-LOGIC AG warrants the hardware and software products it manufactures and produces to be free
from defects in materials and workmanship for one year following the date of shipment from DIGITAL-LOGIC
AG, Switzerland. This warranty is limited to the original purchaser of product and is not transferable.
During the one year warranty period, DIGITAL-LOGIC AG will repair or replace, at its discretion, any defec-
tive product or part at no additional charge, provided that the product is returned, shipping prepaid, to
DIGITAL-LOGIC AG. All replaced parts and products become property of DIGITAL-LOGIC AG.
Before returning any product for repair, customers are required to contact the company or their distributor.
This limited warranty does not extend to any product which has been damaged as a result of accident, mis-
use, abuse (such as use of incorrect input voltages, wrong cabling, wrong polarity, improper or insufficient
ventilation, failure to follow the operating instructions that are provided by DIGITAL-LOGIC AG or other con-
tingencies beyond the control of DIGITAL-LOGIC AG), wrong connection, wrong information or as a result of
service or modification by anyone other than DIGITAL-LOGIC AG. Neither, if the user has not enough
knowledge of these technologies or has not consulted the product manual or the technical support of
DIGITAL-LOGIC AG and therefore the product has been damaged.
Except, as expressly set forth above, no other warranties are expressed or implied, including, but not limited
to, any implied warranty of merchantability and fitness for a particular purpose, and DIGITAL-LOGIC AG ex-
pressly disclaims all warranties not stated herein. Under no circumstances will DIGITAL-LOGIC AG be liable
to the purchaser or any user for any damage, including any incidental or consequential damage, expenses,
lost profits, lost savings, or other damages arising out of the use or inability to use the product.

DIGITAL-LOGIC AG MSM800 SEV Manual V1.0A
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2 OVERVIEW
2.1 Standard Features
The MICROSPACE PC/104 is a miniaturized modular device incorporating the major elements of a PC/AT
compatible computer. It includes standard PC/AT compatible elements, such as:
- Powerful GEODELX-800 500MHz
- BIOS ROM
- DDR-SODIMM 200pin socket (for DDRAM 256-1024Mbyte)
- 0k second level cache
- Timers
- DMA
- Real-time clock with CMOS-RAM and battery buffer
- LPT1 parallel port
- COM1-, COM2- RS2332 serial port
- Speaker interface
- AT-keyboard interface or PS/2-keyboard interface
- Floppy disk interface
- AT-IDE harddisk interface
- VGA/LCD video interface
- PC/104 ISA Bus
- PC104+ PCI Bus (option)
- PS/2 mouse interface
- Power management functions
- USB V2.0 2 Channels
- Onboard CF socket Typ II
2.2 Unique Features
The MICROSPACE MSM800SEV includes all standard PC/AT functions plus unique DIGITAL-LOGIC AG
enhancements, such as:
- LAN Ethernet, INTEL 82551QM or 82551ER (optional)
- Single 5 volt supply
- Watchdog
- EEPROM for setup and configuration
- UL approved parts
- Remote Function

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DRAM
BUS
2.3 MSM800SEV Block Diagram
GEODE LX800
500MHz
CPU
DRAM
DDR-DIMM up to 1GB
GEODE-5535 Chip
EIDE
LCD/VGA
Controller
Part of GEODE LX800
PCI
-
BUS
Speaker
LCD CRT
BIOS
256kByte
Super
I/O
W83627
PC/104
Bus
Ethernet
LAN
INTEL
82551QM or
82551ER
ISA
-
BUS
MAX2ll
IrDA FD
LPT1
MAX2ll
COM1 COM2
PC/104
plus
RTC
LiBAT
EEPROM
2kByte
Watchdog
KB Mouse
100/10BASE-T
2x
USB

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2.4 MSM800SEV specifications
CPU:
CPU : GEODE LX800
CPU Core Supply: 1.8V very low powered
Mode: Real / Protected
Compatibility: 8086 – P5
Word Size: 32 Bits
Secondary Cache:
Physical Addressing: 32 lines
Virtual Addressing: 16 Gbytes
Clock Rates: 500 MHz
Socket Standard: Soldered BGA
Math. Coprocessor:
Integrated in the GEODELX800
Power Management:
Available since V2.0 Clock switching, sleep, possible controlled power-up,
inactivity-auto powerdown
DMA:
8237A comp. 4 channels 8 Bits
3 channels 16 Bits
Interrupts:
8259 comp. 8 + 7 levels
PC compatible
Timers:
8254 comp. 3 programmable counter/timers
Memory:
SODIMM SODIMM200pin DDR PC2700 333MHz 256-1024Mbyte
Video:
Controller: MSM800SEV
BUS: 32 Bit high speed 33 MHz PCI bus
Enhanced BIOS: VGA / LCD BIOS
Memory: 4-8Mbyte shared RAM
CRT-Monitor: VGA, SVGA up to 1920 x 1440 pixels 256 colors
Flatpanel: TFT 3.3V: 640 x 480 with 8/16/256 colors
Controller Modes: CRT only; Flatpanel only or simultaneous CRT and Flatpanel
Video Input: no
Drivers: WIN2000, WIN95/98, NT4.0

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Mass Storage:
FD: Floppy disk interface, for max. 1 floppy with 26pin connector
HD: E-IDE interface, AT-type, for max. 2 harddisks, 44pin connector, for
1.3, 1.8 and 2.5" harddisk with 44 pins IDE
Standard AT Interfaces:
Serial: Name FIFO IRQs Addr. Standard Option
COM1
COM2
yes
yes
IRQ4
IRQ3
3F8
2F8
RS232C
RS232C
(Baudrates: 50 - 115 KBaud programmable)
Parallel: LPT1 printer interface mode: SPP(output), EPP (bidir.)
Keyboard: AT or PS/2 –keyboard
Mouse: PS/2
Speaker: 0.1 W output drive
RTC: Integrated into PIIX4, RTC with CMOS-RAM 256Byte
Backup current: <5 µA
Battery: 3 Volt Lithium 300mAh internal or external connected, not chargeable
BUS:
PC/104plus IEEE-996 standard bus, buffered
Clock: 8 MHz defined by the GEODE
USB:
USB: V2.0
Transferrate: 400MBps, 12.5 MBps / 1.5MBps
Channels 2
Peripheral Extension:
ISA With PC/104 BUS (ISA 16Bit DMA limitation)
PCI With PC/104plus BUS
Power Supply:
Working: 5 Volts ±5%
Power Rise Time: Unspecified
Current: 2.5 Amp. Typical (MSM800SEV, HDD, FDD)
Suspended 0.05A

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Physical Characteristics:
Dimensions: Length: 91 mm
Depth: 96 mm
Height: 25 mm
Weight: 170 gr
PCB Thickness: 1.6 mm / 0.0625 inches nominal
PCB Layer: Multilayer
Operating Environment:
Relative humidity: 5 - 90% non condensing
Vibration: 5 to 2000 Hz, 0.1G
Shock: 1 G
Temperature: Operating*: Standard version: - 0°C to +70°C
Extended version: -40°C to +85°C
Storage: -55°C to +85 °C
* = with passive cooler
EMI / EMC (IEC1131-2 refer MIL 461/462):
ESD Electro Static Discharge: IEC 801-2, EN55101-2, VDE 0843/0847 Part 2
Metallic protection needed
separate Ground Layer included
15 kV single peak
REF Radiated Electromagnetic Field: IEC 801-3, VDE 0843 Part 3, IEC770 6.2.9.
not tested
EFT Electric Fast Transient (Burst): IEC 801-4, EN50082-1, VDE 0843 Part 4
250V - 4kV, 50 ohms, Ts=5ns
Grade 2: 1KV Supply, 500 I/O, 5Khz
SIR Surge Immunity Requirements: IEC 801-5, IEEE587, VDE 0843 Part 5
Supply: 2 kV, 6 pulse/minute
I/O: 500 V, 2 pulse/minute
FD, CRT: none
High-frequency Radiation: EN55022
Compatibility:
MSM800SEV: Mechanically compatible to our MSMx86 Boards and to all other
PC/104 boards
Any information is subject to change without notice.
2.5 Ordering codes examples
Will follow in a later version of this manual

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2.6 BIOS History
Version: Date: Status: Modifications:
1.05 03.2006
1.06 05.2006 ISA IRQ reservation
1.07 05.2006 AC97 detection
1.08 05.2006 Final ISA IRQ table corrected

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2.7 Mechanical Dimensions
MSM800 Version V1.0 / V1.2 / V2.0
Unit: mm (millimeter)
Tolerance: +/- 0.1mm
Date: 28.03.2006
Author: BRR

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2.8 MSM800SEV Incompatibilities to a standard PC/AT
2.8.1 PC104 BUS / ISA BUS
An onboard LPC to ISA-bridge makes it possible to expand the functionality of the board with
additional PC/104 cards.
Because of the transformation from LPC to ISA it is unfortunately not possible to realize a 16Bit
access. This does not mean that these cards cannot be used, but the 16Bit access is divided into two
accesses. Therefore the access to these cards is a little bit slower.
The LPC support the following bus cycles:
That means, all Non-Busmaster I/O and MEM Cycles are only 8Bit wide and never 16Bit wide. 16Bit
datatransfer is available in the BusMaster modus only.

DIGITAL-LOGIC AG MSM800 SEV Manual V1.0A
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2.8.2 ISA-Incompatibilitiy with ISA-PCCARD-Controller
The experience is, that ATA-Drives controlled in a ISA-PCMCIA Controller are not working.
Solution:
Using a PCCARD-Controller on the PCI-Bus
2.8.3 ISA-Incompatibilitiy with 16Bit I/O Transfer with FPGA-Decoder
The experience is, that 16Bit I/O-transfers decoded with a FPGA are not allways working correct. Each case
must be tested. Specially on odd adresses are problems expected.
Solution:
Using two 8Bit transfer instead one 16Bit transfer. For timecritical transfers is recommended to use the PCI-
Bus.
2.8.4 ISA-Incompatibilitiy with 16Bit Memory Transfer with FPGA-Decoder
The experience is, that 16Bit Memory-transfers decoded with a FPGA are not allways working correct. Each
case must be tested. Specially on odd adresses are problems expected.
Solution:
Using two 8Bit transfer instead one 16Bit transfer. For timecritical transfers is recommended to use the PCI-
Bus.
2.9 Related Application Notes
# Description
 Application Notes are availble at http://www.digitallogic.com ->support, or on any Application CD from
DIGITAL-LOGIC.

DIGITAL-LOGIC AG MSM800 SEV Manual V1.0A
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2.10 Thermoscan
MSM800SEV V1.2 with heatsink (OS: MSDOS -> promt))
t [min] f
CPU
[MHz]
60 500

DIGITAL-LOGIC AG MSM800 SEV Manual V1.0A
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2.11 High frequency Radiation (to meet EN55022)
Since the PC/104 CPU modules are very high integrated embedded computers, no peripheral lines are pro-
tected against the radiation of high frequency spectrum. To meet a typical EN55022 requirement, all periph-
erals, they are going outside of the computer case, must be filtered externaly.
Typical signals, they must be filtered:
Keyboard: KBCLK, KBDATA, VCC
Mouse: MSCLK, MSDATA, VCC
COM1/2/3/4: All serial signals must be filtered
LPT: All parallel signals must be filtered
CRT: red,blue,green, hsynch, vsynch must be filtered
Typical signals, they must not be filtered, since they are internaly used:
IDE: connected to the harddisk
Floppy: connected to the floppy
LCD: connected to the internal LCD
1. For peripheral cables:
Use for all DSUB connector a filtered version. Select carefully the filter specifications.
Place the filtered DSUB connector directly frontside and be sure that the shielding makes
a good contact with the case.
9pin DSUB connector from AMPHENOL: FCC17E09P 820pF
25pin DSUB connector from AMPHENOL: FCC17B25P 820pF
2. For stackthrough applications:
Place on each peripheral signal line, they are going outside, a serial inductivity and
after the inductivity a capacitor of 100pF to 1000pF to ground.
In this case, no filtered connectors are needed. Place the filter directly under or
behind the onboard connector.
Serial Inductivity: TDK HF50ACB321611-T 100Mhz, 500mA, 1206 Case
Ground capacitor: Ceramic Capacitor with 1000pF
Power supply:
Use a currentcompensated dualinductor on the 5V supply
SIEMENS B82721-K2362-N1 with 3.6A, 0.4mH

DIGITAL-LOGIC AG MSM800 SEV Manual V1.0A
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3 PC/104 BUS SIGNALS
Please note, that may not all of the signals are available on this board
(check chapter 6 “Description of the connectors”)
AEN, output
Address Enable is used to degate the microprocessor and other devices from the I/O channel to allow DMA
transfers to take place. low = CPU Cycle , high = DMA Cycle
BALE, output
Address Latch Enable is provided by the bus controller and is used on the system board to latch valid ad-
dresses and memory decodes from the microprocessor. This signal is used so that devices on the bus can
latch LA17..23. The SA0..19 address lines latched internally according to this signal. BALE is forced high
during DMA cycles.
/DACK[0, 5..7], output
DMA Acknowledge 0 to 3 and 5 to 7 are used to acknowledge DMA requests (DRQO through DRQ7). They
are active low. This signal indicates that the DMA operation can begin.
DRQ[0, 5..7], input
DMA Requests 0 through 3 and 5 through 7 are asynchronous channel requests used by peripheral devices
and the I/O channel microprocessors to gain DMA service (or control of the system). A request is generated
by bringing a DRQ line to an active level. A DRQ line must be held high until the corresponding DMA Re-
quest Acknowledge (DACK/) line goes active. DRQO through DRQ3 will perform 8-Bit DMA transfers; DRQ5-
7 are used for 16 accesses.
/IOCHCK, input
IOCHCK/ provides the system board with parity (error) information about memory or devices on the I/O
channel. low = parity error, high = normal operation
IOCHRDY, input
I/O Channel Ready is pulled low (not ready) by a memory or I/O device to lengthen I/O or memory cycles.
Any slow device using this line should drive it low immediately upon detecting its valid address and a Read
or Write command. Machine cycles are extended by an integral number of one clock cycle (67 nanosec-
onds). This signal should be held in the range of 125-15600nS. low = wait, high = normal operation
/IOCS16, input
I/O 16 Bit Chip Select signals the system board that the present data transfer is a 16-Bit, 1 wait-state, I/0 cy-
cle. It is derived from an address decode. /IOCS16 is active low and should be driven with an open collector
(300 ohm pull-up) or tri-state driver capable of sinking 20mA. The signal is driven based only on SA15-SAO
(not /IOR or /IOW) when AEN is not asserted. In the 8 Bit I/O transfer, the default transfers a 4 wait-state cy-
cle.
/IOR, input/output
I/O Read instructs an I/O device to drive its data onto the data bus. It may be driven by the system micro-
processor or DMA controller, or by a microprocessor or DMA controller resident on the I/O channel. This sig-
nal is active low.
/IOW, input/output
I/O Write instructs an I/O device to read the data on the data bus. It may be driven by any microprocessor or
DMA controller in the system. This signal is active low.

DIGITAL-LOGIC AG MSM800 SEV Manual V1.0A
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IRQ[ 10 12, 14, 15], input
These signals are used to tell the microprocessor that an I/O device needs attention. An interrupt request is
generated when an IRQ line is raised from low to high. The line must be held high until the microprocessor
acknowledges the interrupt request.
/Master, input
This signal is used with a DRQ line to gain control of the system. A processor or DMA controller on the I/0
channel may issue a DRQ to a DMA channel in cascade mode and receive a /DACK.
/MEMCS16, input
MEMCS16 Chip Select signals the system board if the present data transfer is a 1 wait-state, 16-Bit, memory
cycle. It must be derived from the decode of LA17 through LA23. /MEMCS16 should be driven with an open
collector (300 ohm pull-up) or tri-state driver capable of sinking 2OmA.
/MEMR input/output
These signals instruct the memory devices to drive data onto the data bus. /MEMR is active on all memory
read cycles. /MEMR may be driven by any microprocessor or DMA controller in the system. When a micro-
processor on the I/0 channel wishes to drive /MEMR, it must have the address lines valid on the bus for one
system clock period before driving /MEMR active. These signals are active low.
/MEMW, input/output
These signals instruct the memory devices to store the data present on the data bus. /MEMW is active in all
memory read cycles. /MEMW may be driven by any microprocessor or DMA controller in the system. When a
microprocessor on the I/O channel wishes to drive /MEMW, it must have the address lines valid on the bus
for one system clock period before driving /MEMW active. Both signals are active low.
OSC, output
Oscillator (OSC) is a high-speed clock with a 70 nanosecond period (14.31818 MHz). This signal is not syn-
chronous with the system clock. It has a 50% duty cycle. OSC starts 100µs after reset is inactive.
RESETDRV, output
Reset Drive is used to reset or initiate system logic at power-up time or during a low line-voltage outage. This
signal is active high. When the signal is active all adapters should turn off or tri-state all drivers connected to
the I/O channel. This signal is driven by the permanent Master.
/REFRESH, input/output
These signals are used to indicate a refresh cycle and can be driven by a microprocessor on the I/0 channel.
These signals are active low.
SAO-SA19, LA17 - LA23 input/output
Address bits 0 through 19 are used to address memory and I/0 devices within the system. These 20 address
lines, allow access of up to 1MBytes of memory. SAO through SA19 are gated on the system bus when
BALE is high and are latched on the falling edge of BALE. LA17 to LA23 are not latched and addresses the
full 16 MBytes range. These signals are generated by the microprocessors or DMA controllers. They may
also be driven by other microprocessor or DMA controllers that reside on the I/0 channel. The SA17-SA23
are always LA17-LA23 address timings for use with the MSCS16 signal. This is advanced AT96 design. The
timing is selectable with jumpers LAxx or SAxx.
/SBHE, input/output
Bus High Enable (system) indicates a transfer of data on the upper byte of the data bus, XD8 through XD15.
Sixteen-Bit devices use /SBHE to condition data-bus buffers tied to XD8 through XD15.

DIGITAL-LOGIC AG MSM800 SEV Manual V1.0A
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SD[O..15], input/output
These signals provide bus bits 0 through 15 for the microprocessor, memory, and I/0 devices. DO is the
least-significant Bit and D15 is the most significant Bit. All 8-Bit devices on the I/O channel should use DO
through D7 for communications to the microprocessor. The 16-Bit devices will use DO through D15. To sup-
port 8-Bit device, the data on D8 through D15 will be gated to DO through D7 during 8-Bit transfers to these
devices; 16-Bit microprocessor transfers to 8-Bit devices will be converted to two 8-Bit transfers.
/SMEMR input/output
These signals instruct the memory devices to drive data onto the data bus for the first MByte. /SMEMR is
active on all memory read cycles. /SMEMR may be driven by any microprocessor or DMA controller in the
system. When a microprocessor on the I/0 channel wishes to drive /SMEMR, it must have the address lines
valid on the bus for one system clock period before driving /SMEMR active. The signal is active low.
/SMEMW, input/output
These signals instruct the memory devices to store the data present on the data bus for the first MByte.
/SMEMW is active in all memory read cycles. /SMEMW may be driven by any microprocessor or DMA con-
troller in the system. When a microprocessor on the I/O channel wishes to drive /SMEMW, it must have the
address lines valid on the bus for one system clock period before driving /SMEMW active. Both signals are
active low.
SYSCLK, output
This is a 8 MHz system clock. It is a synchronous microprocessor cycle clock with a cycle time of 167 nano-
seconds. The clock has a 66% duty cycle. This signal should only be used for synchronization.
TC output
Terminal Count provides a pulse when the terminal count for any DMA channel is reached. The TC com-
pletes a DMA-Transfer. This signal is expected by the onboard floppy disk controller. Do not use this signal,
because it is internally connected to the floppy controller.
/OWS, input
The Zero Wait State (/OWS) signal tells the microprocessor that it can complete the present bus cycle with-
out inserting any additional wait cycles. In order to run a memory cycle to a 16-Bit device without wait cycles,
/OWS is derived from an address decode gated with a Read or Write command. In order to run a memory
cycle to an 8-Bit device with a minimum of one-wait states, /OWS should be driven active one system clock
after the Read or Write command is active, gated with the address decode for the device. Memory Read and
Write commands to an 8-Bit device are active on the falling edge of the system clock. /OWS is active low
and should be driven with an open collector or tri-state driver capable of sinking 2OmA.
12V +/- 5%
used only for the flatpanel supply.
GROUND = 0V
used for the entire system.
VCC, +5V +/- 0.25V
for logic and harddisk/floppy supply.
 For further Informations about PC/104 and PC/104plus, please refer to the PC/104 specification
manual which is available on the internet. http://www.digitallogic.com (manuals)