DIGITAL-LOGIC MICROSPACE MSMX104 User manual

TECHNICAL USER'S MANUAL FOR:
PC/104 Peripheral
MSMX104
Nordstrasse 11/F
CH- 4542 Luterbach
Tel.: ++41 (0)32 681 58 00
Fax: ++41 (0)32 681 58 01
Email: [email protected]om
Homepage: http://www.digitallogic.com

DIGITAL-LOGIC AG MSMX104 Manual V1.3
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COPYRIGHT 

1998-2004 BY DIGITAL-LOGIC AG
No part of this document may be reproduced, transmitted, transcribed, stored in a retrieval system, in any
form or by any means, electronic, mechanical, optical, manual, or otherwise, without the prior written
permission of DIGITAL-LOGIC AG.
The software described herein, together with this document, are furnished under a license agreement and
may be used or copied only in accordance with the terms of that agreement.
REVISION HISTORY:
Prod.-Serialnumber:
From: To:
Product
Version
Document
Version
Date/Vis: Modification:
Remarks, News, Attention:
V0.1b 01.99 JM Initial Version
V0.2 02.99 FK Technical description
Released V1.0 V1.0 02.99 JM Jumper location & designs
V1.1 11.99 FK Clarification on page 16
V1.2 12.99 FK Cap. 6 modified
V2.5 V1.3 08.04 DIM UART chip replacement
ATTENTION
1. All information in this manual and the product are subject to change without prior notice.
2. Read this manual prior installation of the product.
3. Read the security information carefully prior installtion of the product.
Product Registration:
Please register your product at:
http://www.digitallogic.com -> SUPPORT -> embedded products -> login
After registration, you will receive driver & software updates, errata information, customer information and
news from DIGITAL-LOGIC AG products automatically.

DIGITAL-LOGIC AG MSMX104 Manual V1.3
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Table of Contents
1 PREFACE............................................................................................................................ 4
1.1 T RADEMARKS .......................................................................................................................................4
1.2 D ISCLAIMER ..........................................................................................................................................4
1.3 E NVIRONMENTAL P ROTECTION S TATEMENT ...........................................................................................4
1.4 E XPLANATION OF S YMBOLS ...................................................................................................................5
1.5 F OR Y OUR S AFETY ...............................................................................................................................7
1.6 L IMITED T WO Y EAR W ARRANTY ............................................................................................................8
2 OVERVIEW ......................................................................................................................... 9
2.1 O RDERING I NFORMATION ......................................................................................................................9
2.2 G ENERAL I NFORMATION ........................................................................................................................9
2.3 S ERIAL COM3, COM4, COM5, COM6 I NTERFACE .............................................................................10
3 PC/104 BUS SIGNALS...................................................................................................... 11
3.1 E XPANSION B US .................................................................................................................................14
4 DETAILED SYSTEM DESCRIPTION ................................................................................ 15
4.1 P ROGRAMMING THE RS422/485 PORT ................................................................................................15
5 CONNECTORS ON THE BOARD ..................................................................................... 16
5.1 C ONNECTOR FOR RS422/RS485 I NTERFACES ....................................................................................16
5.2 C ONNECTORS FOR RS232C INTERFACES ............................................................................................16
6 JUMPER LOCATIONS ON THE BOARD.......................................................................... 18
6.1 T HE JUMPERS ON THIS MICROSPACE PRODUCT ................................................................................18
6.1.1 COM-A Interfacetyp...................................................................................................................18
6.1.2 COM-B Interfacetyp...................................................................................................................18
6.1.3 COM-C Interfacetyp...................................................................................................................18
6.1.4 COM-D Interfacetyp...................................................................................................................18
6.1.5 COM[A-D] Address Configuration ...........................................................................................19
6.1.6 COM-A IRQ Selection ............................................................................................................20
6.1.7 COM-B IRQ Selection ............................................................................................................20
6.1.8 COM-C IRQ Selection ............................................................................................................20
6.1.9 COM-D IRQ Selection ............................................................................................................20
6.2 T HE PART SCHEMATICS OF THE MSMX104 .........................................................................................21
7 INTERFACE OUTPUT....................................................................................................... 22
7.1 RS422 O UTPUT .................................................................................................................................22
7.2 RS485 O UTPUT .................................................................................................................................23
8 INDEX................................................................................................................................ 24

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1 PREFACE
This document is for integrators and programmers of systems based on the MICROSPACE-Computer
family. It contains information on hardware requirements, interconnections, and details of how to program
the system. The specifications given in this manual were correct at the time of printing; advances mean
that some may have changed in the meantime.
The information contained in this document is, to the best of our knowledge, entirely correct. However,
DIGITAL-LOGIC AG, cannot accept liability for any inaccuracies or the consequences thereof, of for any
liability arising from the use or application of any circuit, product decribed herein, as seen fit by DIGITAL-
LOGIC AG without further notice.
1.1 Trademarks
Digtial-Logic , Digital-Logic-Logo, MICROSPACE, smartModule are registered trademarks owned
worldwide by Digital-Logic AG Luterbach (Switzerland). In addition, this document may include names,
company logos, and trademarks which are registered trademarks and are therefore proprietary to their
respective owners.
1.2 Disclaimer
DIGITAL-LOGIC AG makes no representations or warranties with respect to the contents of this manual
and specifically disclaims any implied warranty of merchantability or fitness for any particular purpose.
DIGITAL-LOGIC AG shall under no circumstances be liable for incidental or consequential damages or
related expenses resulting from the use of this product, even if it has been notified of the possibility of
such damage. DIGITAL-LOGIC AG reserves the right to revise this publication from time to time without
obligation to notify any person of such revisions
1.3 Environmental Protection Statement
This product has been manufactured to satisfy environmental protection requirements where possible.
Many of the components used (structural parts, printed circuit baords, connectors, batteries, etc.) are
capable of being recycled.
Final disposition of this product after its service life must be accomplished in accordance with applicable
country, state, or local laws or regulations.

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1.4 Explanation of Symbols
CE Conformity
This symbol indicates that the product described in this manual is in compliance with all applied CE
standards. Please refer also to the section “Applied Standards” in this manual.
Caution, Electric Shock!
This symbol and title warn of hazards due to electrical shocks (> 60V) when touching products or parts of
them. Failure to observe the precautions indicated and/or prescribed by the law may endanger your
life/health and/or result in damage to your material. Please refer also to the section “High Voltage Safety
Instructions” on the following page.
Warning, ESD Sensitive Device!
This symbol and title inform that electronic boards and their components are sensitive to static electricity.
Therefore, care must be taken during all handling operations and inspections of this product, in order to
ensure product integrity at all times. Please read also the section “Special Handling and Unpacking
Instructions” on the following page.
Warning!
This symbol and title emphasize points which, if not fully understood and taken into consideration by the
reader, may endanger your health and/or result in damage to your material.
Note...
This symbol and title emphasize aspects the reader should read through carefully for his or her own
advantage.

DIGITAL-LOGIC AG MSMX104 Manual V1.3
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This symbol and title warn of general hazards from mechanical, electrical, chemical failure. This may
Endager your life/health and/or result in damage to your material.

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1.5 For Your Safety
Your new Digital-Logic product was developed and tested carefully to provide all features
necessary to ensure its compliance with electrical safety requirements. It was also designed for a
long fault-free life. However, the life expectancy of your product can be drastically reduced by
improper treatment during unpacking and installation. Therefore, in the interest of your own safety
and of the correct operation of your new Digital-Logic product, you are requested to conform with
the following guidelines.
Warning!
All operations on this device must be carried out by sufficiently skilled personnel only.
Caution, Electric Shock!
Before installing your new Digital-Logic product, always ensure that your mains power is switched off. This
applies also to the installation of piggybacks or peripherials. Serious electrical shock hazards can exist
during all installation, repair and maintenance operations with this product. Therefore, always unplug the
power cable and any other cables which provide external voltages before performing work.
ESD Sensitive Device!
Electronic boards and their components are sensitive to static electricity. Therefore, care must be taken
during all handling operations and inspections of this product, in order to ensure product integrity at all
times.

DIGITAL-LOGIC AG MSMX104 Manual V1.3
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1.6 Limited Two Year Warranty
DIGITAL-LOGIC AG warrants the hardware and software products it manufactures and produces to be
free from defects in materials and workmanship for one year following the date of shipment from
DIGITAL-LOGIC AG, Switzerland. This warranty is limited to the original purchaser of product and is not
transferable.
During the one year warranty period, DIGITAL-LOGIC AG will repair or replace, at its discretion, any
defective product or part at no additional charge, provided that the product is returned, shipping prepaid,
to DIGITAL-LOGIC AG. All replaced parts and products become property of DIGITAL-LOGIC AG.
Before returning any product for repair, customers are required to contact the company or their distributor.
This limited warranty does not extend to any product which has been damaged as a result of accident,
misuse, abuse (such as use of incorrect input voltages, wrong cabling, wrong polarity, improper or
insufficient ventilation, failure to follow the operating instructions that are provided by DIGITAL-LOGIC AG
or other contingencies beyond the control of DIGITAL-LOGIC AG), wrong connection, wrong information
or as a result of service or modification by anyone other than DIGITAL-LOGIC AG. Neither, if the user has
not enough knowledge of these technologies or has not consulted the product manual or the technical
support of DIGITAL-LOGIC AG and therefore the product has been damaged.
Except, as expressly set forth above, no other warranties are expressed or implied, including, but not
limited to, any implied warranty of merchantability and fitness for a particular purpose, and DIGITAL-
LOGIC AG expressly disclaims all warranties not stated herein. Under no circumstances will DIGITAL-
LOGIC AG be liable to the purchaser or any user for any damage, including any incidental or
consequential damage, expenses, lost profits, lost savings, or other damages arising out of the use or
inability to use the product.

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2 OVERVIEW
2.1 Ordering Information
MSMX104 4 x COM
MSM-CK-COM COMx Cable with 9pin DSUB
2.2 General Information
BUS:
Standard: PC/104
Size: 8 Bit
Power Supply:
Power: Working: 5Volt / 1W
Physical Characteristics:
Dimensions: Length: 90mm
Width: 96mm
Height: 15mm
Operating Environment:
Relative humidity: 5 - 90% non condensing
Vibration: 5 to 2000 Hz
Shock: 10g
Temperature: Operating: Standard
version:
-25°C to +70###C
Industry
version:
-25°C to +85°C
(ask DIGITAL-
LOGIC AG)
Storage: -55°C to 85###
C

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2.3 Serial COM3, COM4, COM5, COM6 Interface
Features:
- Optimized for use with PC/104 cards
- COM3 – COM6 Interface
- Low-power CMOS
- PC/104 expansion connector
- IRQ3, IRQ4, IRQ9, IRQ10, IRQ11 selectable
- RS422, RS485 selectable as an alternative to the RS232C
Specifications:
Data: 16C550 UART Controller
Compatibility: 16C550 BIOS / DOS
Driver: none, supported through standard BIOS
COM-A = COM3: RS232, RS422, RS485
COM-B = COM4: RS232, RS422, RS485
COM-C = COM5: RS232, RS422, RS485
COM-D = COM6: RS232, RS422, RS485
Data Rate: 300 Baud - 115k Baud
Data-Bus: 8Bit
Cable Type: RM2.54mm header
Power: 5 Volt +/- 5%
Temperature: -25°C to +70°C operating
Any information is subject to change without notice.

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3 PC/104 BUS SIGNALS
AEN, output
Address Enable is used to degate the microprocessor and other devices from the I/O channel to allow
DMA transfers to take place. low = CPU Cycle , high = DMA Cycle
BALE, output
Address Latch Enable is provided by the bus controller and is used on the system board to latch valid
addresses and memory decodes from the microprocessor. This signal is used so that devices on the bus
can latch LA17..23. The SA0..19 address lines latched internally according to this signal. BALE is forced
high during DMA cycles.
/DACK[0..3, 5..7], output
DMA Acknowledge 0 to 3 and 5 to 7 are used to acknowledge DMA requests (DRQO through DRQ7).
They are active low. This signal indicates that the DMA operation can begin.
DRQ[0..3, 5..7], input
DMA Requests 0 through 3 and 5 through 7 are asynchronous channel requests used by peripheral
devices and the I/O channel microprocessors to gain DMA service (or control of the system). A request is
generated by bringing a DRQ line to an active level. A DRQ line must be held high until the corresponding
DMA Request Acknowledge (DACK/) line goes active. DRQO through DRQ3 will perform 8-Bit DMA
transfers; DRQ5-7 are used for 16 accesses.
/IOCHCK, input
IOCHCK/ provides the system board with parity (error) information about memory or devices on the I/O
channel. low = parity error, high = normal operation
IOCHRDY, input
I/O Channel Ready is pulled low (not ready) by a memory or I/O device to lengthen I/O or memory cycles.
Any slow device using this line should drive it low immediately upon detecting its valid address and a Read
or Write command. Machine cycles are extended by an integral number of one clock cycle (67
nanoseconds). This signal should be held in the range of 125-15600ns. low = wait, high = normal
operation
/IOCS16, input
I/O 16 Bit Chip Select signals the system board that the present data transfer is a 16-Bit, 1 wait-state, I/0
cycle. It is derived from an address decode. /IOCS16 is active low and should be driven with an open
collector (300 ohm pull-up) or tri-state driver capable of sinking 20mA. The signal is driven based only on
SA15-SAO (not /IOR or /IOW) when AEN is not asserted. In the 8 Bit I/O transfer, the default transfers a 4
wait-state cycle.
/IOR, input/output
I/O Read instructs an I/O device to drive its data onto the data bus. It may be driven by the system
microprocessor or DMA controller, or by a microprocessor or DMA controller resident on the I/O channel.
This signal is active low.
/IOW, input/output
I/O Write instructs an I/O device to read the data on the data bus. It may be driven by any microprocessor
or DMA controller in the system. This signal is active low.

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IRQ[ 3 - 7, 9 - 12, 14, 15], input
These signals are used to tell the microprocessor that an I/O device needs attention. An interrupt request
is generated when an IRQ line is raised from low to high. The line must be held high until the
microprocessor acknowledges the interrupt request.
/Master, input
This signal is used with a DRQ line to gain control of the system. A processor or DMA controller on the I/0
channel may issue a DRQ to a DMA channel in cascade mode and receive a /DACK.
/MEMCS16, input
MEMCS16 Chip Select signals the system board if the present data transfer is a 1 wait-state, 16-Bit,
memory cycle. It must be derived from the decode of LA17 through LA23. /MEMCS16 should be driven
with an open collector (300 ohm pull-up) or tri-state driver capable of sinking 2OmA.
/MEMR input/output
These signals instruct the memory devices to drive data onto the data bus. /MEMR is active on all
memory read cycles. /MEMR may be driven by any microprocessor or DMA controller in the system.
When a microprocessor on the I/0 channel wishes to drive /MEMR, it must have the address lines valid on
the bus for one system clock period before driving /MEMR active. These signals are active low.
/MEMW, input/output
These signals instruct the memory devices to store the data present on the data bus. /MEMW is active in
all memory read cycles. /MEMW may be driven by any microprocessor or DMA controller in the system.
When a microprocessor on the I/O channel wishes to drive /MEMW, it must have the address lines valid
on the bus for one system clock period before driving /MEMW active. Both signals are active low.
OSC, output
Oscillator (OSC) is a high-speed clock with a 70 nanosecond period (14.31818 MHz). This signal is not
synchronous with the system clock. It has a 50% duty cycle. OSC starts 100µs after reset is inactive.
RESETDRV, output
Reset Drive is used to reset or initiate system logic at power-up time or during a low line-voltage outage.
This signal is active high. When the signal is active all adapters should turn off or tri-state all drivers
connected to the I/O channel. This signal is driven by the permanent Master.
/REFRESH, input/output
These signals are used to indicate a refresh cycle and can be driven by a microprocessor on the I/0
channel. These signals are active low.
SAO-SA19, LA17 - LA23 input/output
Address bits 0 through 19 are used to address memory and I/0 devices within the system. These 20
address lines, allow access of up to 1MBytes of memory. SAO through SA19 are gated on the system bus
when BALE is high and are latched on the falling edge of BALE. LA17 to LA23 are not latched and
addresses the full 16 MBytes range. These signals are generated by the microprocessors or DMA
controllers. They may also be driven by other microprocessor or DMA controllers that reside on the I/0
channel. The SA17-SA23 are always LA17-LA23 address timings for use with the MSCS16 signal. This is
advanced AT96 design. The timing is selectable with jumpers LAxx or Saxx.
/SBHE, input/output
Bus High Enable (system) indicates a transfer of data on the upper byte of the data bus, XD8 through
XD15. Sixteen-Bit devices use /SBHE to condition data-bus buffers tied to XD8 through XD15.

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SD[O..15], input/output
These signals provide bus bits 0 through 15 for the microprocessor, memory, and I/0 devices. DO is the
least-significant Bit and D15 is the most significant Bit. All 8-Bit devices on the I/O channel should use DO
through D7 for communications to the microprocessor. The 16-Bit devices will use DO through D15. To
support 8-Bit device, the data on D8 through D15 will be gated to DO through D7 during 8-Bit transfers to
these devices; 16-Bit microprocessor transfers to 8-Bit devices will be converted to two 8-Bit transfers.
/SMEMR input/output
These signals instruct the memory devices to drive data onto the data bus for the first MByte. /SMEMR is
active on all memory read cycles. /SMEMR may be driven by any microprocessor or DMA controller in the
system. When a microprocessor on the I/0 channel wishes to drive /SMEMR, it must have the address
lines valid on the bus for one system clock period before driving /SMEMR active. The signal is active low.
/SMEMW, input/output
These signals instruct the memory devices to store the data present on the data bus for the first MByte.
/SMEMW is active in all memory read cycles. /SMEMW may be driven by any microprocessor or DMA
controller in the system. When a microprocessor on the I/O channel wishes to drive /SMEMW, it must
have the address lines valid on the bus for one system clock period before driving /SMEMW active. Both
signals are active low.
SYSCLK, output
This is a 8 MHz system clock. It is a synchronous microprocessor cycle clock with a cycle time of 167
nanoseconds. The clock has a 66% duty cycle. This signal should only be used for synchronization.
TC output
Terminal Count provides a pulse when the terminal count for any DMA channel is reached. The TC
completes a DMA-Transfer. This signal is expected by the onboard floppy disk controller. Do not use this
signal, because it is internally connected to the floppy controller.
/OWS, input
The Zero Wait State (/OWS) signal tells the microprocessor that it can complete the present bus cycle
without inserting any additional wait cycles. In order to run a memory cycle to a 16-Bit device without wait
cycles, /OWS is derived from an address decode gated with a Read or Write command. In order to run a
memory cycle to an 8-Bit device with a minimum of one-wait states, /OWS should be driven active one
system clock after the Read or Write command is active, gated with the address decode for the device.
Memory Read and Write commands to an 8-Bit device are active on the falling edge of the system clock.
/OWS is active low and should be driven with an open collector or tri-state driver capable of sinking
2OmA.
12V +/- 5%
not used.
GROUND = 0V
used for the entire system.
VCC, +5V +/- 0.25V
for logic supply.

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3.1 Expansion Bus
The bus currents are as follows:
Output Signals: IOH: IOL:
D0 - D16 24 mA 24 mA
A0 - A23 24 mA 24 mA
MR, MW, IOR, IOW, RES, ALE, AEN, C14 24 mA 24 mA
DACKx, DRQx, INTx, PSx, OPW 24 mA 24 mA
Output Signals: Logic Family: Voltage:
ABT-Logic ABT-Logic
Input Signals: ViH(min.) = 2.15 V Vil(max.) = 0.85 V

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4 DETAILED SYSTEM DESCRIPTION
4.1 Programming the RS422/485 port
On the RS422/485-port the signals of UART have the following functions:
Signal of UART Function of RS485
RxD RO (Receive Line)
RTS DE (Transceiver enable) 1=Enable, 0= Tristate
TxD DI (Transmission line)
The /RE is harware straped to low, and the receiver is always enabled.
Typical Application
Summary
If the UART should transmit, then set the Bit RTS in the modem control register to ‘0’ before the databyte
is sent to the transmit register.
If the UART should receive, wait on the receive buffer full flag as usual. Nothing special must be done,
since the RS422/485 receiver is always enabled.
FUNCTION TABLES
ADM489 Transmitting
INPUTS Line
Condition
OUTPUTS
/RE = GND TE=RTS DI B A
0
0
0
0
1
1
0
1
1
0
X
X
no fault
no fault
X
fault
0
1
Z
Z
1
0
Z
Z
ADM489 Receiving
INPUTS OUTPUTS
/RE = GND TE=RTS A - B R
0
0
1
1
≥+ 0.2V
≤- 0.2V
1
0

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5 CONNECTORS ON THE BOARD
5.1 Connector for RS422/RS485 Interfaces
RS422/485 COM-A J18 Pin 1 TX+
J19 selected on J1-2 Pin 2 TX-
Pin 3 RX+
Pin 4 RX-
RS422/485 COM-B J16 Pin 1 TX+
J17 selected on 1-2 Pin 2 TX-
Pin 3 RX+
Pin 4 RX-
RS422/485 COM-C J14
Pin 1 TX+
J15 selected on 1-2 Pin 2 TX-
Pin 3 RX+
Pin 4 RX-
RS422/485 COM-D J12
Pin 1 TX+
J13 selected on 1-2 Pin 2 TX-
Pin 3 RX+
Pin 4 RX-
5.2 Connectors for RS232C interfaces
RS232C COM-A J4 Pin 1 DCD Pin 6 CTS
J19 selected on 2-3 Pin 2 DSR Pin 7 DTR
Pin 3 RxD Pin 8 RI
Pin 4 RTS Pin 9 GND
Pin 5 TxD Pin 10 nc
RS232C COM-B J5 Pin 1 DCD Pin 6 CTS
J17 selected on 2-3 Pin 2 DSR Pin 7 DTR
Pin 3 RxD Pin 8 RI
Pin 4 RTS Pin 9 GND
Pin 5 TxD Pin 10 nc
RS232C COM-C J6 Pin 1 DCD Pin 6 CTS
J15 selected on 2-3 Pin 2 DSR Pin 7 DTR
Pin 3 RxD Pin 8 RI
Pin 4 RTS Pin 9 GND
Pin 5 TxD Pin 10 nc
RS232C COM-A J7 Pin 1 DCD Pin 6 CTS
J13 selected on 2-3 Pin 2 DSR Pin 7 DTR
Pin 3 RxD Pin 8 RI
Pin 4 RTS Pin 9 GND
Pin 5 TxD Pin 10 nc

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J1 PC/104 BUS Interface
Pin A: B: C: D:
0 Ground Ground
1 IOCHCK Ground SBHE MEMCS16
2 SD7 RESET LA23 IOCS16
3 SD6 +5V LA22 IRQ10
4 SD5 IRQ9 LA21 IRQ11
5 SD4 NC LA20 IRQ12
6 SD3 DRQ2 LA19 IRQ13
7 SD2 (-12V) LA18 IRQ14
8 SD1 NC LA17 DACK0
9 SD0 +12V MEMR DRQ0
10 IOCHRDY Ground MEMW DACK5
11 AEN SMEMW SD8 DRQ5
12 SA19 SMEMR SD9 DACK6
13 SA18 SIOW SD10 DRQ6
14 SA17 SIOR SD11 DACK6
15 SA16 DACK3 SD12 DRQ7
16 SA15 DRQ3 SD13 +5 Volt
17 SA14 DACK1 SD14 MASTER
18 SA13 DRQ1 SD15 Ground
19 SA12 REF Ground Ground
20 SA11 SYSCLK
21 SA10 IRQ7
22 SA9 IRQ
23 SA8 IRQ5
24 SA7 IRQ4
25 SA6 IRQ3
26 SA5 DACK2
27 SA4 TC
28 SA3 ALE
29 SA2 +5 Volt
30 SA1 OSC
31 SA0 Ground
32 Ground Ground

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6 JUMPER LOCATIONS ON THE BOARD
6.1 The jumpers on this MICROSPACE product
6.1.1 COM-A Interfacetyp
RS232C RS422/485 Interface Connector
J19 J19 used:
2-3 RS232C J4
1-2 RS422/485 J18
6.1.2 COM-B Interfacetyp
RS232C RS422/485 Interface Connector
J17 J17 used:
2-3 RS232C J5
1-2 RS422/485 J16
6.1.3 COM-C Interfacetyp
RS232C RS422/485 Interface Connector
J15 J15 used:
2-3 RS232C J6
1-2 RS422/485 J14
6.1.4 COM-D Interfacetyp
RS232C RS422/485 Interface Connector
J13 J13 used:
2-3 RS232C J7
1-2 RS422/485 J12

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6.1.5 COM[A-D] Address Configuration
Port Address Available
J2 COM-Numbers on MSMX104 COM-Numbers on the CPU-Board
open COM-A = 3E8 = COM3
COM-B = 2E8 = COM4
COM-C = 338 = COM5
COM-D = 238 = COM6
COM1, COM2
= total 6 COM
closed COM-A = 380 = COM5
COM-B = 388 = COM6
COM-C = 390 = COM7
COM-D = 398 = COM8
COM1, COM2, COM3, COM4
= total 8 COM
The J3 is for future application reserved.
Port Address Available
J3 Not used Not used
1-2 Not used
2-3 Not used
Use the COM definition according to the used CPU-Board.
6x COM application:
With a 2 COM CPU- Board, use the J2 (open) selection. That means, after initializing, totally 6 COM’s are
available. The first 4 ports are supported by the BIOS and the COM5/6 are controlled by an operating-
specific driver. The interrupts must be definied according to the serial driver of the operating system, since
the BIOS uses the COM’s only in the polling-mode.
8x COM application:
With a 4 COM CPU- Board, use the J2 (closed) selection. That means, after initializing, totally 8 COM’s
are available. The first 4 ports are supported by the BIOS and the COM5 to 8 are controlled by a
operating- specific driver. The interrupts must be definied according to the serial driver of the operating
system, since the BIOS uses the COM’s only in the polling-mode.

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6.1.6 COM-A IRQ Selection
IRQ-A Port Address
J8
1-2 IRQ3 COM2
3-4 IRQ4 COM1
5-6 IRQ9 User
7-8 IRQ10 User
9-10 IRQ11 User
6.1.7 COM-B IRQ Selection
IRQ-B Port Address
J9
1-2 IRQ3 COM2
3-4 IRQ4 COM1
5-6 IRQ9 user
7-8 IRQ10 user
9-10 IRQ11 user
6.1.8 COM-C IRQ Selection
IRQ-C Port Address
J10
1-2 IRQ3 COM2
3-4 IRQ4 COM1
5-6 IRQ9 user
7-8 IRQ10 user
9-10 IRQ11 user
6.1.9 COM-D IRQ Selection
IRQ-D Port Address
J11
1-2 IRQ3 COM2
3-4 IRQ4 COM1
5-6 IRQ9 user
7-8 IRQ10 user
9-10 IRQ11 user