
ii EPSON S1C33 Family In-Circuit Debugger
S5U1C33001H1400 Manual (Rev. 0.20)
7.2 Invoking ICD mode ................................................................................................................... 26
7.3 Debugger start-up..................................................................................................................... 27
7.4 Connection test......................................................................................................................... 27
8. FLASH PROGRAMMER MODE ...................................................................................................... 28
8.1 Preparing for flash programming .............................................................................................. 28
8.2 Flash programmer mode operating method.............................................................................. 29
9. FIRMWARE UPDATE PROCEDURE ............................................................................................... 31
10. PRECAUTIONS.............................................................................................................................. 32
10.1 Restrictions on debugging ........................................................................................................ 32
10.1.1 Operation of the internal peripheral circuits ..................................................................... 32
10.1.2 Interrupts when the target program is not running........................................................... 32
10.1.3 Interrupts when the target program is executed in a single step ..................................... 32
10.1.4 Break functions................................................................................................................ 32
10.1.5 Trace function..................................................................................................................33
10.1.6 Counts of the execution counter...................................................................................... 33
10.1.7 Reserved areas in the internal peripheral circuits (C33 STD/Mini core) .......................... 34
10.1.8 Operating clock of the S5U1C33001H (C33 STD/Mini core) ........................................... 34
10.1.9 Area 2 of S1C33xxx (C33 STD/Mini/ADV core)............................................................... 34
10.1.10 Concurrent use of the S5U1C330M2S debug monitor .................................................... 34
10.1.11 Reset sequence .............................................................................................................. 35
10.1.12 Break functions when a reset request isaccepted .......................................................... 35
10.1.13 I/O memory dump by the S5U1C33001H........................................................................ 35
10.1.14 Parameter file ..................................................................................................................35
10.1.15 Models with cache memory embedded ........................................................................... 36
10.1.16 Models with MMU embedded .......................................................................................... 36
10.2 Differences from the actual IC ..................................................................................................37
10.2.1 Register initialization ....................................................................................................... 37
10.3 Usage precautions.................................................................................................................... 38
10.3.1 Connecting and disconnecting equipment....................................................................... 38
10.3.2 Powering on/off ............................................................................................................... 38
10.3.3 Connecting the target system.......................................................................................... 38