Epson S1F76540M0C Series User manual

Rev.1.1
S1F76540M0C Series
Technical Manual

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S1F76540M0C Series Technical Manual EPSON i
(Rev.1.1)
Table of Contents
1. DESCRIPTION.............................................................................................................1
1.1 Description.................................................................................................................................1
1.2 Features .....................................................................................................................................1
2. BLOCK DIAGRAM ......................................................................................................2
3. PIN ASSIGNMENT ......................................................................................................2
4. PIN DESCRIPTION......................................................................................................3
5. FUNCTIONAL DESCRIPTION.....................................................................................4
5.1 Clock Generator ........................................................................................................................4
5.2 Voltage Converter......................................................................................................................5
5.3 Reference Voltage Circuit .........................................................................................................6
5.4 Voltage Stabilizer .......................................................................................................................7
5.5 Power-off Control Circuit..........................................................................................................9
5.6 Soft Start Circuit ......................................................................................................................10
6. ABSOLUTE MAXIMUM RATINGS ............................................................................ 11
7. ELECTRICAL CHARACTERISTICS MEASUREMENT STANDARD........................12
7.1 DC Characteristics ..................................................................................................................12
7.2 AC Characteristics ..................................................................................................................14
8. CHARACTERISTICS GRAPHS.................................................................................15
9. REFERENCE: EXTERNAL CONNECTION EXAMPLES ..........................................19
9.1 Quadruple Boosting + Regulator ...........................................................................................19
9.2 3rd Boosting + Regulator........................................................................................................20
9.3 Double Boosting + Regulator .................................................................................................21
9.4 Quadruple Boosting ................................................................................................................22
9.5 3rd Boosting ............................................................................................................................23
9.6 Double Boosting......................................................................................................................24
9.7 Parallel Connection (Boosting Capacity Increase)...............................................................25
9.8 High-Magnification Boosting Using a Diode.........................................................................26
9.8.1 Quintuple Boosting + Regulator ..........................................................................................26
9.8.2 Sextuple Boosting + Regulator............................................................................................28
9.9 Positive Voltage Converter .....................................................................................................30
9.10 Connection Example when Changing the Regulator Temperature Coefficient................32

1. DESCRIPTION
S1F76540M0C Series Technical Manual EPSON 1
(Rev.1.1)
1. DESCRIPTION
1.1 Description
S1F76540 consists of charge pump type DC/DC converter and voltage regulator with high efficiency and low
power consumption using the CMOS process.
The charge pump type DC/DC converter uses four (three or two) external capacitors to negatively generate the
output voltage, which is four times (triple or twice) higher than for the input voltage.
The voltage regulator uses two external resistors to set the output voltage generated by the DC/DC converter to
any value and supply the regulated output voltage. If necessary, you can provide the negative temperature
gradient characteristics to the regulated output voltage, and it is appropriate for LCD power.
S1F76540 turns the power off with an external signal, enabling you to reduce the wasteful current for system
suspension. It is therefore appropriate for battery-driven portable devices.
1.2 Features
•Charge pump type DC/DC converter (negatively quadruple, triple, or double)
•Built-in voltage regulator (voltage stabilization output circuit)
•High-level conversion efficiency ･･････････ 96%(VI= -5V, Typ.)
•Low consumption current ････････････････ 100mA (VI= -5V, At quadruple boosting, Typ.)
•High output capability ･･･････････････････ 20mA (Max.)
•Input voltage range ･････････････････････ -2.4 to -5.5V (At quadruple boosting)
-2.4 to -7.3V (At 3rd boosting)
-2.4 to -11V (At double boosting)
•DC/DC converter output voltage ･･････････ Input voltage |×4 (At quadruple boosting, Max.)
•Built-in for highly accurate regulator ･･･････ -1.5V±0.05V (At CT0)
standard voltage
•Regulator output voltage temperature ･･･････ -0.05, -0.15, -0.35, -0.55 (%/°C)
gradient function
•Standby current (At power-off) ････････････ 5µA (Max.)
•Adding external parts enables quintuple or more high-magnification booster and regulator.
•Power-off function by external signal
•Completely-self-contained oscillation circuit
•Compact and slim package product (SSOP2-16PIN)
•This IC is not designed for strong radiation activity proof.

2. BLOCK DIAGRAM
2 EPSON S1F76540M0C Series Technical Manual
(Rev.1.1)
2. BLOCK DIAGRAM
Figure 2.1 Block Diagram
3. PIN ASSIGNMENT
Figure 3.1 Pin assignment
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
V
O
V
RI
V
REG
RV
V
DD
FC
TC1
TC2
C2P
C2N
C3N
C1N
C1P
V
I
POFF1X
POFF2X
POFF1X
POFF2X
TC1
TC2
RV
VREG
VRI
VO
VDD
Power-off
control circuit
Clock
generator
Voltage converter
Boost control
circuit
Voltage
stabilizer
Reference
voltage circuit
FC
VI
C1P C1N C3N C2P C2N
Soft start
circuit

4. PIN DESCRIPTION
S1F76540M0C Series Technical Manual EPSON 3
(Rev.1.1)
4. PIN DESCRIPTION
Table 4.1 Pin Description
Pin Name Pin No. Function
VO 1 Quadruple boosting output pin
VRI 2 Regulator input pin
VREG 3 Regulator output pin
RV 4 Input pin for adjusting the regulator output voltage
VDD 5 Power supply pin (+)
FC 6 Input pin for switching the internal clock frequency
Clock input pin at serial or parallel connection (Two-way pin)
TC1 7 Input pin for specifying the regulator output temperature gradient (1)
TC2 8 Input pin for specifying the regulator output temperature gradient (2)
POFF2X 9 Power-off control input pin (2)
POFF1X 10 Power-off control input pin (1)
VI 11 Power supply voltage (-)
C1P 12 Positive connect pin for double and quadruple boosting capacitor
C1N 13 Negative connect pin for double boosting capacitor
C3N 14 Negative connect pin for quadruple boosting capacitor
C2N 15 Negative connect pin for 3rd boosting capacitor
C2P 16 Positive connect pin for 3rd boosting capacitor

5. FUNCTIONAL DESCRIPTION
4 EPSON S1F76540M0C Series Technical Manual
(Rev.1.1)
5. FUNCTIONAL DESCRIPTION
5.1 Clock Generator
S1F76540, which contains a clock generator for boosting control, requires no external parts.
The clock frequency varies depending on the FC pin level (see Table 5.1), and you can select either the low
output mode or high output mode. This results in you being able to select the clock frequency based on the load
current and value of the capacitor to be used because the boosting output impedance varies depending on the
clock frequency and the values of the external capacitors for boosting.
Table 5.1 FC pin settings
Selection judgment characteristics
FC pin Mode
name
Clock
frequency Consumption
current Output ripple Output
impedance
Capacitor
capacity
H(VDD) Low output 4.0kHz
（Typ.）IOP (Note 1) VRP (Note 2) See Figure.5.1 See Figure.5.1
L(VI) High output 16.0kHz
（Typ.）IOP (Note 1) VRP (Note 2) See Figure.5.1 See Figure.5.1
(Note 1) For the consumption current value, see 7.1 DC Characteristics Table.
(Note 2) For information about how to define and roughly estimate the output ripple value, see 9.4.
150
200
250
300
350
400
450
500
550
1 10 100
C[
µ
F]
Boosting output impedance [Ω]
VI=-3V FC=High
VI=-3V FC=Low
VI=-5V FC=High
VI=-5V FC=Low
Quadruple boosting Ta= 25 °C Io=10mA
CI=C1=C2=C3=CO
(Tantalum capacitor)
Figure 5.1 Capacitor capacity value - output impedance characteristics diagram

5. FUNCTIONAL DESCRIPTION
S1F76540M0C Series Technical Manual EPSON 5
(Rev.1.1)
5.2 Voltage Converter
The voltage converter, which consists of boosting control circuit and voltage converter, boosts the input power
supply voltage VI to four times (triple or double) using clocks from the clock generator. However, the 3rd or
double boosting output cannot be obtained simultaneously with for the quadruple boosting. Figure 5.2 shows
the potential relations at quadruple (3rd or double) boosting.
In the parallel connection, the C2P pin is used as a clock output pin in the master side (see Figure 9.8).
Figure 5.2 Boosting potential-relation diagram (At VI = -5V)
[Notes on connecting the capacitor for voltage conversion]
When connecting the capacitor to the C1P, C2P, C1N, C2N, C3N, and VO pins, place the capacitor near this IC
so that the cable is as short as possible.
Double boosting
3rd boosting
Quadruple boosting
VDD (0V)
VI (-5V)
-10V
-15V
-20V

5. FUNCTIONAL DESCRIPTION
6 EPSON S1F76540M0C Series Technical Manual
(Rev.1.1)
5.3 Reference Voltage Circuit
S1F76540 contains a reference voltage circuit for a voltage stabilization circuit (regulator).
The stabilizing potential described in Section 5.4 is defined with the split ratio between the external resistance
and reference voltage values.
The reference voltage allows you to change the temperature coefficient using the TC1 and TC2 pins, and you
can select one of four modes shown in Table 5.2.
Table 5.2 Reference voltage temperature coefficient settings
Reference voltage value VREF(V)
(Note 1)
Temperature coefficient CT (%/°C)
(Note 2)
Mode
name
TC1
(H=VDD)
(L=VI)
TC2
(H=VDD)
(L=VI) Min. Typ. Max. Min. Typ. Max.
CT0 H H -1.55 -1.5 -1.45 -0.07 -0.05 -0.03
CT1 H L -1.62 -1.5 -1.38 -0.19 -0.15 -0.11
CT2 L H -1.65 -1.5 -1.35 -0.42 -0.35 -0.28
CT3 L L -1.70 -1.5 -1.30 -0.65 -0.55 -0.45
(Note 1) The reference voltage is based on Ta = 25°C.
(Note 2) The temperature gradient CT is defined in the following expression: In Table 5.2, the negative sign
assigned to CT means that |VREF| reduces as the temperature rises.
CT = ×
50°C - 0°C
|
VREF
(
50°C
)
|
-
|
VREF
(
0°C
)
|
|
VREF (25°C) |
100
(Note on switching the TC1 and TC2 pins)
When switching the TC1 and TC2 pins after power-on, be sure to turn the power off (POFF1X=POFF2X=VI).

5. FUNCTIONAL DESCRIPTION
S1F76540M0C Series Technical Manual EPSON 7
(Rev.1.1)
5.4 Voltage Stabilizer
The voltage stabilizer stabilizes the voltage input to the VRI pin and outputs any voltage. The output voltage
can be changed to any value based on the ratio between external split resistances R1 and R2 as shown in the
expression (see Section 5.1). In this case, the sum of these split resistances should be as small as possible to
limit influence of external noises; however, the current consumed for the split resistances will increase as shown
in the expression (see Section 5.2). Therefore, the sum of split resistance values should be approximately 100Ω
to 1MΩ.
The temperature coefficient of the stabilizing potential will become equal to that of the reference voltage
described in Section 5.3.
Figure 5.3 VREG setting method and assembly consideration
[Setting method]
yRelational expression between VREG and reference voltage
yConsumption current for split resistances
[Setting example]
The following shows a setting example for outputting VREG = -18V when VI = -5V and VO = -20V at
quadruple boosting.
Determine the total resistor value of split resistances R1 and R2. If the allowable consumption current of the
split resistances is 20µA, the following will be obtained from expression (5.2).
R1+R2 = 18V ÷20µA = 900kΩ
If the reference voltage is -1.5V, the following ratio of the split resistances will be obtained from expression
(5.1).
(R1+R2) ÷R1 = (-18V) ÷(-1.5V) = 12
IREG = ･････Expression (5.2)
|VREG|
R1+R2
×(Reference voltage) ･････Expression (5.1)
VREG = R1
+
R2
R1
VO
1
R2 VRI
VREG
RV
VDD
FC
TC1
TC2
C2P
C2N
C3N
C1N
C1P
VI
POFF1X
POFF2X
2
3
4
5
6
7
8
1
9
1
1
1
1
1
1
R1
1