Epson S1F76540M0C Series User manual

Rev.1.1
S1F76540M0C Series
Technical Manual

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S1F76540M0C Series Technical Manual EPSON i
(Rev.1.1)
Table of Contents
1. DESCRIPTION.............................................................................................................1
1.1 Description.................................................................................................................................1
1.2 Features .....................................................................................................................................1
2. BLOCK DIAGRAM ......................................................................................................2
3. PIN ASSIGNMENT ......................................................................................................2
4. PIN DESCRIPTION......................................................................................................3
5. FUNCTIONAL DESCRIPTION.....................................................................................4
5.1 Clock Generator ........................................................................................................................4
5.2 Voltage Converter......................................................................................................................5
5.3 Reference Voltage Circuit .........................................................................................................6
5.4 Voltage Stabilizer .......................................................................................................................7
5.5 Power-off Control Circuit..........................................................................................................9
5.6 Soft Start Circuit ......................................................................................................................10
6. ABSOLUTE MAXIMUM RATINGS ............................................................................ 11
7. ELECTRICAL CHARACTERISTICS MEASUREMENT STANDARD........................12
7.1 DC Characteristics ..................................................................................................................12
7.2 AC Characteristics ..................................................................................................................14
8. CHARACTERISTICS GRAPHS.................................................................................15
9. REFERENCE: EXTERNAL CONNECTION EXAMPLES ..........................................19
9.1 Quadruple Boosting + Regulator ...........................................................................................19
9.2 3rd Boosting + Regulator........................................................................................................20
9.3 Double Boosting + Regulator .................................................................................................21
9.4 Quadruple Boosting ................................................................................................................22
9.5 3rd Boosting ............................................................................................................................23
9.6 Double Boosting......................................................................................................................24
9.7 Parallel Connection (Boosting Capacity Increase)...............................................................25
9.8 High-Magnification Boosting Using a Diode.........................................................................26
9.8.1 Quintuple Boosting + Regulator ..........................................................................................26
9.8.2 Sextuple Boosting + Regulator............................................................................................28
9.9 Positive Voltage Converter .....................................................................................................30
9.10 Connection Example when Changing the Regulator Temperature Coefficient................32

1. DESCRIPTION
S1F76540M0C Series Technical Manual EPSON 1
(Rev.1.1)
1. DESCRIPTION
1.1 Description
S1F76540 consists of charge pump type DC/DC converter and voltage regulator with high efficiency and low
power consumption using the CMOS process.
The charge pump type DC/DC converter uses four (three or two) external capacitors to negatively generate the
output voltage, which is four times (triple or twice) higher than for the input voltage.
The voltage regulator uses two external resistors to set the output voltage generated by the DC/DC converter to
any value and supply the regulated output voltage. If necessary, you can provide the negative temperature
gradient characteristics to the regulated output voltage, and it is appropriate for LCD power.
S1F76540 turns the power off with an external signal, enabling you to reduce the wasteful current for system
suspension. It is therefore appropriate for battery-driven portable devices.
1.2 Features
•Charge pump type DC/DC converter (negatively quadruple, triple, or double)
•Built-in voltage regulator (voltage stabilization output circuit)
•High-level conversion efficiency ･･････････ 96%(VI= -5V, Typ.)
•Low consumption current ････････････････ 100mA (VI= -5V, At quadruple boosting, Typ.)
•High output capability ･･･････････････････ 20mA (Max.)
•Input voltage range ･････････････････････ -2.4 to -5.5V (At quadruple boosting)
-2.4 to -7.3V (At 3rd boosting)
-2.4 to -11V (At double boosting)
•DC/DC converter output voltage ･･････････ Input voltage |×4 (At quadruple boosting, Max.)
•Built-in for highly accurate regulator ･･･････ -1.5V±0.05V (At CT0)
standard voltage
•Regulator output voltage temperature ･･･････ -0.05, -0.15, -0.35, -0.55 (%/°C)
gradient function
•Standby current (At power-off) ････････････ 5µA (Max.)
•Adding external parts enables quintuple or more high-magnification booster and regulator.
•Power-off function by external signal
•Completely-self-contained oscillation circuit
•Compact and slim package product (SSOP2-16PIN)
•This IC is not designed for strong radiation activity proof.

2. BLOCK DIAGRAM
2 EPSON S1F76540M0C Series Technical Manual
(Rev.1.1)
2. BLOCK DIAGRAM
Figure 2.1 Block Diagram
3. PIN ASSIGNMENT
Figure 3.1 Pin assignment
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
V
O
V
RI
V
REG
RV
V
DD
FC
TC1
TC2
C2P
C2N
C3N
C1N
C1P
V
I
POFF1X
POFF2X
POFF1X
POFF2X
TC1
TC2
RV
VREG
VRI
VO
VDD
Power-off
control circuit
Clock
generator
Voltage converter
Boost control
circuit
Voltage
stabilizer
Reference
voltage circuit
FC
VI
C1P C1N C3N C2P C2N
Soft start
circuit

4. PIN DESCRIPTION
S1F76540M0C Series Technical Manual EPSON 3
(Rev.1.1)
4. PIN DESCRIPTION
Table 4.1 Pin Description
Pin Name Pin No. Function
VO 1 Quadruple boosting output pin
VRI 2 Regulator input pin
VREG 3 Regulator output pin
RV 4 Input pin for adjusting the regulator output voltage
VDD 5 Power supply pin (+)
FC 6 Input pin for switching the internal clock frequency
Clock input pin at serial or parallel connection (Two-way pin)
TC1 7 Input pin for specifying the regulator output temperature gradient (1)
TC2 8 Input pin for specifying the regulator output temperature gradient (2)
POFF2X 9 Power-off control input pin (2)
POFF1X 10 Power-off control input pin (1)
VI 11 Power supply voltage (-)
C1P 12 Positive connect pin for double and quadruple boosting capacitor
C1N 13 Negative connect pin for double boosting capacitor
C3N 14 Negative connect pin for quadruple boosting capacitor
C2N 15 Negative connect pin for 3rd boosting capacitor
C2P 16 Positive connect pin for 3rd boosting capacitor

5. FUNCTIONAL DESCRIPTION
4 EPSON S1F76540M0C Series Technical Manual
(Rev.1.1)
5. FUNCTIONAL DESCRIPTION
5.1 Clock Generator
S1F76540, which contains a clock generator for boosting control, requires no external parts.
The clock frequency varies depending on the FC pin level (see Table 5.1), and you can select either the low
output mode or high output mode. This results in you being able to select the clock frequency based on the load
current and value of the capacitor to be used because the boosting output impedance varies depending on the
clock frequency and the values of the external capacitors for boosting.
Table 5.1 FC pin settings
Selection judgment characteristics
FC pin Mode
name
Clock
frequency Consumption
current Output ripple Output
impedance
Capacitor
capacity
H(VDD) Low output 4.0kHz
（Typ.）IOP (Note 1) VRP (Note 2) See Figure.5.1 See Figure.5.1
L(VI) High output 16.0kHz
（Typ.）IOP (Note 1) VRP (Note 2) See Figure.5.1 See Figure.5.1
(Note 1) For the consumption current value, see 7.1 DC Characteristics Table.
(Note 2) For information about how to define and roughly estimate the output ripple value, see 9.4.
150
200
250
300
350
400
450
500
550
1 10 100
C[
µ
F]
Boosting output impedance [Ω]
VI=-3V FC=High
VI=-3V FC=Low
VI=-5V FC=High
VI=-5V FC=Low
Quadruple boosting Ta= 25 °C Io=10mA
CI=C1=C2=C3=CO
(Tantalum capacitor)
Figure 5.1 Capacitor capacity value - output impedance characteristics diagram

5. FUNCTIONAL DESCRIPTION
S1F76540M0C Series Technical Manual EPSON 5
(Rev.1.1)
5.2 Voltage Converter
The voltage converter, which consists of boosting control circuit and voltage converter, boosts the input power
supply voltage VI to four times (triple or double) using clocks from the clock generator. However, the 3rd or
double boosting output cannot be obtained simultaneously with for the quadruple boosting. Figure 5.2 shows
the potential relations at quadruple (3rd or double) boosting.
In the parallel connection, the C2P pin is used as a clock output pin in the master side (see Figure 9.8).
Figure 5.2 Boosting potential-relation diagram (At VI = -5V)
[Notes on connecting the capacitor for voltage conversion]
When connecting the capacitor to the C1P, C2P, C1N, C2N, C3N, and VO pins, place the capacitor near this IC
so that the cable is as short as possible.
Double boosting
3rd boosting
Quadruple boosting
VDD (0V)
VI (-5V)
-10V
-15V
-20V

5. FUNCTIONAL DESCRIPTION
6 EPSON S1F76540M0C Series Technical Manual
(Rev.1.1)
5.3 Reference Voltage Circuit
S1F76540 contains a reference voltage circuit for a voltage stabilization circuit (regulator).
The stabilizing potential described in Section 5.4 is defined with the split ratio between the external resistance
and reference voltage values.
The reference voltage allows you to change the temperature coefficient using the TC1 and TC2 pins, and you
can select one of four modes shown in Table 5.2.
Table 5.2 Reference voltage temperature coefficient settings
Reference voltage value VREF(V)
(Note 1)
Temperature coefficient CT (%/°C)
(Note 2)
Mode
name
TC1
(H=VDD)
(L=VI)
TC2
(H=VDD)
(L=VI) Min. Typ. Max. Min. Typ. Max.
CT0 H H -1.55 -1.5 -1.45 -0.07 -0.05 -0.03
CT1 H L -1.62 -1.5 -1.38 -0.19 -0.15 -0.11
CT2 L H -1.65 -1.5 -1.35 -0.42 -0.35 -0.28
CT3 L L -1.70 -1.5 -1.30 -0.65 -0.55 -0.45
(Note 1) The reference voltage is based on Ta = 25°C.
(Note 2) The temperature gradient CT is defined in the following expression: In Table 5.2, the negative sign
assigned to CT means that |VREF| reduces as the temperature rises.
CT = ×
50°C - 0°C
|
VREF
(
50°C
)
|
-
|
VREF
(
0°C
)
|
|
VREF (25°C) |
100
(Note on switching the TC1 and TC2 pins)
When switching the TC1 and TC2 pins after power-on, be sure to turn the power off (POFF1X=POFF2X=VI).

5. FUNCTIONAL DESCRIPTION
S1F76540M0C Series Technical Manual EPSON 7
(Rev.1.1)
5.4 Voltage Stabilizer
The voltage stabilizer stabilizes the voltage input to the VRI pin and outputs any voltage. The output voltage
can be changed to any value based on the ratio between external split resistances R1 and R2 as shown in the
expression (see Section 5.1). In this case, the sum of these split resistances should be as small as possible to
limit influence of external noises; however, the current consumed for the split resistances will increase as shown
in the expression (see Section 5.2). Therefore, the sum of split resistance values should be approximately 100Ω
to 1MΩ.
The temperature coefficient of the stabilizing potential will become equal to that of the reference voltage
described in Section 5.3.
Figure 5.3 VREG setting method and assembly consideration
[Setting method]
yRelational expression between VREG and reference voltage
yConsumption current for split resistances
[Setting example]
The following shows a setting example for outputting VREG = -18V when VI = -5V and VO = -20V at
quadruple boosting.
Determine the total resistor value of split resistances R1 and R2. If the allowable consumption current of the
split resistances is 20µA, the following will be obtained from expression (5.2).
R1+R2 = 18V ÷20µA = 900kΩ
If the reference voltage is -1.5V, the following ratio of the split resistances will be obtained from expression
(5.1).
(R1+R2) ÷R1 = (-18V) ÷(-1.5V) = 12
IREG = ･････Expression (5.2)
|VREG|
R1+R2
×(Reference voltage) ･････Expression (5.1)
VREG = R1
+
R2
R1
VO
1
R2 VRI
VREG
RV
VDD
FC
TC1
TC2
C2P
C2N
C3N
C1N
C1P
VI
POFF1X
POFF2X
2
3
4
5
6
7
8
1
9
1
1
1
1
1
1
R1
1

5. FUNCTIONAL DESCRIPTION
8 EPSON S1F76540M0C Series Technical Manual
(Rev.1.1)
Therefore R1 and R2 will be determined as follows.
R1 = 75kΩ
R2 = 825kΩ
[Changing the temperature coefficient]
The temperature coefficient of the stabilizing potential depends on that of the reference voltage described in
Section 5.3. (Case where the split ratio of resistance values for setting does not depend on the temperature)
When setting the temperature coefficient other than that specifiable in S1F76540 to the stabilizing potential,
change it using a thermistor resistor, etc. shown in Figure 9.15.
The following shows how to obtain the VREG value at temperature T.
T0 : 25°C
CTR1 : Temperature coefficient of resistance R1 (Ratio between split resistance values at 25°C)
CTR2 : Temperature coefficient of resistance R2 (Ratio between split resistance values at 25°C)
CT : Temperature coefficient (%/°C) of internal reference voltage
R1(T0) : 25°R1 value (Ω) at 25°C
R2(T0) : 25°R2 value (Ω) at 25°C
VREF(T0) : 25°Internal reference voltage value (V) at 25°C
If the temperature coefficient of R1 is equal to that of R2 in expression (5.3), VREG depends only on the
temperature coefficient of the internal reference voltage.
[Notes on using the voltage stabilization circuit]
•To keep the S1F76540 absolute maximum rating, the setting resistor must be connected between VDD and
VREG of an S1F76540 that uses the regulator. Connecting R1 to VDD of an S1F76540 that does not use the
regulator when connecting the S1F76540 in series will result in deterioration or destruction in this IC.
•The stabilizing potential adjusting pin “RV” has the too high input impedance, which may result in the
regulator being destabilized due to noises. When using this pin, shield the wiring section between the split
resistor and RV pin, or shorten the wiring as much as possible (see Figure 5.3).
•When using the stabilizing power supply voltage pin “VRI”, short-circuit the VRI and VO pins with a shorter
cable (see Figure 5.3), exceeding at high-magnification boosting using an external diode shown in Section 9.8.
[Measures against oscillation]
Installing external parts enables you to take measures of oscillation.
The following shows the parts used and recommended values.
•Capacity between VREG and RV : 220pF
•Serial equivalent resistance of output capacitor CO : 10Ωor more (Note 1)
(Note 1) Specify the minimum necessary value because the ripple value of the output voltage increases.
(See item 9.4.)
･････Expression (5.3)
VREG(T)={1+ ×{1+(T－T0)
×
}
×
VREF(T0)
CTR2
×
R2(T0)
CTR1×R1(T0)
CT
100

5. FUNCTIONAL DESCRIPTION
S1F76540M0C Series Technical Manual EPSON 9
(Rev.1.1)
5.5 Power-off Control Circuit
S1F76540 provides the power-off function, which turns each function on and off by issuing the signals shown in
Table 5.3 from the external system (microprocessor, etc.) to the POFF1X and POFF2X pins.
Using the power-off function, reactive current can be reduced in the application circuit connected in parallel.
When using the power-off function only in two states (all ON and all OFF), connect the POFF2X pin to VI;
power-on and -off can be controlled using only one POFF1X pin.
Table 5.3 Combination of power-on and -off modes
Function state
Mode name
POFF1X
(H=VDD)
(L=VIN)
POFF2X
(H=VDD)
(L=VIN)
Oscillation
circuit Booster Regulator Use
PS1 H L ON ON ON All circuit ON state
PS2 L L OFF OFF
(Note 1)
OFF
(Note 2) All circuit OFF state
PS3 H H OFF ON ON
Slave side in parallel connection
(Booster + Regulator)
PS4 L H ON ON OFF
(Note 2)
Master side in parallel connection
(Booster only)
(Note 1) When the booster is off, the voltage of approximately VI+0.6V is generated in the VO pin.
(Note 2) When the regulator is off, the VREG pin is placed into the high impedance state.
[Notes on using the power-off function]
Before starting the power-off function with an external system signal, check that VI has been stabilized after
power-on. Turning the power on or off before the power is not stabilized will result in a permanent destruction
of this IC.
Figure 5.4 Power-off control start timing
VI
POFF1X
POFF2X
VI
POFF1X
POFF2X

5. FUNCTIONAL DESCRIPTION
10 EPSON S1F76540M0C Series Technical Manual
(Rev.1.1)
5.6 Soft Start Circuit
The soft start circuit is used to minimize the peak value of the rush current at startup of the booster.
As shown in Figure 5.5, the maximum 200 ms (100mSec Typ.) after the input voltage VI has been input is set as
the soft start period. During the soft start period, the VO output may not reach the electric potential that was
boosted sufficiently.
In this case, the electric potential of the VO output is boosted smoothly up to the specified voltage after the soft
start period has been expired.
Figure 5.5 Soft start operation
[Notes on connecting the capacitor for stabilizing the input voltage]
To stabilize the input voltage VI, the capacitor (CI) to be connected between the VDD and VI pins must be
placed near the IC pin so that the wiring is as short as possible.
Soft start time
Typ. 100mSec
Max. 200mSec
Input voltage VI
Booster voltage VO
Stabilization output
VREG Regulator VI

6. ABSOLUTE MAXIMUM RATINGS
S1F76540M0C Series Technical Manual EPSON 11
(Rev.1.1)
6. ABSOLUTE MAXIMUM RATINGS
Table 6.1 Absolute maximum ratings
VDD reference
Rated value
Item Symbol
Min. Max.
Unit Remarks
Input power voltage VI −26.0/N VDD +0.3 V N = Boosting magnification
VI pin
Input pin voltage VI VI −0.3 VDD +0.3 V POFF1X, POFF2X
TC1, TC2, FC pins
Output pin voltage 1 VOC1 VI −0.3 VDD +0.3 V C1P, C2P pins
Output pin voltage 2 VOC2 2 ×VI −0.3 VI +0.3 V C1N pin
Output pin voltage 3 VOC3 3 ×VI −0.3 2 ×VI +0.3 V C2N pin
Output pin voltage 4 VOC4 4 ×VI −0.3 3 ×VI +0.3 V C3N pin
Regulator input power
supply voltage VRI N
×VI −0.3 VDD +0.3 V N = Boosting magnification,
VRI pin
Regulator input pin voltage VRV N ×VI −0.3 VDD +0.3 V N = Boosting magnification,
RV pin
Output voltage VO N ×VI −0.3 VDD +0.3 V N = Boosting magnification
VOUT, VREG pins
Input current IIN - 80 mA VI pin
Output Current IO - N ≤4：20
N >4：80/N mA N = Boosting magnification
VOUT, VREG pins
Allowable dissipation Pd - 210 mW Ta ≤25°C
Operating temperature Topr −40 85 °C -
Storage temperature Tstg −55 150 °C -
Soldering temperature and
time Tsol
- 260･10 °C･S Lead part
(Note 1) Using with a condition exceeding the above absolute maximum rating may result in malfunction or
unrecoverable damage. Moreover, normal function may be achieved temporarily but its reliability
may be significantly low.
(Note 2) Potential relation with external system
The S1F76540 common power supply is set to the highest-level electric potential (VDD). In this
specifications, all the numeric values are represented based on VDD=0V; therefore, be aware of the
potential relation when connecting to an external system.
Figure 6.1 Electric potential relation diagram
S1F76540 side
System side
VCC(+5V)
GND(0V)
VDD(0V)
VI(−5V)
Double boosting
−10V
3rd boosting
−15V
−20V
Quadruple boosting

7. ELECTRICAL CHARACTERISTICS MEASUREMENT STANDARD
12 EPSON S1F76540M0C Series Technical Manual
(Rev.1.1)
7. ELECTRICAL CHARACTERISTICS MEASUREMENT STANDARD
7.1 DC Characteristics
Table 7.1 DC characteristics (1)
Ta = −40°C to +85°C, VDD=0V, VI=-5.0V unless otherwise specified.
Item Symbol Conditions Min Typ. Max. Unit
N: Boosting magnification for CT0 −22/N - −2.4 V
N: Boosting magnification for CT1 −22/N - −2.4 V
N: Boosting magnification for CT2 −22/N - −2.4 V
Input power voltage VI
N: Boosting magnification for CT3 −22/N
- −2.4 V
Boosting start input power
supply voltage VSTA N: Boosting magnification, FC = VDD, at no-load −22/N
- −2.4 V
Boosting output voltage VO - −22 - - V
Regulator input voltage VRI - −22 - −2.8 V
Regulator output voltage VREG IREG = 0, VRI = −22V
RRV = 1MΩ
- - −2.8 V
IO = 10mA (At quadruple boosting)
VI = −5.0V
C1, C2, C3, C0 = 10µF
(Tantalum capacitor)*
- 180 270 Ω
Boosting output
impedance RO IO = 10mA (At quadruple boosting)
VI = −3.0V
C1, C2, C3, C0 = 10µF
(Tantalum capacitor)*
- 230 350 Ω
IO = 2mA (At quadruple boosting)
VI = −5.0V
C1, C2, C3, C0 = 10µF
(Tantalum capacitor)*
- 96 - %
Boosting power
conversion efficiency Peff IO = 2mA (At quadruple boosting)
VI = −3.0V
C1, C2, C3, C0 = 10µF
(Tantalum capacitor)*
- 95 - %
FC = VDD, POFF1X = VI
POFF2X = VDD
VIN = −5.0V, at no-load
C1, C2, C3, C0 = 1µF
(Tantalum capacitor)*
- 100 170 µA
Booster operation
consumption current 1 IOPR1 FC = VDD, POFF1X = VI
POFF2X = VDD
VI = −3.0V, at no-load
C1, C2, C3, C0 = 10µF
(Tantalum capacitor)*
- 70 120 µA
FC = VI, POFF1X = VI
POFF2X = VDD
VI = −5.0V, at no-load
C1, C2, C3, C0 = 10µF
(Tantalum capacitor)*
- 260 440 µA
Booster operation
consumption current 2 IOPR2 FC = VI, POFF1X = VI
POFF2X = VDD
VIN = −3.0V, at no-load
C1, C2, C3, C0 = 10µF
(Tantalum capacitor)*
- 160 270 µA
Regulator operation
consumption current IOPVR VRI = −20V, at no-load RRV = 1MΩ
- 7 15 µA
Static current IQ POFF1X = VI、POFF2X = VI、FC = VDD - - 5.0 µA
Input leak current ILKI Applied pins: POFF1X, POFF2X, FC,
TC1, and TC2
- - 0.5 µA

7. ELECTRICAL CHARACTERISTICS MEASUREMENT STANDARD
S1F76540M0C Series Technical Manual EPSON 13
(Rev.1.1)
Table 7.2 DC characteristics (2)
VDD= 0V, VI= −5.0V
Item Symbol Conditions Min Typ. Max. Unit
Stabilization-output
saturated resistance
RSAT
(Note 1)
0 <IREG <20mA
RV = VDD, Ta = 25°C
- 6 10 Ω
Stability of regulated
output voltage
∆VR
(Note 2)
−20V <VR <−10V
IREG = 1mA, VREG = −9V setting
- - 0.2 %/V
Stabilization-output load
change
∆VO
(Note 3)
0 <IREG <20mA
VRI =−20V, VREG = −15V setting
- 15 50 mV
VREF0 TC1 = VDD, TC2 = VDD -1.55 −1.50 -1.45 V
VREF1 TC1 = VDD, TC2 = VI −1.62 −1.50 −1.38 V
VREF2 TC1 = VI, TC2 = VDD −1.65 −1.50 −1.35 V
Reference voltage
（Ta=25°C）
VREF3 TC1 = VI, TC2 = VI −1.70 −1.50 −1.30 V
CT0 TC1 = VDD, TC2 = VDD
SSOP product -0.07 -0.05 -0.03 %/°C
CT1 TC1 = VDD, TC2 = VI
SSOP product −0.19 −0.15 −0.11 %/°C
CT2 TC1 = VI, TC2 = VDD
SSOP product −0.42 −0.35 −0.28 %/°C
Reference voltage
temperature coefficient
(Note 4)
CT3 TC1 = VI, TC2 = VI
SSOP product −0.65 −0.55 −0.45 %/°C
VIH
VI = −2.4V to −5.5V
Applied pins: POFF1X, POFF2X, FC,
TC1, TC2
0.2VI
- - V
Input voltage level
VIL
VI = −2.4V to −5.5V
Applied pins: POFF1X, POFF2X, FC,
TC1, TC2
- - 0.8VI V
Capacity value of
boosting capacitor CMAX Applied capacitor C1, C2, C3
- - 47 µF
* The characteristics vary depending on the external capacitor. Before determining constants, conduct the
evaluation of the characteristics.
(Note 1) RSAT ＝
(Note 2) ∆VR ＝
(Note 3) ∆VO ＝
(Note 4) CT ＝
∆IREG
VREG (IREG=20mA)
−
VREG (IREG=0mA)
VREG (VRI=-20V)
−
VREG (VRI=10V)
∆VRI ×VREG (VRI=-10V)
VREG (IREG=20mA) −VREG (IREG=0mA)
:
50°C −0°C
|
VREG (Ta=50°C)
|
−
|
VREG (Ta=0°C)
100
|
VREG (Ta=25°C)
|

7. ELECTRICAL CHARACTERISTICS MEASUREMENT STANDARD
14 EPSON S1F76540M0C Series Technical Manual
(Rev.1.1)
7.2 AC Characteristics
Table 7.2 AC Characteristics
Unless otherwise noted: VDD=0V, VI=−5.0V
Item Symbol Conditions Min. Typ. Max. Unit
Ta=25°C 3.0 4.0 5.0 kHz
Internal clock frequency 1 fCL1
FC = VDD
POFF1X= VI
POFF2X = VDD
Applied pin: C1P
Ta= −40°C to +85°C 2.0 4.0 6.0 kHz
Ta=25°C 12.0 16.0 20.0 kHz
Internal clock frequency 2 fCL2
FC = VI
POFF1X = VI
POFF2X= VDD
Applied pin: C1P
Ta= −40°C to +85°C 8.0 16.0 24.0 kHz

8. CHARACTERISTICS GRAPHS
S1F76540M0C Series Technical Manual EPSON 15
(Rev.1.1)
8. CHARACTERISTICS GRAPHS
3.0
3.2
3.4
3.6
3.8
4.0
4.2
-40 -20 0 20 40 60 80 100
Ta[°C]
fosc[kHz]
VI=-2.4V to -5V
0
50
100
150
200
250
300
350
-6-5-4-3-2-10
VI [V]
IOPR[uA]
Ta=25 °C
FC=Low
FC=High
C1to C3, CI, CO=10µF
(1) Internal clock frequency 1 - Temperature (2) Booster operation consumption current - Input Voltage
0
5
10
15
20
0 10 20 30
Io[mA]
Vo[V]
Quadruple boosting
Ta=25 °C
C1to C3, CI, CO=10µF
VI=-5V
3rd boosting
Double boosting
0
2
4
6
8
10
12
14
0 5 10 15 20
Io[mA]
Vo[V]
Quadruple boosting
Ta=25 °C
C1to C3, CI, CO=10µF
VI=-3V
3rd boosting
Double boosting
(3) Boosting output (Vo) - Output current <1> (4) Boosting voltage (Vo) - Output current <2>

8. CHARACTERISTICS GRAPHS
16 EPSON S1F76540M0C Series Technical Manual
(Rev.1.1)
0
1
2
3
4
5
6
7
8
9
10
0 2 4 6 8 10
Io[mA]
Vo[V]
Quadruple boosting
Ta=25 °C
C1to C3, CI, CO=10
µ
F
VI=-2.4V
3rd boosting
Double boosting
0
100
200
300
400
500
-6-5-4-3-2-10
VI [V]
Ro[Ω]
Iｏ=10mA
Quadruple boosting
Ta=25 °C
3rd boosting
Double boosting
(5) Output voltage (Vo) - Output current <3> (6) Boosting output impedance - Input voltage
0
10
20
30
40
50
60
70
80
90
100
0 10 20 30
Io [mA]
Pef
f
[%]
0
30
60
90
120
150
IIN [mA]
Quadruple boosting
Peff
Ta=25 °C
C1to C3, CI, CO=10
µ
F
VI=-5V
3rd boosting Peff
Double boosting Peff
Quadruple boosting
IIN
3rd boosting IIN
Double boosting
IIN
0
10
20
30
40
50
60
70
80
90
100
0 5 10 15 20
Io[mA]
0
10
20
30
40
50
60
70
80
90
100
Pef
f
[%]
IIN [mA]
Quadruple boosting
Peff
Ta=25 °C
C1to C3, CI, CO=10
µ
F
VI=-3V
3rd boosting Peff
Double boosting Peff
Quadruple boosting
IIN
3rd boosting IIN
Double boosting
IIN
(7) Boosting power conversion efficiency - (8) Boosting power conversion efficiency -
Output current <1> Output current <2>
Input current - Output current <1> Input current - Output current <2>

8. CHARACTERISTICS GRAPHS
S1F76540M0C Series Technical Manual EPSON 17
(Rev.1.1)
0
10
20
30
40
50
60
70
80
90
100
0 1 2 3 4 5 6 7 8 9 10
Io[mA]
0
10
20
30
40
50
Peff [%]
IIN [mA]
Quadruple boosting Peff
Ta=25 °C
C1to C3, CI, CO=10
µ
F
VI=-2.4V
3rd boosting Peff
Double boosting Peff
Quadruple boosting IIN
3rd boosting IIN
Double boosting IIN
1.5
1.6
1.7
1.8
1.9
2.0
2.1
2.2
2.3
2.4
2.5
2.6
2.7
0.1 1.0 10.0 100.0
Ta=25 °C
C1to C3, CI, CO=10
µ
F
VI=-5V
RL[k
Ω
]
VSTA1 [V]
(9) Boosting power conversion efficiency - (10) Boosting start input power supply voltage -
Output current <3> Load resistance
Input current - Output current <3>
0.0
0.1
0.2
0.3
0 5 10 15 20 25 30
Io[mA]
VRI=-20V
VRI=-8V
VRI=-12V
|VRI - VREG |[V]
Ta= 25°C
C1to C3, CI, CO=10
µ
F
7.90
7.91
7.92
7.93
7.94
7.95
7.96
7.97
7.98
7.99
8.00
0.1 1.0 10.0 100.0
Ta=25 °C
VRI=-20V
IREG [mA]
VREG [V]
(11)Output voltage lowering - Load current (12) Output voltage (VREG) - Output current <1>