Formosa Industrial Computing MBM-530NS User manual

MBM-530NS
User’s Manual

-2-MBM-530NS User’s Manual
Copyright Notice
No part of this manual, including the products and software described in it, may be
reproduced, transmitted, transcribed, stored in a retrieval system, or translated into any
languages in any forms or by any means, except documentation kept by the purchaser
for backup purposes, without the express written permission of Formosa Industrial
Computing, Inc. (“FIC”).
Copyright@ 2001 Formosa Industrial Computing, Inc. All rights reserved.
No part of this manual, including the products and software described in it.
Trademarks
Products and corporate names appearing in this manual may or may not be
registered trademarks or copyrights of their respective companies, and are used only for
identification or explanation and to the owners’ benefit, without intent to infringe.
•Intel and Celeron are registered trademarks of Intel Corporation.
•Windows and MS-DOS are registered trademarks of Microsoft Corporation.
•Award is a registered trademark of Award Software International, Inc.
•IBM and PS/2 are trademarks of International Business Machines.
•VIA is a registered trademark of VIA Technologies, Inc.
•NSTL is the trademark of National Software Test Lab.
Liability
This User Guide is composed to assist system manufacturers and end users in
setting the Single Board Computer (SBS). FIC provides this guide “AS IS” without
warranty of any kind, either express or implied, including but not limited to the implied
warranties or conditions of merchantability or fitness for a particular purpose. In no
events shall FIC, its directors, officers, employees or agents be liable for any indirect,
special, incidental or consequential damages (including damages for loss of profits, loss of
business, loss of use or data, interruption of business and the like), even if FIC has been
advised of the possibility of such damages arising from any defects or errors in this manual
or product.

Web site: www.formosa21.com
MBM-530NS User’s Manual -3-
Specifications and information contained in this manual are furnished for
informational use only, and are subject to change at any time without notice, and
should not be construed as a commitment by FIC. FIC reserves the right to make
revisions to this publication without the obligation to notify any persons or entities of
any changes. FIC assumes no responsibility or liability for any errors or inaccuracies
that may appear in this manual, including the products and software described in it.
Others
Please inform your dealer immediately should there be any incorrect, missing or
damaged parts.
Please retain the carton, including the original packing materials. Repack the product
in the original way in case there is a need to return it to the manufacturer for
repairing.
Products warranty or service will not be extended if: (1) the product is repaired,
modified or altered, unless such repair, modification or alternation is authorized in
writing by FIC; or (2) the serial number of the product is defaced or missing.
Safety Precautions
•Follow the messages hereinafter to protect your systems from damage on all
occasion.
•Touch a grounded metal object to discharge the static electricity in your body (or
ideally, wear a grounded wrist strop).
•Stay safe from the electric shock. Don’t touch any components of this card when
the card is on. Always switch off power when the system is not in use.
•Disconnect power when changing any hardware device; For instance, when you
connect a jumper or install any cards, a surge of power may damage the
electronic components or the whole system.
Product Name: MBM-530NS
Manual Version: English, 1st edition (E0301-R01)
Document Part No.: C251-530NS-FIC
Release Date: March 2001
Printed in Taiwan

-4-MBM-530NS User’s Manual

Web site: www.formosa21.com
MBM-530NS User’s Manual -5-
Formosa Industrial Computing, Inc.
Sales:
Address: 8F-6, No. 351, Sec. 2, Chung Shan Rd., Chung Ho City, Taipei,
Taiwan 235
Telephone: [phone]
Fax: [phone]
E-mail: [email protected]
Technical Support:
Address: 8F-6, No. 351, Sec. 2, Chung Shan Rd., Chung Ho City, Taipei,
Taiwan 235
Telephone: [phone]
Fax: [phone]
E-mail: [email protected]
Formosa USA, Inc.:
Address: 21540 Praire Street, Unit A, Chatsworth, CA91311, U.S.A.
Telephone: [phone]
Fax: [phone]
E-mail: [email protected]
Beijing Branch Office:
Telephone: [phone]
Fax: [phone]
E-mail: [email protected]
Shanghai Branch Office:
Telephone: [phone]
Fax: [phone]
E-mail: [email protected]
Shenzhen Branch Office:
Telephone: [phone]
Fax: [phone]
E-mail: [email protected]

-6-MBM-530NS User’s Manual
Table of Contents
0. OVERVIEW..................................................................................................9
0.1 Introduction.........................................................................................9
0.2 Packing List.....................................................................................10
0.3 Features............................................................................................11
1. SYSTEM CONTROLLER........................................................................13
1.1 Microprocessor...............................................................................13
1.2 DMA Controller ...............................................................................14
1.3 Keyboard Controller.......................................................................15
1.4 Interrupt Controller .........................................................................16
1.4.1 I/O Port Address Map......................................................17
1.4.2 Real-Time Clock and Non-Volatile RAM.......................18
1.4.3 Timer...................................................................................19
1.5 Serial Port........................................................................................20
1.6 Parallel Port.....................................................................................24
2. HARDWARE CONFIGURATION...........................................................27
2.1 Jumper & Connector Quick Reference Table ............................28
2.2 Block Diagram.................................................................................29
2.3 Component Locations....................................................................30
2.4 How to Set the Jumper..................................................................31
2.5 System Clock Select and CPU Setting.......................................32
2.6 Jumper Setting................................................................................33
J1: Power Connector .....................................................................33
J2: TTL I/O.......................................................................................34
J3: CD Audio in Connector ...........................................................40
J4: Floppy Connector.....................................................................41
J5: VGA Connector D-SUB...........................................................42
J6: IrDA Connector.........................................................................43
JP1: LCD Backlight Control..........................................................44
JP2: CMOS Clear...........................................................................45
JP3: LCD Connector......................................................................46
JP4: LCD Power VDD Select.......................................................47
JP5: External Reset Switch..........................................................48
JP6: COM2 Power Select .............................................................49
S1: COM2 RS-232, RS-422, RS-485 Selection........................50

Web site: www.formosa21.com
MBM-530NS User’s Manual -7-
CN1: PS2 Keyboard / Mouse.......................................................50
CN2: Printer Port............................................................................51
CN3: COM2 Connector .................................................................52
CN4: Multi Sound Panel Connector ............................................53
CN5: Hard Disk Connector ...........................................................54
CN6 & CN7: PC-104 Connector ..................................................55
U11: DiskOnChip Socket...............................................................57
3. SOFTWARE UTILITY..............................................................................59
3.1 Driver File List.................................................................................59
3.2 Install VGA and Audio Driver........................................................60
3.3 Install Network Utility.....................................................................60
4. BIOS SETUP.............................................................................................61
4.1 BIOS Configuration........................................................................62
4.1.1 Award BIOS.......................................................................62
4.1.2 Entering the Award BIOS Setup Menu.........................63
4.1.3 BIOS CONFIGURATION.................................................64
4.2 Standard CMOS Setup..................................................................67
4.3 BIOS Features Setup.....................................................................72
4.4 Chipset Features Setup.................................................................79
4.5 Power Management Setup ...........................................................81
4.6 PnP/PCI Configuration..................................................................83
4.7 Load BIOS Defaults .......................................................................85
4.8 Load Setup Defaults ......................................................................86
4.9 Integrated Peripherals Features Setup.......................................87
4.11 IDE HDD Auto Detection...............................................................92
4.12 Save & Exit Setup ..........................................................................93
4.13 Exit Without Save ...........................................................................93
4.14 Flash BIOS Writer Utility................................................................94
4.14.1 Backup BIOS to file..........................................................94
4.14.2 Update BIOS from file......................................................95
5. SPECIFICATION......................................................................................97
6. PROGRAMMING RS-485.......................................................................99
7. SUPPORT FACILITATION....................................................................102

Web site: www.formosa21.com
MBM-530NS User’s Manual -9-
0. OVERVIEW
This chapter provides an overview of your system features and capabilities.
The following topics are covered:
nIntroduction
nPacking List
nFeatures
0.1 Introduction
The MBM-530NS is new generation half-size CPU board. This card offers much
greater performance than the older cards, such as support for four RS-232C ports
and one 168-pin DIMM socket for up to 128MB of extended memory SDRAM.
The unit also comes with a programmable watchdog timer and other standard
interfaces. The CPU board is excellent for embedded systems, MMI’s, Workstations,
medical applications or POS/POI systems.
The on-board VGA offers the most exciting possibilities yet to the industry.
The on-board VGA/LCD controller brings about a whole new dimension in
industrial computing. No longer do you have to worry about adding an extra
card to your system.

-10-MBM-530NS User’s Manual
0.2 Packing List
Some accessories are included with the system. Before you begin installing
your MBM-530NS board, take a moment to make sure that the following items
have been included inside the MBM-530NS package.
nMBM-530NS all-in-one single CPU board
nHard disk drive interface cable
nParallel port interface cable
nFloppy interface cable
nPS/2 mouse / keyboard adapter cable
nUSB cable
nAudio adapter cable
nCOM port cable
nUser’s Manual
nSoftware utility driver
nLCD cable (optional)
nIR cable (optional)
nTTL I/O cable (optional)

Web site: www.formosa21.com
MBM-530NS User’s Manual -11-
0.3 Features
The system provides a number of special features that enhance its reliability,
ensure its long-term availability, and improve its expansion capabilities, as
well as its hardware structure.
nNS GX1-300 MHz CPU
nOn chip UMA-systemVGA(On-board CRT and 18 bit TFT-LCD panel display)
nSupports IDE hard disk drives
nSupports floppy disk drives
nSupports 1 bi-directional parallel port
nSupports 2 USB port
nSupports 16-bit PnP sound system
n100/10 BaseT Ethernet with RJ-45 connector
nPC/AT compatible keyboard
nProgrammable watchdog timer
nAWARD Flash BIOS
nMulti-layer PCB for noise reduction
n2 COM ports: 1 of the 2 is switchable to RS-485/ RS-422/RS-232
nSupports IrDA compatible transmissions
nDimensions: 140mm X 145mm

Web site: www.formosa21.com
MBM-530NS User’s Manual -13-
1. SYSTEM CONTROLLER
This chapter describes the main structure of the MBM-530NS CPU board.
The following topics are covered:
nMicroprocessors
nDMA Controller
nKeyboard Controller
nInterrupt Controller
nSerial Port
nParallel Port
1.1 Microprocessor
The MBM-530NS uses the NS GX1-300 CPU (or other GX1 CPUs); it is an
advanced 64-bit x86 compatible processor offering high performance, fully
accelerated 2D graphics, a 64-synchronous DRAM controller and a PCI bus
controller, all on a single chip. This latest generation of the MediaGX
processor enables a new class of premium performance notebook/desktop,
and IPC computer designs.
The MediaGX MMX enhanced processor companion chips provide advanced
video and audio functions and permit direct interface to memory. This
high-performance 64-bit processor is x86 instruction set compatible and
supports MMX technology.
This processor is the latest member of the NS MediaGX family, offering high
performance, fully accelerated 2D graphics, synchronous memory interface
and a PCI bus controller, all on a single chip. As described in separate
manuals, the Cx5530A I/O Companion chips fully enable the features of the
MediaGX processor with MMX support. These features include full VGA and
VESA video, 16-bit stereo sound, IDE interface, ISA interface, SMM power
management, and AT compatibility logic. In addition, the newer CX5530A
provides an Ultra DMA/33 interface, MPEG2 assist, and is AC97 Version 2.0
audio compliant.

-14-MBM-530NS User’s Manual
In addition to the advanced CPU features, the MediaGX processor integrates
a host of functions, which are typically implemented with external components.
A full-function graphics accelerator provides pixel processing and rendering
functions.
The NS MediaGX MMX-Enhanced Processor represents a new generation of
x86-compatible 64-bit microprocessors with sixth-generation features. The decoupled
load/store unit (within the memory management unit) allows multiple instructions in a
single clock cycle. Other features include single-cycle execution, single-cycle
instruction decode, 16KB write-back cache, and clock rates up to 300MHz.
These features are possible by the use of advanced-process technologies and
super pipelining.
1.2 DMA Controller
The equivalent of two 8237A DMA controllers are implemented on the
MBM-530NS board. Each controller is a four-channel DMA device that will
generate the memory addresses and control signals necessary to transfer
information directly between a peripheral device and memory. This allows high
speed information transfer with less CPU intervention. The two DMA
controllers are internally cascaded to provide four DMA channels for transfers
to 8-bit peripherals (DMA1) and three channels for transfers to 16-bit
peripherals (DMA2). DMA2 channel 0 provides the cascade interconnection
between the two DMA devices, thereby maintaining IBM PC/AT compatibility.
The Following is the system information for the DMA channels:
Slave with four 8-bit channels Master with three 16-bit
channels
DMA Controller 1 DMA Controller 2
Channel 0: Spare Channel 4(0): Cascade for
controller 1
Channel 1: IBM SDLC Channel 5(1): Spare
Channel 2: Diskette adapter Channel 6(2): Spare
Channel 3: Spare Channel 7(3): Spare

Web site: www.formosa21.com
MBM-530NS User’s Manual -15-
1.3 Keyboard Controller
The 8042 processor is programmed to support the keyboard serial interface.
The keyboard controller receives serial data from the keyboard, checks its
parity, translates scan codes, and presents it to the system as a byte data in
its output buffer. The controller can interrupt the system when data is placed in
its output buffer, or wait for the system to poll its status register to determine
when data is available.
Data can be written to the keyboard by writing data to the output buffer of the
keyboard controller.
Each byte of data is sent to the keyboard controller in a series with an odd parity bit
automatically inserted. The keyboard controller is required to acknowledgeall data
transmissions. Therefore, another byte of data will not be sent to keyboard
controller until acknowledgment is received for the previous byte sent. The
“output buffer full” interruption may be used for both send and receive
routines.

-16-MBM-530NS User’s Manual
1.4 Interrupt Controller
The equivalent of two 8259 Programmable Interrupt Controllers (PIC) are
included on the MBM-530NS board. They accept requests from peripherals,
resolve priorities on pending interrupts in service, issue interrupt requests to
the CPU, and provide vectors which are used as acceptance indices by the
CPU to determine which interrupt service routine to execute. These two
controllers are cascaded with the second controller representing IRQ8 to
IRQ15, which is rerouted through IRQ2 on the first controller.
The following is the system information of interrupts levels:
IRQ8 : Real time clock
IRQ9 : Serial port 4
IRQ10 : LAN adapter
IRQ11 : Serial port 3
IRQ12 : Reserved for PS/2 mouse
IRQ13 : Math. coprocessor
IRQ14 : Hard disk adapter
IRQ15 : Reserved for Serial port 5
InInterrupt Level
NMI
CTRL1
IRQ 0
IRQ 1
IRQ 2
IRQ 3
IRQ 4
IRQ 5
IRQ 6
IRQ 7
CTRL2
Parity check
Description
Serial port 2
Serial port 1
Parallel port 2
Floppy disk adapter
Parallel port 1
System timer interrupt from timer 8254
Keyboard output buffer full
Rerouting to IRQ8 to IRQ15

Web site: www.formosa21.com
MBM-530NS User’s Manual -17-
1.4.1 I/O Port Address Map
Hex Range Device
000-01F DMA controller 1
020-021 Interrupt controller 1
022-023 NS CX5530A
040-04F Timer 1
050-05F Timer 2
060-06F 8042 keyboard/controller
070-071 Real-time clock (RTC), non-maskable
interrupt (NMI)
080-09F DMA page registers
0A0-0A1 Interrupt controller 2
0C0-0DF DMA controller 2
0F0 Clear Math Co-processor
0F1 Reset Math Co-processor
0F8-0FF Math Co-processor
170-178 Fixed disk 1
1F0-1F8 Fixed disk 0
201 Game port
208-20A EMS register 0
218-21A EMS register 1
278-27F Parallel printer port 2 (LPT 2)
2E8-2EF Serial port 4 (COM 4)
2F8-2FF Serial port 2 (COM 2)
300-31F Prototype card/streaming type adapter
320-33F LAN adapter
378-37F Parallel printer port 1 (LPT 1)
380-38F SDLC, bisynchronous
3A0-3AF Bisynchronous
3B0-3BF Monochrome display and printer port 3
(LPT 3)
3C0-3CF EGA/VGA adapter
3D0-3DF Color/graphics monitor adapter
3E8-3EF Serial port 3 (COM 3)
3F0-3F7 Diskette controller
3F8-3FF Serial port 1 (COM1)

-18-MBM-530NS User’s Manual
1.4.2 Real-Time Clock and Non-Volatile RAM
The MBM-530NS contains a real-time clock compartment that maintains the date
and time in addition to storing configuration information about the computer system.
It contains 14 bytes of clock and control registers and 114 bytes of general purpose
RAM. Because of the use of CMOS technology, it consumes very little power and
can be maintained for long periods of time using an internal Lithium battery. The
contents of each byte in the CMOS RAM are listed as follows:
Address Description
00 Seconds
01 Second alarm
02 Minutes
03 Minute alarm
04 Hours
05 Hour alarm
06 Day of week
07 Date of month
08 Month
09 Year
0A Status register A
0B Status register B
0C Status register C
0D Status register D
0E Diagnostic status byte
0F Shutdown status byte
10 Diskette drive type byte, drive A and B
11 Fixed disk type byte, drive C
12 Fixed disk type byte, drive D
13 Reserved
14 Equipment byte
15 Low base memory byte
16 High base memory byte
17 Low expansion memory byte
18 High expansion memory byte
19-2D Reserved
2E-2F 2-byte CMOS checksum
30 Low actual expansion memory byte
31 High actual expansion memory byte
32 Date century byte
33 Information flags (set during power on)
34-7F Reserved for system BIOS

Web site: www.formosa21.com
MBM-530NS User’s Manual -19-
1.4.3 Timer
The MBM-530NS provides three programmable timers, each with a timing
frequencyof 1.19 MHz.
Timer 0 The output of this timer is tied to interrupt request 0. (IRQ 0)
Timer 1 This timer is used to trigger memory refresh cycles.
Timer 2 This timer provides the speaker tone.
Application programs can load different counts into this timer to
generate various sound frequencies.

-20-MBM-530NS User’s Manual
1.5 Serial Port
The ACEs (Asynchronous Communication Elements ACE1 to ACE4) are used
to convert parallel data to a serial format on the transmit side and convert
serial data to parallel on the receiver side. The serial format, in order of
transmission and reception, is a start bit, followed by five to eight data bits, a
parity bit (if programmed) and one, 1.5 (in a five-bit format only) or two stop
bits (in a 6,7, or 8-bit format). The ACEs are capable of handling divisors of 1
to 65535, and produce a 16x clock for driving the internal transmitter logic.
Provisions are also included to use this 16x clock to drive the receiver logic. Also
included in the ACE a completed MODEM control capability, and a processor
interrupt system that may be software tailored to the computing time required
handling the communications link.
The following table is a summary of each ACE accessible register.
DLAB Port
Address Register
Receiver buffer (read)
0base + 0 Transmitter holding register (write)
0base + 1 Interrupt enable
Xbase + 2 Interrupt identification (read only)
Xbase + 3 Line control
Xbase + 4 MODEM control
Xbase + 5 Line status
Xbase + 6 MODEM status
Xbase + 7 Scratched register
1base + 0 Divisor latch (least significant byte)
1base + 1 Divisor latch (most significant byte)
(1) Receiver Buffer Register (RBR)
Bit 0-7: Received data byte (Read Only)
(2) Transmitter Holding Register (THR)
Bit 0-7: Transmitter holding data byte (Write Only)