Gec Plessey Semiconductors SL486 NA DP User manual

The SL486 is a high gain preamplifier designed to form an
interfac e b etw een an infra-red rec eiv ing diode and the digital inpu t
of remote c ontrol rec eiv ing c irc u its. The dev ic e c ontains tw o other
c irc u it elements, one to prov ide a stretc hed ou tpu t pu lse fac ility
and a v oltage regu lator to allow operation from a w ide range of
su pplies.
FEATURES
■ F ast A c ting A G C Improv es O peration In N oisy
E nv ironments
■ D ifferential Inpu ts R edu c e N oise P ic k -u p and Improv e
Stab ility
■
G y rator Circ u it A llow s O peration in E nv ironments w ith
H igh B rightness B ac k grou nd Light Lev els
■ O u tpu t P u lse Stretc her for u se w ith M ic roproc essor
D ec oders
■ O n-c hip R egu lator allow s O peration from W ide R ange
of P ow er Su pplies
■ Low N oise O u tpu t
3 05 5 -2 .2
SL 4 8 6
IN FRA RED REM O TE C O N TRO L P REAM P L IFIER
F ig. 2 SL486 b loc k diagram
O RD ERIN G IN FO RM ATIO N
SL 4 8 6 N A D P
SL 4 8 6 N A M P
DIODE CATHODE
G Y R ATOR C2
G Y R ATOR C1
IN P U T V
CC
(V
CCI
)
2N D S TAG E DECOU P L E
4TH S TAG E DECOU P L E
OU TP U T V
CC
(V
CCO
)
AG C DECOU P L E
DIODE AN ODE
1S T S TAG E DECOU P L E
IN P U T V
EE
(V
EEI
)
OU TP U T V
EE
(V
EEO
)
R EG U L ATOR IN P U T (V
R EG IN
)
S TR ETCH OU TP U T
S TR ETCH IN P U T
OU TP U T
S L 48 6
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
D P 1 6
M P 1 6
11 0V w rt V EEI
11 0V w rt V EEO
22 0V w rt V CCO
5 mA
5 mA
0°C to 17 0°C
25 5 °C to1150°C
AB SO L UTE M AX IM UM RATIN G S
Su pply v oltage, V CCI
Su pply v oltage, V CCO
R egu lator inpu t v oltage, V R E G IN
O u tpu t c u rrent
Stretc h ou tpu t c u rrent
O perating temperatu re range
Storage temperatu re
5·4k
2·4k
G Y R ATOR
DIF F ER EN TIAL
IN P U T S TAG E
DIODE
CATHODE
DIODE
AN ODE
B U F F ER
15k
AG C P EAK
DETECTOR R EG U L ATOR
P U L S E
S TR ETCH
1
16
14 15 8 12
13
V
EEI
1S T S TAG E
DECOU P L E
AG C
DECOU P L E
V
EEO
R EG U L ATOR
IN P U T
(V
R EG IN
)
9
10
11
OU TP U T
S TR ETCH
IN P U T
S TR ETCH
OU TP U T
V
CCO
4TH S TAG E
DECOU P L E
76
2N D S TAG E
DECOU P L E
523
G Y R ATOR
C1 C2
4
V
CCI
V
R EG
*
*W hen regu lator is u sed
(see A pplic ation N otes).
F ig. 1 P in c onnec tions - top v iew
(Supersedes version in April 1994 Consumer IC Handbook, HB3120 - 2.0)

2
SL486
ELECTRICAL CH ARACTERISTICS
Th e s e c h a ra c te ris tic s a re g u a ra n te e d o v e r th e fo llo w in g c o n d itio n s (u n le s s o th e r w is e s ta te d ):
TAMB = 125°C, VCCI = VCCO = VCC = 14·5V to 17·0V, VEEI = VEEO = VEE = 0V
Ch a ra c te ris tic V a lu e
Min .
Pin
6·5
4·213ID
8·5
6·2
35
4·0
68·0
55·0
2·4
0·7
1·5
0·8
Ty p . Ma x .
9·0
513ID
10
9·5
18
6·5
1·5
1·1
2·3
18·5
42·0
VEEO10·35
VEEO10·5
Un its
mA
mA
mA
V
V
V
V
V
nA
nA
nA
dB
mA (pk)
dB
kΩ
ms
% /°C
V
V
V
V
V (pk)
V (pk)
Co n d itio n s
Supply current (see note 1)
Low voltage supply wrt VEEI & VEEO
High voltage supply wrt VREGIN
Int. regulated voltage, VREG, wrt
VCCO
|VCCI2VCCO|
Minimum sensitivity of differential
input
Common mode rejection
Max imum signal input
AGC range
Output and Stretch output internal
pull-up resistance
Stretch output pulse width, tP
Temperature coefficient of RX
Output low voltage
Output high voltage
Stretch output low voltage
Stretch output high voltage
VCCI supply rejection
4,7
4
4,7
4,7
4,7
13
4,7
1,16
1,16
1,16
9, 11
11
9
9
11
11
4
3·513ID
4·5
8·4
5·9
9·0
74·0
168·0
3·0
VCCO20·5
VCCO20·1
NOTE 1. ID= IR diode forward current
VCC = 5·0V, ID= 1·0µA
VCC = 4·5V, ID<1·5mA
VCC = 18V, ID= 1·0µA, VREGIN = 0V
VEEI = VEEO = VREG (see Figs. 4 & 6)
VCCO1VREGIN = 116V
TAMB = 170°C
ID= 1·0µA
ID= 100µA
ID= 0·5mA
Capacitance pin 9 to pin 10 (C8 on
Figs. 4 and 8) = 10nF;
1·5
VCC
where RX= 200kΩ625%
and RX= internal resistance)
ISINK = 0·2mA max .
ISOU RCE = 5µA
ISINK = 1·6mA max .
ISOU RCE = 5µA, output open circuit
Ripple amplitude at 100Hz ,
VREGIN = 0V
Ripple amplitude at 100Hz ,
VEEO and VEEI = 0V




tP≈ 2RX C8loge ms

3
SL486
inverse to that of the output on pin 9 so must be re-inverted for
microprocessor applications.
Regulator Input, VREGIN (Pin 12) The device can be operated
with supplies of between 4·5V and 9·0V connected between
input/output ground (pins 14 and 13) and input and output VCC
(pins 4 and 7) as shown in Fig. 3. The device can also be
operated with supplies in excess of 9·0V by using the on-chip
regulator. In this case connections are made between VCCO
(pin 7) and the regulator input VREGIN(pin 12) as shown in Fig.
4. A supply voltage of between 9·0V and 18V will then cause
VEEO (pin 13) to be regulated at a level nominally 6·4V below
VCCO(pin 7). The regulator will, however, lose control with a
potential difference of less than 9·0V. Below this level the
voltage on pin 13 will track nominally 1·5V above the level of
pin 12. When the regulator is not used (low voltage operation),
pin 12 must be connected to VEEO (pin 13).
OPERATING NOTES - REFER TO FIGS. 3 AND 4
Gyrator C1 (Pin 3) If the environment in which the device is
operating limits the background light such that the DC compo-
nent of the diode current has a maximum of 200µA, it may be
desirable to omit (as in Fig. 3) the more bulky and costly 68µF
capacitor (gyrator C1 shown in Fig. 4). In this case pin 3 can
be left open circuit. The resultant application will then have a
characteristic of greatly reduced gain when the ambient light
causes the DC current to rise above this threshold.
Alternatively,the 68µF capacitor can be replaced by a
resistor.
The outcome of this is to further reduce the gain in ambient
light levels above the 200µA threshold. Below this threshold
the overall gain is slightly enhanced as the light level ap-
proaches the threshold value. If chosen, this resistance
should lie between 10kΩand 200kΩ.
Noise Im m unity The stretch output can also be used as a
means of improving performance relating to a receiver sys-
tem, over and above its main purpose of providing a micro-
processor interface. Including C8 (Fig. 4) causes the output
pulses (from pin 9) to be subjected to the stretch input
threshold. Thus any noise pulses from pin 9 that are below this
threshold will not be seen at the stretch output (pin 11). A
further improvement can be made, using this stretch input
threshold, by including some additional filtering of the output
(C10 in Fig. 4). This can be adjusted in value (typically 100pF)
to reduce some of the noise pulses that otherwise cross the
threshold, to a level below the threshold.
Screening Use of screening for the device, and associated
components, improves the performance and immunity to
externally radiated noise. The screening method used must
protect the sensitive front-end of the device; provided that
the diode, pin 1-pin 16, C2 (pin 2) and the first stage decoupling
(pin 15) are screened, it may be found that for the application
considered, the remalning circuitry need not be so protected.
In applications where externally radiated noise is minimal, it
may be possible to reduce any screening to pins 1 and 16 and
the diode connections only. Screening may not be necessary
in some instances, but this largely depends on the level of
radiated noise, the decoupling/filtering employed and the
receiver’s decoding techniq ue.
Decoupling Typical decoupling arrangements for use with or
without the regulator are given in Figs. 4 and 3, respectively.
When using the regulator, further improvements in high
freq uency supply rejection are possible by the inclusion of R2.
The value can be chosen so as to keep the pin 12 end of R2
within the 29·0 to 218V (wrt pin 7) specified voltage range.
For example, if the SL486 is used in a system with a supply
of 16V, a typical value tor R2 would be 200Ω. Note that the
regulator is a low impedance point between pins 12 and 13.
C7 thus maintains a low impedance path between pins 4 and
12 at high freq uencies.
APPLICATION NOTES - REFER TO FIG. 4
Diode Anode and Cathode (Pins 1 and 16) The infra-red
receiving diode is connected between pins 1 and 16. The
input circuit is configured so as to reject signals common to
both pins. This improves the stability of the device, and greatly
reduces the sensitivity to radiated electrical noise, The diode
is reverse biased by a nominal 0·65V
Gyrator C2 and C1 (Pins 2 and 3) The decoupling, provided
by gyrator C2 and C1, rolls off the gain of the feedback loop
which balances the DC component of the infra-red diode
current. The values of C2 and C1 are chosen to produce a low
freq uency cut-off characteristic below a nominal 2kHz. Hence,
the gyrator produces approximately 20dB rejection at 100Hz.
The gyrator consists of two feedback loops operating in
tandem. Only one feedback path is functional when the DC
component of the diode current is less than 200µA. This loop
is decoupled by gyrator C2. For diode currents between
200µA and 1·5mA the second control loop is operative, and
this is decoupled by gyrator C1.
The decoupling capacitors, gyrator C2 and C1, must be
connected between pins 2 and 3, to pin 4. The series imped-
ance of C2 and C1 should be kept to a minimum.
First Stage Decouple (Pin 15 ) The capacitor on pin 15
decouples the signal from the non-inverting input of the first
difference amplifier (see also Fig. 2). The capacitance of 15nF
is chosen to produce a 2kHz low freq uency roll-off. The
capacitor must be connected between pins 15 and 14 (the
input ground).
Second Stage Decouple (Pin 5 ) The capacitor on pin 5
decouples the signal from the non-inverting input of the
second difference amplifier. The capacifance of 33nF is
chosen to produce a 2kHz low freq uency roll-off. The capaci-
tor must be connected between pins 5 and 4 (the input VCC).
Fourth Stage Decouple (Pin 6) The capacitor on pin 6
decouples the signal from the non-inverting input of the fourth
difference amplifier. The capacitance of 4.7nF is chosen to
produce a 2kHz low freq uency roll-off. The capacitor must be
connected between pins 6 and 7 (the output VCC).
AGC Decouple/Delay Adjust (Pin 8) The output of the fourth
difference amplifier is followed by a peak detector, which is
used to provide an AGC control level. This produces a current
source which is limited to 10mA at pin 8. The AGC decoupling
capacitor (C5 normally 150nF) filters the pulsed input, and the
resultant level controls the gain of the first three difference
amplifiers.
The AGC control level exhibits a fast attack/slow decay
characteristic. Immediately infra-red pulses are detected, the
gain will be reduced, so that any weaker noise pulses that are
also received will not be seen at the output. Thus, provided the
infra-red pulses are the most intense, it is possible to receive
data in noisy environments. The slow decay keeps the AGC
level intact during data reception, and produces a delay
before any received noise may become present at the output,
when transmission ceases.
Output (Pin 9 ) The output will be low, pulsing high with a
source impedance of a nominal 55kΩ, for a received infra-
red pulse. It is a linear amplification of the input and swings
between output ground and output VCC.
Stretch Input and Stretch Output (Pins 10 and 11) A typical
infra-red PPM system transmits very narrow pulses. The
duration of these pulses is typically 15µs, so in order to use a
microprocessor-based decoder system it is necessary to
lengthen the received pulse. This stretched output can be
obtained from pin 11 when a capacitor is connected between
pins 9 and 10 (C8 in Fig. 4).
The width of the pulse is determined by the value of this
coupling capacitor and is defined in the Electrical Character-
istics. The stretch output is normally high, pulsing low for a
received infra-red pulse and swings between VCCO and VEEO.
It must be noted that the stretch output logic sense is

4
SL486
C2
6·8µ
C1 * 68µ
C3 33n
C4
4·7n
I-R RECEIVER DIODE
C6 *
22µ
C5
150n
C9
15n
0V
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
SL486
C8†
C10 *
C7 *
0·33µ
R1
*
50
R2 *
OUTPUTV
CC
†SEE APPLICATION NOTES
* SEE OPERATING NOTES
6·8µ
33n
4·7n
I-R RECEIVER DIODE
22µ
150n
C9
15n
0V
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
SL486
OUTPUT
V
CC
CAN BE OM ITTED IF
ALREADY IN
APPLICATION CIRCUIT
Fig. 3 Circuit diagram of minimum component application
(low voltage operation)
Fig. 4 SL486 application diagram showing all optional
components (Note: supply decoupling and connections for
use of voltage regulator, also pulse stretch output)
Fig. 5 PCB track (actual size)and component layout for the circuit of Fig. 4, using SL486 in DP16 package
SL486
SL486
SL486
1
V
CC
0V
OUTPUT
R2 OR
W IRE LINK
W IRE LINK,
REM OVED FOR
USE W ITH
REGULATOR
SELECTABLE
OUTPUT VIA
W IRE LINK
C8 (OPTIONAL)
I-R RECEIVER DIODE
C2
C1
C3
C4
C5
C7
C6
C9
R1
COPPER SIDE COM PONENT SIDE

5
SL486
6·8µ
68µ
22n
4·7n
22µ
150n
15n
0V
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
SL486
0·33µ
50
200
PPM
16V
SYSTEM
116V
Fig. 6 SL486 application showing the use of the on-chip regulator
Fig. 7 Microprocessor interface, using the SL486 pulse stretching facility
6·8µ
68µ
22n
4·7n
22µ
150n
15n
0V
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
SL486
0·33µ
50
STRETCHED PPM
MICROPROCESSOR
15V
C8 *
*
SEE TEX T AND
ELECTRICAL
CHARACTERISTICS

6
SL486
PACK AGE DETAILS
Dimensions are shown thus: mm (in)
HEADQ UARTERS OPERATIONS
GEC PLESSEY SEMICONDUCTORS
Cheney Manor, Swindon,
Wiltshire SN2 2Q W, United Kingdom.
Tel: [phone]
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P.O. Box 660017
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© GEC Plessey Semiconductors 1994 Publication No. DS3055 Issue No. 2.2 April 195
This publication is issued to provide information only which (unless agreed by the Company in writing) may not be used, applied or reproduced for any purpose nor form part of any order or contract nor to be regarded
as a representation relating to the products or services concerned. No warranty or guarantee express or implied is made regarding the capability, performance or suitability of any product or service. The Company
reserves the right to alter without prior knowledge the specification, design or price of any product or service. Information concerning possible methods of use is provided as a guide only and does not constitute
any guarantee that such methods of use will be satisfactory in a specific piece of equipment. It is the user's responsibility to fully determine the performance and suitability of any equipment using such information
and to ensure that any publication or data used is up to date and has not been superseded. These products are not suitable for use in any medical products whose failure to perform may result in significant injury
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0·51 (0·02)
M IN
16 L E A D S A T 2·54 (0·10)
N O M . S P A C IN G
0·3 8 /0·6 1
(0·015/0·24 )
20·3 2 (0·8 00)
M A X
7 ·11 (0·28 )
M A X
16-LEAD PLASTIC DIL – DP16
1
16
3 ·05 (0·120)
M IN
P IN 1 R E F
N O T C H
0·23 /0·4 1
(0·009 /0·016 )
7 ·6 2 (0·3 )
N O M C T R S
5·08 /(0·20)
M A X
1·14 /1·6 5
(0·04 5/0·06 5)
N O T E S
1. C o n tro llin g d im e n s io n s a re in c h e s .
2. T h is p a c k a g e o u tlin e d ia g ra m is fo r g u id a n c e
o n ly . P le a s e c o n ta c t y o u r G P S C u s to m e r
S e rv ic e C e n tre fo r fu rth e r in fo rm a tio n .
S E A T IN G P L A N E
0·3 5/0·4 9
(0·014 /0·019 )
3 ·8 0/4 ·00
(0·150/0·157 )
5·8 0/6 ·20
(0·228 /0·24 4 )
9 ·8 0/10·01
(0·3 8 6 /0·3 9 4 )
16
16-LEAD M IN IATU R E PLASTIC DIL - M P16
16 L E A D S A T
1·27 (0·050)
N O M S P A C IN G
0·6 9 (0·027 )
M A X 0·10/0·25
(0·004 /0·010)
1·3 5/1·9 1
(0·053 /0·07 5)
S P O T R E F .
C H A M F E R
R E F .
0·3 7
(0·015)
34 5°
0·19 /0·25
(0·007 /0·010)
0-8 °
0·4 1/1·27
(0·016 /0·050)
P IN 1
N O T E S
1. C o n tro llin g d im e n s io n s a re m illim e tre s .
2. T h is p a c k a g e o u tlin e d ia g ra m is fo r g u id a n c e
o n ly . P le a s e c o n ta c t y o u r G P S C u s to m e r
S e rv ic e C e n tre fo r fu rth e r in fo rm a tio n .