
IMPORTANT OPERATIONAL CONSIDERATIONS
1
The CD standard utilises a 44.1KHz samplin
s
stem, therefore use a 44.1KHz +/- 1000ppm external
clock source for correct operation. If, for example a clock fre
uenc
hi
her than 44.1K is used, the
playback speed and pitch will increase accordingly.
2) Changing the clock source during play or record may cause the CDR850 PLUS to not operate correctly.
If this occurs, reset the power to the machine. Set the clock source usin
the dip-switch selector
when in ‘STOP’ mode or when the machine is powered down.
3
The CDR850 PLUS is desi
ned so that the default clock source is ‘INTERNAL’ For example, if the
machine is set to lock to the word clock input and there is no word clock si
nal connected, then the
machine will revert to ‘INTERNAL’. This ensures that if a clock source input becomes intermittent, the
850 PLUS will always revert to its internal clock.
4
When recordin
from or monitorin
the di
ital input, the CDR850 PLUS outputs the clock contained
within that digital input i.e. the monitor signal bypasses the SRC as with a standard CDR850. However,
a word of caution - If the SRC is on
e.
. 48KHz input or SRC manuall
turned on in MENU
, then the
‘write’ data rate itself will utilise the clock pro
rammed b
the dip-switch selector. Ensure that this is
a 44.1KHz clock. The CDR850PLUS will flash ‘CHECK’ in the displa
if an out of spec. clock is used
during recording.
5
When recordin
or monitorin
the analo
ue input, the CDR850 PLUS locks to the clock source set b
the 4-wa
dip-switch as it does in pla
back mode. NOTE -itis not possible to record analo
ue inputs
when the 850 PLUS is locked to any clock other than 44.1K +/-1000ppm asthis is outside the Orange
Book specification. The CDR850PLUS will flash ‘CHECK’ in the displa
if an out of spec. clock is used
during recording.
BALANCED DIGITAL OUTPUT
This output has all the electrical characteristics of the AES/EBU digital audio interface i.e. 110Ω, 5Vp-p,
balanced line and therefore can be connected to AES/EBU type inputs. The male XLR is wired pin1-
round; pin 2-hot; pin 3-cold. The format of the data follows the SP/DIF protocol i.e. transmits sub-code
data such as start ‘ID’,CD ‘Q’ channel, SCMS etc.
SPECIFICATIONS
Balanced Digital Output:
Impedance 110Ω
Amplitude 5Vp-p
Format SP/DIF
Word Clock Input
Impedance 75Ω
Amplitude TTL levels
Operating Frequency 44.1KHz +/-1000ppm
AES/EBU, SP/DIF COAX/OPTICAL Clock Input
Operating Frequency 44.1KHz +/-1000ppm