Holtek HT98R068 User manual

HT98R068 Two-way Radio MCU
HT98R068 Two-way Radio MCU
Introduction
The HT98R068, designed by Holtek, is an OTP (One-Time Programmable) MCU
specifically designed for two-way radio communication applications. The internal in-band
tone/sub-tone processor supports functions, such as emphasis/de-emphasis, CTCSS/DCS
encoder/decoder, DTMF encoder/decoder, scramble/descramble, VOX…etc., transmitted
to the other port through a radio frequency carrier.
Operating Principles
 Sub-tone processor
CTCSS encode/decode
DCS encode/ decode
 In-band tone processor
DTMF encoder/decode
Selective call tone (EEA standard)
In band tone (user define)
 Other signals
DCS turn off tone
 Advanced audio frequency processor
Scrambling
Companding
Emphasis/De-emphasis
Digital filter: 12.5k / 25k / HPF(300) Filter
 Baseband signal level adjustment function
 Voice control (VOX)
 MIC AGC
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D/N：HA0278E

HT98R068 Two-way Radio MCU
Block Diagram
Hardware Block Function Description
 Audio processor unit: A signal processing unit, responsible for the audio and signal
processing.
 Input unit: The input source option, including MIC OPA, multiplexer, PGA and
multiplexer that provide selectable audio and modulation signal input, such as MICO,
AUX, BEEP1 and DEMI.
 Output unit–MOD/SMOD: The signal output port includes MODO for the baseband
signal output and SMODO for the sub-tone signal output.
 Output unit–Audio: The audio output port with selectable DAC1, BEEP0 multiplexed
outputs.
 MCU unit: The MCU control unit is used to control the user program code for I/O control,
flow control etc.
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HT98R068 Two-way Radio MCU
Application Circuit
The application circuit is divided into three main parts.
 Clock/PLL circuit: Y1, R5, C13 and C14 form the PLL external clock source where Y1 is
a 32.768KHz crystal to lock the PLL to the setup frequency. R4, C11, C12 are the PLL
filter circuits. Refer to the component values for correct circuit design.
 MIC/AUX/DEMOD–The microphone/secondary audio/baseband input port: The MIC
section includes an internal OPA with a gain value =
1
2
R
R

. The R2 value can be altered
according to actual application requirements. If the internal AGC function is to be used,
then the gain needs to have a value of five (ex: R1=1K、R2=5K) before using. DEMOD
is the baseband signal input port after RF demodulation. AUX: This external audio
input supports external audio applications.
 MOD/SMOD/AUDO–Baseband/sub-tone/audio output port: The MOD output can
generate baseband signals connected to the RF input port. The SMOD generates the
sub-tone signals to be used in applications requiring sub-tones. AUDO: The audio
signals after demodulation can generate tones through the LPF circuit connected to
the speaker driver circuit (ex: HT82V739.)
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HT98R068 Two-way Radio MCU
System Clock Switches
Controlled by two registers: CTRL2[7-5,3-0] and CTRL0[0]. The description is as follows:
System Control register 2 (CTRL2)
Bit # 7 6 5 4 3 2 1 0
CTRL2 M1 M0 PLLD2 AUPRST PLLEN PLLD1 PLLD0 LXTEN
POR 0 0 1 0 0 1 1 0
CTRL2[3]:This bit controls the PLL on/off function. The CTRL2[7-6] bits select the PLL
output frequency which has four system frequencies to meet different application
requirements. The CTRL2[5] bit selects the PLL divider magnification of the audio
processor with one and two times provided. The CTRL2[2-1] bit is the PLL divider/multiply
select bits of the MCU with 1, 2, 4 ratio selections. The CTRL2[0] bit is the LXT oscillator
on/off control, which when used together with the HALT instruction, can request the
system to enter the IDLE MODE.
System Control register 0 (CTRL0)
Bit No. 7 6 5 4 3 2 1 0
CTRL0 PCFG PFDCS - - - PFDC LXTLP CLKMOD
POR 0 0 0 0 0 0 0 1
The CTRL0[0] bit selects the MCU speed mode. If CTRL0[0]=1, the MCU operates in the
low speed mode (32.768kHz.) If CTRL0[0]=0, the MCU operates in the PLL mode. When
using the PLL mode, it is important to note that when the PLL is enabled the PLL output
and audio processor divider ratio must be first selected, after which a delay of 10ms (PLL
stabilising time) must be implemented before allowing it to be a device clock source.
When the Audio processor is turned on CTRL2[4].) in the PLL mode, it is recommended
not to change the PLL divider setting.
MCU Audio processor
PLLD1 , PLLD0 PLLD2
PLLEN M1 , M0 PLL
Speed 0,1 (÷1) 1,0 (÷2) 1,1 (0,0) 0 (÷1) 1 (÷2)
0 X 32.768K 32.768K 32.768K
1 0,0 8.192M 8.192M 4.096M 2.048M 8.192M 4.096M
1 0,1 10.24M 10.24M 5.12M 2.56M 10.24M 5.12M
1 1,0 12.288M 12.288M 6.144M 3.072M 12.288M 6.144M
1 1,1 16.384M 16.384M 8.192M 4.096M 16.384M 8.192M
X: Don’t care.
MCU & Audio Processor PLL Divider Table
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HT98R068 Two-way Radio MCU
PLL Control Flow - for MCU
Flow description:
<Set … PLL>: Setup the PLL divider and PLL enable.
<Delay10ms>: Delay 10ms which is to wait for the PLL to stabilise
<CLKMOD=0>: Set the MCU to be in the PLL mode.
Controlling the Audio Processor
Audio Processor Reset
After the PLL is setup, the next step is to enable the audio processor by setting the
CTRL2[4] bit, which is the audio processor reset signal control bit. Use a 101
sequence, which drives POR=0. Also do not set CTRL2[4]=1 when configuring the PLL.
After a reset, it is necessary to wait for 100ms~300ms (Fsys_Audo=16MHz *note) before
sending instructions. This waiting period is for the audio processor internal initialisation,
including RAM initialization, ADC, DAC...etc. Any SPI commands during this period will
be invalid as shown below:
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HT98R068 Two-way Radio MCU
Audio Processor Reset Flow
Flow description:
<CTRL2[4]>: This is the audio processor reset bit. The correct reset sequence is 101,
with two non operational instructions in between.
<Delay100ms~300ms>: This is the audio processor initial time. Any SPI data transmitted
during this period may be overwritten by the audio processor and become invalid.
Audio Processor Turn on Timing
Note: Fsys_Audo = Audio processor f
SYS
.
Audio Processor Turn on Time
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HT98R068 Two-way Radio MCU
SPI Command
The audio processor uses the SPI interface as the communication interface with two
methods of communicating through the internal (SPICR[7]=1) SPI circuit or the external
(SPICR[7]=0) pin-shared I/Os. The internal communication can execute the circuit control
through the control bit as the following shows:
SPI Control Register (SPICR)
Bit # 7 6 5 4 3 2 1 0
SPICR IEMC - ERAM SPISS SPICK MOSI MISO SPIRQ
POR 1 - 0 1 0 0 x x
SPICK MOSI MISO SPISS SPIRQ
SPICR[7]=1 SPICR[3] SPICR[2] SPICR[1] SPICR[4] SPICR[0]
SPICR[7]=0 PC6 PC4 PA5 PC7 PC5
SPI Control Signal Table
One complete data transmission is 20 bits long, starting transmission from the MSB to the
20
th
bit LSB. This includes a 4-bit group command and 16 bits of data. The group
contains both I/O and CLI. The I/O command is used in some application areas, such as
for circuit control, sharing data etc, marked as I/O CMD-NNh in this document. The CLI
(control layer interface) command can access the audio processor related parameters,
such as the threshold parameters, modulation, advanced application control and so on.
Its usage is different from the I/O group and requires three commands to completely write
a command. Reading data requires two commands. These are marked as CLI
CMD–NNNNh in this document. See the following for details:
SPISS
SPICK
MOSI
MISO
C2 C1 C0 D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
C2 C1 C0 D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
C3
C3
SPIRQ
SPISS
SPICK
MOSI
MISO
C2 C1 C0 D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
C2 C1 C0 D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
C3
C3
SPIRQ
HT98R068 SPI Communication Format
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HT98R068 Two-way Radio MCU
SPI Application Example Program
The source codes are attached in the HT98R068_AppInc.inc file where the SPI
application section contains:
 SPI command Macro = SPITX (macro)
 SPI Write = Procedure_SPI_Tx (procedure)
 SPI Read = Procedure_SPI_Rx (procedure)
I/O Command (C[3-0]：Write/Read=8xxxx/9xxxx)
The Bit[19-16] setting differs for reading and writing. Set to “8(Dec)” for a write
command and “9(Dec)” for a read command. The audio processor will not reply with
any information during data writing. D7-D0 will be in a “Don’t Care” condition during
a read command execution. A7~A0 is the register addresses. D7~D0 is the access
data.
Write I/O CMD:
Master Write:
SPI[19:16] SPI[15:8] SPI[7:0]
4’b1000 Address (A7~A0) Data (D7~D0)
Audio processor reply:
SPI[19:16] SPI[15:8] SPI[7:0]
x (No signal) x (No signal) x (No signal)
Read I/O CMD:
Master Write:
SPI[19:16] SPI[15:8] SPI[7:0]
4’b1001 Address (A7~A0) x (Don’t care)
Audio processor reply:
SPI[19:16] SPI[15:8] SPI[7:0]
4’b1001 Address (A7~A0) Data (D7~D0)
Ex: Write C3h to the I/O register “1Eh” and then read this register to confirm if it is
correctly written.
 Write 1Eh Flow
Flow description:
<81E3C>: Enable the DAC2, DAC1, AMP2, AMP1, Buffer, MIC, PGA circuits. There
will be no data response after the command is transmitted.
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HT98R068 Two-way Radio MCU
 Read 1Eh Flow
Flow description:
<91E00>: Read the 1Eh register. A data response will be sent to 1Eh after this
command is transmitted.
CLI Command
This interface protocol is different from the I/O command. For the write mode it must
contain three blocks of 20-bits of SPI data and two for the read mode. To execute the CLI
command, the first is the ID code, then the 16-bit address and finally the 16-bits of data.
Reading data will have no data block. The ID code of the read/write mode is different. ID
code >> Read/Write: 14181/14082 must be correct so that the audio processor will
continue to receive successive data. When the data is written, the audio processor will
reply with a signal: 14000 which means that the data is correctly written; otherwise it
means no data written.
 Write CLI CMD
Master Write
CLI_CMD Major Minor Multi Length
4’b0001 4’b0100 4’b0000 4’b1000 4’b0010
4’b0001 Address (15~0)
4’b0001 Data (15~0)
Audio processor reply
CLI_CMD Major Minor Multi Length
4’b0001 4’b0100 4’b0000 4’b0000 4’b0000
 Read CLI CMD
Master Write
CLI_CMD Major Minor Multi Length
4’b0001 4’b0100 4’b0001 4’b1000 4’b0001
4’b0001 Address (15~0)
Audio processor reply
CLI_CMD Major Minor Multi Length
4’b0001 4’b0100 4’b0001 4’b1000 4’b0001
4’b0001 Data (15~0)
Ex: Write FFFFh (with MOD, SMOD outputs at the maximum modulation) to the CLI
register "04CBh" and then read the register.
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HT98R068 Two-way Radio MCU
 Write 04CBh Flow
Flow description:
<14082>: The CLI write ID code. To execute a write operation with the CLI Command,
it is necessary to execute this command first. No data response will be provided.
<104CB>: Select the 04CB register. Setup as a write register. No data response will be
provided.
<1FFFF>: Setup data: FFFFh. Write data to the register. A data response of 14000
means that it is correctly written; otherwise it means that no data has been correctly
written.
 Read 04CBh Flow
Flow description:
<14181>: The CLI read ID code. To execute a read operation with the CLI command, it
is necessary to execute this command first. No data response will be provided.
<104CB>: Select the 04CB register. Setup the read register. After the command, it will
reply with 14181 and then the read data: 1FFFFh (the 04CBh data is FFFFh.)
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HT98R068 Two-way Radio MCU
External Control
For different audio processing control requirements, in addition to the internal MCU
connections, external SPI control is also supported. However, before using the external
control, some relevant initialisation must be executed which includes the PLL, Reset and
SPI path. After the PLL is setup and the audio processor is reset (the flow is the same as
with the previous unit), set SPICR[7](IEMC)=0 to switch the SPI path to be the external
pin-shared port so that the external SPI command can be executed. The five occupied
I/O ports cannot be used for other functions at this time.
SPICK MOSI MISO SPISS SPIRQ
SPICR[7]=
1 SPICR[3] SPICR[2] SPICR[1] SPICR[4] SPICR[0]
SPICR[7]=
0 PC6 PC4 PA5 PC7 PC5
SPI Control Signal Table
Points to note when using external control:
 When required to reduce the PLL frequency or entering the sleep mode
 When the SPI is returned to the internal MCU control
 Usable pins decrease
For the above problems 1 and 2, it is recommended to use an external SPI controller and
the internal MCU with master/slave signals or establish a control protocol, for the
objective of internal register control for frequency adjustment or audio processor control.
This will reduce the loading on the master MCU (external MCU) for calculations and flow
control. See the following for description:
External MCU Connection Diagram
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HT98R068 Two-way Radio MCU
 Use External Control Flow
Flow description:
<PLL setting …>: Enable and setup the PLL.
<Audio processor …>: Reset the audio processor.
<Control Signal status>: Check the control signal status and select the SPI path to be
external or internal.
<SPICR[7]=0 or =1>: Execute the MCU SPI external/internal control bit configuration.
<External or Internal MCU control flow>: Execute the internal/external MCU system
flow.
IDLE/SLOW/TX/RX Mode Select Setup
When applied to a radio walkie talkie application, the ON/OFF circuit and function for
different modes are different, as well as the ON/OFF timing. Switch to the correct input or
output source and disable any unnecessary circuits so as to save power and eliminate
interference among signals. This part is part is in the I/O command making signal control
easier. The following describes the three mode setups (see SLOW Mode in VOX):
IDLE Mode
When the audio processor is not processing data, entering this mode can save power,
however the quantity depends on the actual practical situation. The device provides many
ways to enter the idle mode - see the datasheet. Here we use the simplest method. The
I/O CMD-51h bit can control the audio processor operation - Stop/Operate: FAh/F8h.
Disable the audio processor clock when no event is happening, then use the MCU to
detect the external signals, and enable the audio processor after the signal is identified as
shown below.
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HT98R068 Two-way Radio MCU
 Audio processor turn on/off using SPI command flow
Flow description:
When there is no output and the input signals are waiting to be processed, the audio
processor can be disabled. After waiting immediate operating can be restarted without
needing to re-initialise.
<851F8>: Enable the audio processor clock.
<851FA>: Disable the audio processor clock.
TX Mode
Enter the Tx mode according to the input data trigger, such as pressing PTT, audio signal
(VOX)…etc. The mode switches, input source selection, circuit disabling etc. will be
generally executed in this mode. As for the audio buffer input source, it is recommended
to switch to bias to reduce noise, or turn off the buffer (I/O CMD-1Eh[3]), or even choose
both. During Tx/Rx switching, it is recommended to execute a circuit ON/OFF, path select
and mode switch so as to decrease the generation of error signals. The following
flowchart illustrates the PTT processing:
Ex: Setup the TX mode, Input = MIC, Output = MOD, No sub-tones
 Tx mode Setup Flow
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HT98R068 Two-way Radio MCU
Flow description:
<81E97>: Enable the DAC1, AMP1, MIC, PGA circuits. Setup the circuit switch first.
DAC1, AMP1 on-enable the MOD output. MIC on–enable the microphone circuit. PGA
on–enable the PGA input source.
<81B10>: Select the PGA, audio input source locations. Select the PGA input source to
be MIC and the audio out to be DAC common-mode bias to reduce noise.
<81140> Enter the Tx mode. Select the Tx mode as the final step to enter the Tx
processing flow.
Rx Mode
This mode is mainly used for baseband signal demodulation. Although it is acceptable to
wait for the RF signal in this mode, it is recommended that the MCU verifies the RSSI
(Receive signal strength indicator) signal before switching the input source to the
DEMOD path and then enabling the audio processor for management. In this way, power
can be saved and in the meantime prevented from erroneous signal judgments. The
mode switches, path select, circuit ON/OFF and the SPI command settings are as
follows:
Ex: RX mode, Input = DEMOD, Output = AUDO(sources = DAC1), No sub-tones.
 Rx mode Setup Flow
Flow description:
<RSSI OK>: Confirm if the RF signal is OK.
<81E8B>: Enable the DAC1, Buffer and PGA circuits. Setup the circuit switches first.
DAC1 on - enable the DAC1 output. AUDO output buffer on–enable the audio output
circuit. PGA on–enable the PGA input source.
<81B25>: Select the PGA, audio input source path. Select the PGA input source to be
DEMOD, audio out sources to be DAC1 and then switch the DAC1 pin source path to
the internal common -mode bias to prevent audio signal leakage from MOD.
<81160> Enter the Rx mode. Select the Rx mode as the final step to enter the Rx
processing flow.
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HT98R068 Two-way Radio MCU
Audio Processor IRQ
When an audio processing event occurs, the audio processor will use this signal as an
interrupt request, during which time the master should send an SPI signal to read the
20-bits of data, transmitting 100h as the first 12 bits of data with the last data
corresponding to the I/O CMD-23h, and then identify what kind of the interrupt it is. The
I/O CMD-22h is the interrupt mask select, and is used as an interrupt request. The main
interrupt source must be enabled (I/O CMD-22h[6]=1.) This application does not need to
use a polling method. Managing after the interrupt after generation is more MCU efficient.
The format description is as follows:
Event Interrupt Mask - 22h Address
Bit 7 6 5 4 3 2 1 0
Name — IRQ DTMF
INT
Selectiv
e call
INT
CTCSS
INT DCS INT
Off_Ton
e
INT
VOX
INT
Audio Processor IRQ Event Masking Control Register
Event VOX DCS CTCSS Sel_Tone DTMF DCS turn
off_Tone
IRQ SPI data 10001
h 10004 h 10008 h 10010h 10020 h 10002h
Polling I/O
Command 23h
01h 04h 08h 10h 20h 02h
IRQ & Polling Comparison Table
Sub-tone Function
For open systems such as walkie-talkies, under conditions of limited frequency channels,
a sub-tone method can be used to increase the same frequency channel numbers and to
receive the required signals. Users at the receiving port should select the correct
sub-tone type and channel so as to decode the data properly and reduce unnecessary
signals, This will help to reduce the problems of mutual interference and reduced
frequency bands. The device provides two main stream sub-tone options described as
follows:
CTCSS Setting
This produces analog signals of sinusoidal frequency from 62.5Hz ~ 254.1Hz, and
contains 51 groups of standard channel selections which meet the relevant specifications.
An additional user-defined channel is provided to increase the flexibility of data protection.
The channel selection is shared by I/O CMD-2Bh and DCS. For the audio processor,
there are still two registers in which data changes should be noted when in use. In the Rx
mode, it is acceptable to use polling (I/O CMD-23h[3]) or interrupt(10008 I/O CMD-23h[3])
methods to detect whether it is the same as the setup channel. The table below provides
relevant table and design descriptions:
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HT98R068 Two-way Radio MCU
Tone
number CTCSS freq.(Hz) Tone number CTCSS freq.(Hz) Tone number CTCSS freq.(Hz)
01h 67 12h 123 23h 225.7
02h 71.9 13h 127.3 24h 12205
03h 74.4 14h 131.8 25h 241.8
04h 77 15h 136.5 26h 250.3
05h 79.7 16h 141.3 27h 69.3
06h 82.5 17h 146.2 28h 62.5
07h 85.4 18h 151.4 29h 159.8
08h 88.5 19h 156.7 2Ah 165.5
09h 91.5 1Ah 162.2 2Bh 171.3
0Ah 94.8 1Bh 167.9 2Ch 177.3
0Bh 97.4 1Ch 173.8 2Dh 183.5
0Ch 100 1Dh 179.9 2Eh 189.9
0Dh 103.5 1Eh 186.2 2Fh 196.6
0Eh 107.2 1Fh 192.8 30h 199.5
0Fh 110.9 20h 203.5 31h 206.5
10h 114.8 21h 210.7 32h 229.1
11h 118.8 22h 218.1 33h 254.1
CTCSS Frequency vs. Tone Numbers Table
Ex: TX mode, Input = MIC, Output = MOD & SMOD, Sub-tone = CTCSS, CTCSS
tone=01h
CTCSS Tx mode Setup Flow:
Flow description:
<82B01>: Setup the sub-tone channel by selecting the first group of the CTCSS channel.
<81E37>: Enable the DAC1, DAC2, AMP1, AMP2, MIC and PGA circuits. DAC1, AMP1
on- enable the MOD output. DAC2, AMP2 on- enable the SMOD output. MIC on– enable
the microphone circuit. PGA on– enable the PGA input source.
<81B10>: Select the PGA and audio input source locations. Select the PGA input source
to be MIC and audio out to be DAC common-mode bias so as to reduce noise.
<81142> Enter the Tx mode. Select the Tx mode and enable the Sub-tone = CTCSS
function.
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HT98R068 Two-way Radio MCU
Ex: RX mode, Input = DEMOD, Output = AUDO(sources = DAC1), Sub-tone = CTCSS,
CTCSS tone=01h
CTCSS Rx mode Setup Flow:
Flow description:
<RSSI OK>: Confirm the RF signal is OK.
<81EC3>: Enable the PGA circuit. PGA on and enable the PGA input source.
<81B30>: Select the PGA audio input source location. Select the PGA input source to be
DEMOD with audio out to be DAC common-mode bias so as to reduce noise.
<81162> Enter the Rx mode. Select the Rx mode and enable the Sub-tone = CTCSS
function.
<Is CTCSS event>：Wait to confirm that this signal has the CTCSS sub-tone of the same
channel.
<81E8B>：Enable the DAC1, Buffer and PGA circuits. DAC1 on and enable the DAC1
output. AUDO output buffer on and enable the audio output circuit. PGA on and enable
the PGA input source.
<81B25>：Select the PGA and Audio input source paths. Select the PGA input source to
be DEMOD, audio out sources to be DAC1 and switch the DAC1 pin source paths to the
internal common-mode bias so as to prevent audio leakage from MOD.
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HT98R068 Two-way Radio MCU
DCS Setup
DCS is a data waveform formed by a digital carrier signals using “0” and “1” data. The 23
bit data signal includes the checksum and data codes. It provides a choice of 83x2
(reverse codes included) standard channels and one user-defined channel. A DCS event
can be detected by using polling (I/O CMD-23h[2]) or interrupt(10004 I/O CMD-23h[2])
together with a DCS turn off tone (I/O CMD-23h[1]) event detection to indicate the end of
a DCS signal (provided by some systems) in order to stop the audio output, or to transmit
an end signal (I/O CMD-82B7F, generally about 200ms~300ms) after a DCS signal is
sent in the Tx mode. The related configuration is shown in the table below:
Tone
Number
DCS
Data
Code
Tone
Number
DCS
Data
Code
Tone
Number
DCS
Data
Code
Tone
Number
DCS Data
Code
Invert-ed
Tone
Number
DCS Data
Code
Invert-ed
Tone
Number
DCS Data
Code
Invert-ed
01h 023 1Dh 174 39h 445 81h 023 9Dh 174 B9h 445
02h 025 1Eh 205 3Ah 464 82h 025 9Eh 205 BAh 464
03h 026 1Fh 223 3Bh 465 83h 026 9Fh 223 BBh 465
04h 031 20h 226 3Ch 466 84h 031 A0h 226 BCh 466
05h 032 21h 243 3Dh 503 85h 032 A1h 243 BDh 503
06h 043 22h 244 3Eh 506 86h 043 A2h 244 BEh 506
07h 047 23h 245 3Fh 516 87h 047 A3h 245 BFh 516
08h 051 24h 251 40h 532 88h 051 A4h 251 C0h 532
09h 054 25h 261 41h 546 89h 054 A5h 261 C1h 546
0Ah 065 26h 263 42h 565 8Ah 065 A6h 263 C2h 565
0Bh 071 27h 265 43h 606 8Bh 071 A7h 265 C3h 606
0Ch 072 28h 271 44h 612 8Ch 072 A8h 271 C4h 612
0Dh 073 29h 306 45h 624 8Dh 073 A9h 306 C5h 624
0Eh 074 2Ah 311 46h 627 8Eh 074 AAh 311 C6h 627
0Fh 114 2Bh 315 47h 631 8Fh 114 ABh 315 C7h 631
10h 115 2Ch 331 48h 632 90h 115 ACh 331 C8h 632
11h 116 2Dh 343 49h 654 91h 116 ADh 343 C9h 654
12h 125 2Eh 346 4Ah 662 92h 125 AEh 346 CAh 662
13h 131 2Fh 351 4Bh 664 93h 131 AFh 351 CBh 664
14h 132 30h 364 4Ch 703 94h 132 B0h 364 CCh 703
15h 134 31h 365 4Dh 712 95h 134 B1h 365 CDh 712
16h 143 32h 371 4Eh 723 96h 143 B2h 371 CEh 723
17h 152 33h 411 4Fh 731 97h 152 B3h 411 CFh 731
18h 155 34h 412 50h 732 98h 155 B4h 412 D0h 732
19h 156 35h 413 51h 734 99h 156 B5h 413 D1h 734
1Ah 162 36h 423 52h 743 9Ah 162 B6h 423 D2h 743
1Bh 165 37h 431 53h 754 9Bh 165 B7h 431 D3h 754
1Ch 172 38h 432 9Ch 172 B8h 432
DCS Code vs. Tone Numbers Table
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HT98R068 Two-way Radio MCU
Ex: TX mode, Input = MIC, Output = MOD & SMOD, Sub-tone = DCS, DCS tone=01h
DCS Tx mode Setup Flow:
(1) Tx DCS signal:
(2)Transmit an off tone signal at the end of the signal:
Flow description (1):
<82B01>：Setup the sub-tone channel by selecting the first DCS channel group.
<81E37>：Enable the DAC1, DAC2, AMP1, AMP2, MIC, PGA circuits. DAC1, AMP1 on -
enable the MOD output. DAC2, AMP2 on - enable the SMOD output. MIC on–enable the
microphone circuit. PGA on–enable the PGA input source.
<81B10>：Select the PGA and audio input source paths. Select the PGA input source to
be MIC with the audio out to be DAC common-mode bias to reduce noise.
<81142>：Enter the Tx mode. Select the Tx mode and enable the sub-tone=DCS
function.
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HT98R068 Two-way Radio MCU
* * * After the DCS signal is transmitted * * *
Flow description (2):
<82B7F>：Select the OFF-tone to produce 134Hz signals.
<81101>：Return to the idle mode. Complete the DCS and return to the standby status.
Ex: Rx mode, No Audio tone signal, DCS sub-tone, AUDO sources = DAC1, DAC2 off,
MIC off, DCS tone=01h all are implemented using interrupts (IRQs) in this example and
use 23h bits for the event status (this step can be omitted in practice yet share the same
program code with polling.) When a DCS event interrupt is received, add an additional
command to read the I/O CMD-23h for event status judgment:
DCS Rx mode Setup Flow:
(1) RF Signal Detection:
(2) Audio processor IRQ Management:
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