Holtek HT98R068-1 User manual

HT98R068-1 Two-way Radio OTP MCU
HT98R068-1 Two-way Radio OTP MCU
D/N: AN0305E
Introduction
The Holtek HT98R068-1 is an ASSP OTP (One-Time Programmable) MCU specifically
designed for two-way radio communication applications. The internal in-band tone/sub-tone
processor supports functions, such as emphasis/de-emphasis, CTCSS/DCS encoder/
decoder, DTMF encoder/decoder, scramble/descramble, VOX…etc., transmitted to the
other port by a radio frequency carrier. Using the code to mark the product extended series,
but it’s still avalible in this text such as the HT98R068-1.
Operating Principles
 Sub-tone
CTCSS encode/decode
DCS encode/decode
 In-band tone processor
DTMF encode/decode
Selective call tone (EEA standard)
In band tone(user define)
 Other signals
DCS turn-off tone
 Advanced audio processor
Scrambling
Companding
Emphasis/De-emphasis
Digital filter: 12.5k / 25k / HPF(300) filter
 In-band signal level adjustment function
 Voice Control(VOX)
 MIC AGC
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HT98R068-1 Two-way Radio OTP MCU
Block Diagram
Hardware Block Function Decription
 Audio processor unit: A signal process unit, responsible for the audio and signal
processing.
 Input unit: The input source selection including MIC OPA, multiplexer and PGA.
Multiplexer provides selectable audio and modulation signal input such as MICO, AUX,
BEEP1 and DEMI.
 Output unit – MOD/SMOD: The signal output port includes MODO for the in-band
signal output and SMODO for the sub-tone signal output (can use this port if you want
to decode sub-tone).
 Output unit – Audio: The audio output port with selective DAC1 and BEEP0 multiplexer
outputs.
 MCU unit: The MCU control unit is applied to control the user program code for I/O
control, flow control etc.
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HT98R068-1 Two-way Radio OTP MCU
Application Circuit
The application circuit is divided into three main parts.
 Clock/PLL circuit: Y1, R7, C16 and C17 are from the PLL external clock source where
Y1 is a 32,768 KHz crystal to lock the PLL so as to the set frequency. R6, C14 and C15
are the PLL filter circuits. Refer to the component values for correct circuit designing.
 MIC/AUX/DEMOD – The microphone/secondary audio/in-band input port: The MIC
section includes an internal OPA with a gain value =
1
2
R
R

. The R2 value can be altered
according to actual application requirments. If the internal AGC function is to be used,
please refer to the AGC section to select this resistance. DEMOD is the in-band signal
input port after RF demodulation. AUX: This external audio input supports external
audio applications. In principle, the input signal must be limited in: {signal * PGA
amplification ratio ≦V
DD
*0.7(AD maximum)}.
 MOD/SMOD/AUDO – In-band/sub-tone/audio output port: The MOD output can
generate in-band signals connected to the RF input port. The SMOD generates
sub-tone signals to be applied in applications requiring sub-tones. AUDO: The audio
signals after demodulation can generate tones through a LPF circuit connected to the
speaker drive circuit (ex: HT82V739). The output signals showing likes a ladder which
is applied in describing the precise relation of the adjacent channel power and tone
quality, but it must be followed with a LPF circuit.
 Power circuit: The power consumption is so much (2[email protected]) at the moment
turning on the audio processor. Hence, note that the V
CC
changement effection. Where,
C11 is the tantalum capacitor for compensation. Considering the mutual interference of
anolog and digtal signals, it’s recommended that seperate VCC and GND into two
parts. The power supply and ground portion then are connected respectively by BEAD.
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HT98R068-1 Two-way Radio OTP MCU
System Clock Switches
In the system setup preliminary stage, the operating frequency controlled by two groups of
registers, CTRL2 [7-5, 3-0] and CTRL0 [0] is firstly selected. The description is as follows:
System Control Register 2 (CTRL2)
Bit 7 6 5 4 3 2 1 0
CTRL2 M1 M0 PLLD2 AUPRST PLLEN PLLD1 PLLD0 LXTEN
POR 0 0 1 0 0 1 1 0
CTRL2 [3]: ON/OFF PLL mode 1. This bit controls the PLL on/off. The CTRL2 [7-6] bits
select the PLL ascending frequency which has four system frequencies to meet different
application requirmennts. The CTRL2 [5] bit selects the PLL divider ratio of the audio
processor with one and two times provided. The CTRL2 [2-1] bits is the MCU PLL
divider/multiplier select bits with 1, 2, 4 ratio selections. The CTRL2 [0] bit is LXT low
speed selection bit, which can request the system to enter the IDLE mode when used
together with HALT instruction.
System Control Register 0 (CTRL0)
Bit 7 6 5 4 3 2 1 0
CTRL0 PCFG PFDCS - - - PFDC LXTLP CLKMOD
POR 0 0 - - - 0 0 1
The CTRL0 [0] bit selects the MCU high speed mode. If CTRL0 [0] =1, the MCU operates
in the low speed mode (32,768kHz). If CTRL0 [0] = 0, the MCU operates in the PLL mode.
When using the PLL mode, it is important to note that when the PLL is enabled the PLL
ascending frequency ratio, MCU and audio processor divider ratio must be first selected
after which a delay of 10ms (PLL stabilising time) mus be implemented before allowing it
to be a device clock source. When the MCU is on by using the CTRL0 [0] bit and the
audio processor is turned on by using the CTRL2 [4] bit, the MCU operates in the PLL
mode, it is not recommended that change the PLL divider setting.
MCU Audio Processor
PLLD1 , PLLD0 PLLD2
PLLEN M1,M0 PLL
Speed
0,1 (÷1) 1,0 (÷2) 1,1 (0,0) 0 (÷1) 1 (÷2)
0 X 32.768K 32.768K 32.768K
1 00 8.192M 8.192M 4.096M 2.048M 8.192M 4.096M
1 01 10.24M 10.24M 5.12M 2.56M 10.24M 5.12M
1 10 12.288M 12.288M 6.144M 3.072M 12.288M 6.144M
1 11 16.384M 16.384M 8.192M 4.096M 16.384M 8.192M
X: Don’t care
MCU & Audio Procrssor PLL Divider Table
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HT98R068-1 Two-way Radio OTP MCU
PLL Control Flow - for MCU
Flow description:
<Set … PLL>: Setup the PLL divider and PLL enable.
<Delay10ms>: Delay 10ms which is to wait the PLL to stabilise.
<CLKMOD=0>: Set the MCU to be in the PLL mode.
Controlling Audio Processor
Audio Processor Reset
After the PLL is setup, the next step is to enable the audio processor by setting the
CTRL2 [4] bit, which is the audio processor reset signal control bit. Use a 1 0 1
sequence, which drives POR=0. Also do not set CTRL[4]= 1 when configuring the PLL.
After a reset, it is necessary to wait for 200ms~300ms (f
SYS
_Audo=16MHz
(Note)
) before
sending the control command. This waiting perios is for the audio processor internal
initialisation, including RAM initialisation, ADC, DAC ...etc. Any SPI commands during
this period will be invalid as shown below:
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HT98R068-1 Two-way Radio OTP MCU
Audio Processor Reset Flow
Flow description:
<CTRL2 [4]>: This is the audio processor reset bit. The correct reset sequence is 1 0
1, with two nope instructions in between.
<Delay>: This is the audio processor initial time. Any SPI data transmitted during this
period may be overwritten by the audio processor and become invalid , which may waste
250ms~300ms.
Audio Processor Turn on Timing
Note: f
SYS
_Audo is audio processor f
SYS
.
Audio processor Turn on Timing
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HT98R068-1 Two-way Radio OTP MCU
SPI Command
The audio processor uses the SPI interface as the communication interface with two methods
of communicating through the internal (SPICR [7] =1) SPI circuit or the external (SPICR [7] =0)
pin-shared I/Os (the following unit will describe). The internal communication can control the
practical circuit by using the control bit as the following table shows:
SPI Control Register(SPICR)
Bit 7 6 5 4 3 2 1 0
SPICR IEMC - ERAM SPISS SPICK MOSI MISO SPIRQ
POR 1 - 0 1 0 0 x x
SPICK MOSI MISO SPISS SPIRQ
SPICR[7]=1 SPICR[3] SPICR[2] SPICR[1] SPICR[4] SPICR[0]
SPICR[7]=0 PC6 PC4 PA5 PC7 PC5
SPI Control Signal Table
One complete data transmission is 20 bits long, starting from MSB to the 20
th
bit LSB. The
data includes a 4-bit group command and a 16-bit data. The group is divided into two
categories, I/O and CLI. Their maximum SPI pulse frequencies are 16MHz and 150kHz.
When designing, it’s recommended that the frequency should be less than 150kHz that
the SPI receive and transmit program can be shared. The I/O command is applied in
some application areas, such as for circuit control, sharing data etc, marked as I/O
CMD-NNh in this document. The CLI (Control layer interface) command can access the
audio processor related parameters, such as the threshold parameters, modulation,
advanced application control and so on. Its usage is different from the I/O group and
requires three commands to write a command completely. Reading data requires two
commands. These are marked as CLI CMD–NNNNh in this document. See the following
for details:
SPISS
SPICK
MOSI
MISO
C2 C1 C0 D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
C2 C1 C0 D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
C3
C3
SPIRQ
SPISS
SPICK
MOSI
MISO
C2 C1 C0 D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
C2 C1 C0 D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
C3
C3
SPIRQ
HT98R068-1 SPI Communication Format
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HT98R068-1 Two-way Radio OTP MCU
SPI Application Example Program
The source codes are attached in the HT98R068-1_AppInc.inc file where the SPI
application section contains:
 SPI command Macro = SPITX (macro)
 SPI Write = Procedure_SPI_Tx (procedure)
 SPI Read = Procedure_SPI_Rx (procedure)
I/O Command (C[3-0]：Write/Read=8xxxx/9xxxx)
The [19-16] bits are setting differs for reading and writing. Set to “8(Dec)” for a write
command and “9(Dec)” for a read command. The audio processor will not reply with any
information during data writing. D7-D0 will be in a “Don’t Care” condition during a read
command execution. A7~A0 are the register addresses. D7~D0 are the access datas.
Write I/O CMD:
Master write:
SPI[19:16] SPI[15:8] SPI[7:0]
4’b1000 Address(A7~A0) Data(D7~D0)
Audio processor reply:
SPI[19:16] SPI[15:8] SPI[7:0]
x (No signal) x (No signal) x (No signal)
Read I/O CMD:
Master Write:
SPI[19:16] SPI[15:8] SPI[7:0]
4’b1001 Address(A7~A0) x (Don’t care)
Audio processor reply:
SPI[19:16] SPI[15:8] SPI[7:0]
4’b1001 Address(A7~A0) Data(D7~D0)
Ex: Write C3h to the I/O register “1Eh” and then read this register to confirm if it is
correctly written.
 Write 1Eh Flow
Flow description:
<81E3C>: Enable the DAC2, DAC1, AMP2, AMP1, Buffer, MIC and PGA circuits.
There will be no data response after the command is transmitted.
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HT98R068-1 Two-way Radio OTP MCU
 Read 1Eh Flow
Flow description:
<91E00>: Read the 1Eh register. A data response will be sent to 1Eh after this
command is transmitted.
CLI Command
This interface protocol is different from the I/O command. For the write mode it must
contain three bytes of 20-bit SPI data and two for the read mode. To excute the CLI
command, the first byte is ID code, then the 16-bit address and finally the 16-bit data.
Reading data will have no data byte. The ID code of the read/write mode is different.
IDcode >> Read/Write: 14181/14082, must be correct so that the audio processor will
continue to receive successive data. When the data is written, the audio processor will
reply with 14000 which means that the data is correctly written, otherwise it means no
data written.
 Write CLI CMD
Master Write
CLI_CMD Major Minor Multi Length
4’b0001 4’b0100 4’b0000 4’b1000 4’b0010
4’b0001 Address[15:0]
4’b0001 Data[15:0]
Audio processor reply
CLI_CMD Major Minor Multi Length
4’b0001 4’b0100 4’b0000 4’b0000 4’b0000
 Read CLI CMD
Master Write
CLI_CMD Major Minor Multi Length
4’b0001 4’b0100 4’b0001 4’b1000 4’b0001
4’b0001 Address[15:0]
Audio processor reply
CLI_CMD Major Minor Multi Length
4’b0001 4’b0100 4’b0001 4’b1000 4’b0001
4’b0001 Data[15:0]
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HT98R068-1 Two-way Radio OTP MCU
Ex: Write FFFFh (with MOD and SMOD outputs at the maximum modulation) to the CLI
register "04CBh" and then read this register.
 Write 04CBh Flow
Flow description:
<14082>: The CLI writeS ID code. To execute a write operation with the CLI Command,
it is necessary to execute this command first. No data response will be provided.
<104CB>: Select the 04CB register. Set as a write register. No data response will be
provided.
<1FFFF>: Set the data: FFFFh. Write data to the register. A data response of 14000
means that it is correctly written, otherwise it means that no data has been correctly
written.
 Read 04CBh Flow:
Flow description:
<14181>: The CLI read ID code. To execute a read operation with the CLI command,
it is necessary to execute this command first. No data response will be provided.
<104CB>: Select the 04CB register. Set the read register. After the command, it will
reply with 14181 firstly, then responses the read data 1FFFFh (the 04CBh data is
FFFFh). There are two bytes of data in all.
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HT98R068-1 Two-way Radio OTP MCU
External Control
For different audio processing control requirements, in addition to the internal MCU
connections, external SPI control is also supported. However, before using the external
control, some relevant initialisation must be executed which includes the PLL, reset and
SPI path. After the PLL is setup and the audio processor is reset (the flow is the same
with the previous unit), set SPICR [7] (IEMC) =0 to switch the SPI path to be an external
pin-shared port so that the external SPI command can be excuted. The five occupied I/O
ports cannot be applied for other functions at this time.
SPICK MOSI MISO SPISS SPIRQ
SPICR[7]=1 SPICR[3] SPICR[2] SPICR[1] SPICR[4] SPICR[0]
SPICR[7]=0 PC6 PC4 PA5 PC7 PC5
SPI Control Signal Table
Points to note when using external control
 when required to reduce the PLL frequency or entering the sleep mode
 when the SPI is returned to the internal MCU control
 Usable pins decrease
When 1 or 2 problems of those described above occurs, it’s recommended that use
master slave control signal in the SPI external control unit and internal MCU or establish
a control protocol, for the objective of internal register control for frequency adjustment or
audio processor control.This will reduce the loading on the master MCU (external MCU)
for calculations and flow control. See the following for description:
External MCU Connection Diagram
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HT98R068-1 Two-way Radio OTP MCU
 Use External Control Flow
Flow description:
<PLL setting>: Enable and set the PLL.
<Audio processor>: Reset the audio processor.
<Control signal status>: Check the control signal status and select the SPI path to be
external or internal.
<SPICR [7] =0 or =1>: Excute the MCU SPI external/internal control bit configuration.
<External or Internal MCU control flow>: Excute the external/internal MCU system flow.
IDLE/SLOW/TX/RX Mode Select Setting
When applied in a radio walkie talkie application, the ON/OFF circuit and function for
different modes are different, as well as the ON/OFF timing. Switch to the correct input or
output source and disable any unnecessary circuits so as to save power and eliminate
interference among signals (Note that turning on the circuit needs a stable time
(according to the circuit, it is usually about 250ms) except that the system enters the
sleep mode to wait). This control is designed in the I/O command group.This part is in the
I/O command making signal control easier and empty the unnecessary processing
resources.The following describes the three mode setups (see SLOW Mode in VOX):
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HT98R068-1 Two-way Radio OTP MCU
IDLE Mode
When the audio processor is not processing data, entering this mode can save power,
however the quantity depends on the actual practical situation. The device provides many
ways to enter the idle mode (see to the datasheet). Here we use the simplest method.
The I/O CMD-51h can control the audio processor operation-stop/operate: FAh/F8h. Note
that it must be separated into two parts of commands. Stop the audio processor by using
an F8h FAh DAh sequence while operating by using DAh FAh F8h. Disable
the audio processor clock when no event is happening, then use the MCU to detect the
external signals, and enable the audio processor after the signal is identified as shown
below.
 IDLE Mode Setup Flow
Flow description:
When there is no output or input signal are waiting to be processed, the audio
processor can be disabled. After it’s enabled, operating can be restarted without
needing re-initialise.
<81E3F>: Enable the audio circuit power supply or select to enable the needed circuit
only.
<851FA>: Enable the audio processor pulse frequency first stage switch.
<851F8>: Enable the audio processor pulse frequency second stage switch.
//
<81EC1>: Disable the audio circuit power supply to lower or turn down unnecessary
power consumption.
<81B93>: Set the input/output line input/output path as common-mode bias voltage to
reduce misunderstanding and reset the receive status.
<851FA>: Disable the audio processor pulse frequency first stage switch.
<851DA>: Disable the audio processor pulse frequency second stage switch.
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HT98R068-1 Two-way Radio OTP MCU
TX Mode
Entering the TX mode depens on the input data trigger, such as pressing PTT, audio
signal (VOX)…etc.The mode switches, input source selection, circuit disabling etc will be
generally executed in this mode. As for the audio buffer input source, it is recommended
to switch to bias voltage to reduce noise, or disable the buffer (I/O CMD-1Eh [3]), or even
choose both. During TX/RX switching, it is recommended to execute circuit ON/OFF 
path select mode switch so as to decrease the generation of error signals. The
following illustrates the PTT processing:
Ex: Setup the TX mode, Input = MIC, Output = MOD, No Sub-tone.
 Tx Mode Setup Flow
Flow description:
<81E97>: Enable the DDAC1, AMP1, MIC and PGA circuits. Setup the circuit switch
first. DAC1, AMP1 on-enable the MOD output. MIC on-enable the microphone circuit,
PGA on- enable the PGA input source.
<81B10>: Select the input PGA and audio input source paths. Select the PGA input
source to be MIC and the audio output to be DAC common-mode bias voltage to
reduce noise.
<81140>: Enter the TX mode. Select the TX mode as the final step to enter the TX
processing flow.
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HT98R068-1 Two-way Radio OTP MCU
RX Mode
This mode is mainly applied for in-band signal demodulation. Although it is acceptable to
wait for the RF signal in this mode, it is recommended that the MCU should verify the
RSSI (Receive signal strength indicator) signal before switching the input source to the
DEMOD path and then enable the audio processor for management. In this way, power
can be saved and in the meantime avoid erroneous signal judgments. The modes
switching, paths selection, circuit ON/OFF and the SPI command settings are as follows:
Ex: RX mode, Input = DEMOD, Output = AUDO (source = DAC1), No Sub-tone.
 RX Mode Setup Flow
Flow description:
<RSSI OK>: Confirm if the RF signal is OK.
<81E8B>: Enable the DAC1, buffer and PGA circuits. Setup the circuit switches first.
DAC1 on-enable DAC1 output, AUDO output buffer on- enable the audio output circuit,
PGA on- enable the PGA input source.
<81B25>: Select the PGA and audio input source paths. Select the PGA input source
to be DEMOD, the audio output to be DAC1 and then switch the DAC1 pin source path
to the internal common-mode bias voltage in order to prevent the audio leaking from
MOD.
<81160>: Enter the RX mode. Select the RX mode as the final step to enter the RX
processing flow.
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HT98R068-1 Two-way Radio OTP MCU
Audio Processor IRQ
When an audio process event occurs, the audio processor will use this signal as an
interrupt request, during which time the master should send a SPI signal to read the
20-bit data, transmitting 100h as the first 12 bits data with the last data corresponding to
the I/O CMD-23h, the last byte data bit will generate an interrupt if there is a status
changing event (0 1 or 1 0). Hence, read the I/O CMD-23h command again to
acknowledge the event is OK or end. The I/O CMD-22h is the interrupt mask selection,
and is used as an interrupt request. The main interrupt source must be enabled (I/O
CMD-22h [6] =1). This application does not need to use a polling method. Managing after
the interrupt generation makes the MCU more efficient. The format description is as
follows:
Event Interrupt Mask - 22h Address
Bit 7 6 5 4 3 2 1 0
Name — IRQ
DTMF
INT
Selective
call INT
CTCSS
INT
DCS
INT
Off_Tone
INT
VOX
INT
Audio Processor IRQ Event Masking Control Register
Event VOX DCS CTCSS SelCal_Tone DTMF Off_Tone
IRQ SPI Data 10001h 10004h 10008h 10010h 10020h 10002h
Polling I/O
Command 23h 01h 04h 08h 10h 20h 02h
Polling I/O
Command 30h — — 01h — — —
IRQ & Polling Comparision Table (when generating an active signal)
Ex: Detect the CTCSS tone.
 CTCSS Interrupt Flow
Step 1: Enable CTCSS INT.
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HT98R068-1 Two-way Radio OTP MCU
Step 2: Rx AUP ISR.
Step 3: Rx 23h detection flow.
Flow description (1):
<82248>: Set the interrupt enabled selection. Select the CTCSS interrupt, enable the
interrupt source.
Flow description (2):
<Is received 10008>: Confirm this interrupt signal is CTCSS event.
<92300>: Poll event status.
Flow description (3):
<Is received 92308>: Confirm this interrupt signal is approved by CTCSS (92308) or
don’t decode CTCSS (92300) correctly.
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HT98R068-1 Two-way Radio OTP MCU
Audio Processor Status Reset
When decoding normally, the audio processor processes depending on the signal data
code, frequency and amplitude. Its status (I/O CMD-23h, 30h) will change if the
communication flow meets with that RF ok signal ok signal fail RF fail. When the
audio status changes by a sequence 0 1 0, it can decode again in the next
communication setup. However, sometimes due to using of various combinations, there
is no way to get the audio processor decoding again and it remains the false status.
Hence, we need a mechanism to make it back to the decoding stage to decode again.
There are two ways:
 Reset using command (I/O CMD: 10000), but note that this command will make the
original data wrote to the CLI automatically overwritten.
 Reset basing on signal. Set the PGA source to be VAG and increase the de-response
delay time to make the audio processor return to none decoding automatically, the
status register will be changed to 0, then switched to the Rx mode to detect the signal
again. But the disadvantage is that it must consum time to delay.
The other situation is sub-audio tail-tone detection status, CTCSS anti-tone (I/O
CMD-30h [0] =1) or DCS off-tone (I/O CMD-23h [1] =1). When decoding a CTCSS
off-tone, the I/O CMD-30h[0]=1, this status will be remained(because it is belong to
respective decode), so we must load I/O CMD: 12000 and make it reset sub-audio
tail-tone decoding detection, set I/O CMD-30h[0]=0 or I/O CMD-23h[1]=0. Hence, take it
to consider that at the moment decoding the tail-tone it excutes the command
immediately when designing.
Internal Audio Function
In the open public radio system (such as aviation communication), when someone wants
to select to call some users or resist to receive irrelevant information, the selective call
function is always applicated in specifying the person to communicate with. When calling
someone, the tranimitter will firstly transmit the specification information of 2 or 5 tones
audio (selective call), then send the sound signal. Each receiver of the same frequency
will receive this radio signal then decodes the data of 2 or 5 tones at the same time and
compare them. If the decoded selective call code is the same with the receiver’s, the
process end will open the speaker to make it heared to complete the communication
information transmission of the ends. Besides, the signals such as DTMF are applied in
keys triggle, can be used in transmitting the data input by the user to the other end to
decode or application of the same selective call use. This product provides two audio
selection, selective call and DTMF, which include transmit encoder and receive decoder
as the following shows.
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HT98R068-1 Two-way Radio OTP MCU
19
Selective Call Setting
It’s a sine wave frequency anolog signal, has 16 groups of signals. It meets with the
standard international specification (EIA, EEA, CCIR, ZVEI 1, ZVEI 2…etc), also, the
user can define the frequency channel to applicate flexibly. It can be achieved from
300Hz to 3000Hz. Set this function by using I/O CMD-11h [4-2] = b’010. Select the TX
encode channel by using I/O CMD-2Ah [3-0]. Each channel data is separately stored in
the two proximate CLI CMD registers. For example, the channel 0 data is located in CLI
CMD-04E0 and 04E1. It can generate required frequency by application program. In the
Rx mode, the process unit will detect the incoming signal frequency and compare the
datas in the channel list (CLI CMD-04E0~04FF). If the comparision is successful, locate
the decoding frequency channel number in I/O CMD-2Eh [3-0] and set the status bit I/O
CMD-23h [4]. In addition, note that the threshold setting when decoding, the generally
accepted threshold is CLI CMD-0324 and the published threshold is CLI CMD-0325.
They respectively control the decoding low value and the non-decoding high value which
are described as the following.
Ex: TX mode, Output = MOD, Selective call tone = 00h.
 Set the Selective Call TX Mode Flow
Flow description:
<82A00>: Select selective call channel. Select zeroth group frenquency channel (default
EEA: 1981Hz).
<81E91>: Enable DAC1 and AMP1 circuit. DAC1, AMP1 on- enable MOD output.
<81B92>: Select input PGA and audio input source paths. Select PGA input source as
VAG, the audio output as DAC common-mode bias voltage to reduce noise. The DAO1
input source is DAC1.
<81148>: Enter the TX mode. Select the TX mode and turn on the in-band audio =
selective call function.

HT98R068-1 Two-way Radio OTP MCU
Ex: RX mode, Input = DEMOD, Output =null, Non sub-tone.
 Set Selective Call RX Mode Flow
Flow description:
<RSSI OK>: Acknowledge the RF signal is OK.
<81EC3>: Enable the PGA circuit, PGA on – enable the input source PGA.
<81B33>: Select input PGA and audio input source paths. Select the PGA input source
as DEMOD, the audio output as DAC common-mode bias voltage to reduce noise. DAO1
and DAO2 are DAC common-mode bias voltage.
<81168>: Enter Rx mode. Select RX mode and enable in-band audio = selective call
function.
<Is Selective event>: Acknowledge that the signal a steady frenquency in the selective
call frequency channel list.
<92E00>: Read the selective call detection data. Read the frenquency channel of this
selective call detection data.
<Save SelCal finder>: Store the number after detection. Store this number data
temporarily. After finishing the complete byte data receiving, use it to the application.
<IDLE Mode>: Enter the IDLE mode. Before the RSSI signal is ok, enter the waiting
mode firstly.
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