2.1 Changhong PDP TV PT4206 main IC functions：
NO. NAME TYPE Function
1 N901 TDQ-6F7-FM2W Unify tuner
2 N601 MSP3410G-C12-100
Sound disposal
3 U705 TA2024 sound amplifier
4 U701 uPD64083GF-3BA NTSC 3D comb filter
5 N902 TEA6425D AV video switch
6 U1 VPC3230D-QA-B3 Digital video disposal
7 U6 MST9885 A/D converter
8 U11 SiI161BCT100 DVI signal disposal
9 U16 PW113-20Q Format transform and MCU
10 U17 AM29LV800BT-90 FLASH ROM
11 U22 DS90C383AMTD Difference transmit
12 U20 ST232CD RS-232 signal disposal
13 U7 24LC21A/SN E²PROM（display parameter information）
14 U9/U13 SN74LVC126AD Suffer amplifier
15 U71 74LV32D Sync. face lifting enlarge
16 U8 24LC21A/SN E²PROM（DVI parameter information）
17 U19 24LC32A/SN E²PROM（user control information）
18 U4 IS42S16400(A)-7T SDRAM
19 U5 PI5V330(Q) RGB/YpbPr switch
20 U3 PW1235 IP transform and picture improve
2.2、Changhong PDP TV PT4206 main IC functions introduction：
2.2.1 A/D converter MST9885 General：
The MST9885 is a fully integrated analog interface for digitizing high-resolution RGB
graphics signals from PCs and workstations. With a sampling rate capability of up to 140 MHz,
it can accurately support display resolutions up to 1280x1024 (SXGA) at 75 Hz. The clamped
input circuits provide sufficient bandwidth to accurately digitize each pixel.
The MST9885B provides a high performance highly integrated solution to support the
digitization process, including the ADCs, a voltage reference, a PLL to generate the pixel
sampling clock from HSYNC, clamping
circuits, and programmable offset and gain circuits to provide brightness and contrast controls.
When the COAST signal is asserted, the PLL will maintain its output frequency when HSYNC
pulses are absent, such as during the VSYNC period in some systems.
A 32-step programmable phase adjustment control (0-360 deg) is provided for the pixel
sampling clock to adjust for the difference between the HSYNC edge and RGB pixel edge
timing.
The MST9885B can send output data through one 24-bit port at the pixel clock rate.
The MST9885B can also support R, G, B to Y, U, V conversion.
The MST9885B has internal programmable pattern generator for testing.
The MST9885B can accept either standard TTL, CMOS levels or sawtooth vertical deflection
signals for VSYNC input.
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