Inrevium TB-FMCH-HDMI4K Instructions for use

TB-FMCH-HDMI4K Hardware User Manual
1
Rev.2.04
TB-FMCH-HDMI4K
Hardware User Manual
Rev.2.04

TB-FMCH-HDMI4K Hardware User Manual
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Rev.2.04
Revision History
Version
Date
Description
Publisher
1.00 2014/12/29 Initial release JC
2.00 2015/06/30 Updated. Released. ST
2.01 2015/08/10 -Updated support web link on page 8
-removed table link on page 28
-Updated Xilinx support link on page 29
-Add high light jumper setting on page 33
-Add note on page 18 and 20
MY
2.02 2016/01/13 Delete Table2-1 MY
2.03 2016/02/20 Update J39 and J40 connection MY
2.04
2019/05/15
Updated support references in Section 15
ST

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Table of Contents
1. Related Documents and Accessories.......................................................................................... 8
2. Overview ...................................................................................................................................... 8
3. Features..................................................................................................................................... 10
4. Block Diagram ........................................................................................................................... 11
5. External View of the Board........................................................................................................ 12
6. Board Specification.................................................................................................................... 13
7. Supplying Power to the Board................................................................................................... 14
7.1. HDMI Five Volts Power............................................................................................................ 14
8. Connectors ................................................................................................................................ 15
8.1. HPC FMC Connector to Main Board ....................................................................................... 15
8.2. HPC FMC Connector for the Extender TB-FMCH-HDMI4K Card ........................................... 19
8.3. HDMI Connectors .................................................................................................................... 21
9. I2C Busses ................................................................................................................................ 22
9.1. FMC I2C EEPROM.................................................................................................................. 22
9.2. I2C Control Bus ....................................................................................................................... 23
9.3. Future EEPROM I2C Bus ........................................................................................................ 23
9.4. HDMI DDC ............................................................................................................................... 24
10. Clocks ........................................................................................................................................ 24
10.1. Si5324 Any-Frequency Clock Generator ............................................................................. 24
10.2. HDMI Source Clock ............................................................................................................. 25
10.3. HDMI Sink Clock.................................................................................................................. 26
11. Hot Plug Detect (HPD) .............................................................................................................. 26
12. Consumer Electronics Control (CEC) ....................................................................................... 27
13. ESD Protection .......................................................................................................................... 27
14. Test Points ................................................................................................................................. 28
15. Demonstration ........................................................................................................................... 29
16. Appendix A: FMC I2C EEPROM Contents................................................................................ 30
17. Appendix B: Headers, Factory Default, and Orientation........................................................... 33

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List of Figures
Figure 3-1 FMC HPC Connector Pin Layout as per VITA 57.1 ........................................................ 10
Figure 4-1 TB-FMCH-HDMI4K Block Diagram .................................................................................11
Figure 5-1 External View of TB-FMCH-HDMI4K (Component Side)................................................ 12
Figure 5-2 External View of TB-FMCH-HDMI4K (Solder Side)........................................................ 12
Figure 6-1 TB-FMCH-HDMI4K Board Dimensions (mm) ................................................................. 13
Figure 7-1 TB-FMCH-HDMI4K Power Supply Structure .................................................................. 14
Figure 7-2 HDMI Source and Sink 5 Volt Supplies .......................................................................... 15
Figure 9-1 HDMI Source and Sink DDC .......................................................................................... 24
Figure 10-1 Si5324A Clock Generator ............................................................................................. 25
Figure 10-2 HDMI Source Clocks..................................................................................................... 26
Figure 11-1 HDMI HPD and CEC Connections................................................................................ 27
Figure 14-1 Test Point Locations on Component Side..................................................................... 28
Figure 17-1 Default Jumper Positions and Header Orientation ....................................................... 33
List of Tables
Table 1-1 Accessories ........................................................................................................................ 8
Table 8-1 HPC FMC Main Board Connector Pin Assignment .......................................................... 16
Table 8-2 HPC FMC Extender Board Connector Pin Assignment ................................................... 19
Table 8-3 HDMI Source Connector (J1) ........................................................................................... 21
Table 8-4 HDMI Sink Connector (J2) ............................................................................................... 22
Table 9-1 I2C Control Bus ................................................................................................................ 23
Table 14-1 Test Points ...................................................................................................................... 29
Table 16-1 FMC I2C EEPROM Contents ......................................................................................... 30

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Introduction
Thank you for purchasing the TB-FMCH-HDMI4K board.Before using the product, be sure to carefully
read this user manual and fully understand how to correctly use the product. First read through this
manual, and then always keep it handy.
SAFETY PRECAUTIONS Be sure to observe these precautions!
Observe the precautions listed below to prevent injuries to you or other personnel or damage to property.
•Before using the product, read these safety precautions carefully to assure correct use.
•These precautions contain serious safety instructions that must be observed.
•After reading through this manual, be sure to always keep it handy.
The following conventions are used to indicate the possibility of injury/damage and classify precautions if
the product is handled incorrectly.
Indicates the high possibility of serious injury or death if the product is handled
incorrectly.
Indicates the possibility of serious injury or death if the product is handled
incorrectly.
Indicates the possibility of injury or physical damage in connection with houses or
household goods if the product is handled incorrectly.
The following graphical symbols are used to indicate and classify precautions in this manual.
(Examples)
Turn off the power switch.
Do not disassemble the product.
Do not attempt this.
Danger
Warning
Caution

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In the event of a failure, disconnect the power supply.
If the product is used as is, a fire or electric shock may occur. Disconnect the power supply
immediately and contact our sales personnel for repair.
If an unpleasant smell or smoking occurs, disconnect the power supply.
If the product is used as is, a fire or electric shock may occur. Disconnect the power supply
immediately. After verifying that there is no smoking, contact our sales personnel for repair.
Do not disassemble, repair or modify the product.
Otherwise, a fire or electric shock may occur due to a short circuit or heat generation. For
inspection, modification or repair, contact our sales personnel.
Do not touch a cooling fan.
As a cooling fan rotates at high speed, do not put your hand close to it. Otherwise, it may
cause injury to persons. Never touch a rotating cooling fan.
Do not place the product on unstable locations.
Otherwise, it may drop or fall, resulting in injury to persons or failure.
If the product is dropped or damaged, do not use it as is.
Otherwise, a fire or electric shock may occur.
Do not touch the product with a metallic object.
Otherwise, a fire or electric shock may occur.
Do not place the product in dusty or humid locations or where water may
splash.
Otherwise, a fire or electric shock may occur.
Do not get the product wet or touch it with a wet hand.
Otherwise, the product may break down or it may cause a fire, smoking or electric shock.
Do not touch a connector on the product (gold-plated portion).
Otherwise, the surface of a connector may be contaminated with sweat or skin oil, resulting
in contact failure of a connector or it may cause a malfunction, fire or electric shock due to
static electricity.
Warning

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Do not use or place the product in the following locations.
•Humid and dusty locations
•Airless locations such as closet or bookshelf
•Locations which receive oily smoke or steam
•Locations exposed to direct sunlight
•Locations close to heating equipment
•Closed inside of a car where the temperature becomes high
•Static-prone locations
•Locations close to water or chemicals
Otherwise, a fire, electric shock, accident or deformation may occur due to a short circuit or heat
generation.
Do not place heavy things on the product.
Otherwise, the product may be damaged.
■Disclaimer
This product is a HDMI interface for Xilinx FPGA evaluation boards. Tok yo Electron Device Limited
assumes no responsibility for any damages resulting from the use of this product for purposes other than
those stated.
Even if the product is used properly, Tok yo Electron Device Limited assumes no responsibility for any
damages caused by:
(1) Earthquake, thunder, natural disaster or fire resulting from the use beyond our responsibility, acts by
a third party or other accidents, the customer’s willful or accidental misuse, or use under other
abnormal conditions.
(2) Secondary impact arising from use of this product or its unusable state (business interruption or
others)
(3) Use of this product against the instructions given in this manual.
(4) Malfunctions due to connection to other devices.
Tokyo Electron Device Limited assumes no responsibility or liability for:
(1) Erasure or corruption of data arising from use of this product.
(2) Any consequences or other abnormalities arising from use of this product, or
(3) Damage of this product not due to our responsibility or failure due to modification.
This product has been developed by assuming its use for research, testing or evaluation. It is not
authorized for use in any system or application that requires high reliability.
Repair of this product is carried out by replacing it on a chargeable basis, not repairing the faulty devices.
However, non-chargeable replacement is offered for initial failure if such notification is received within
two weeks after delivery of the product.
The specification of this product is subject to change without prior notice.
The product is subject to discontinuation without prior notice.
Caution

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1. Related Documents and Accessories
All documents relating to this board can be downloaded from the TED Support Web at address
https://www.teldevice.co.jp/spweb/c0208s
Table 1-1 Accessories
Description Manufacturer Quantity
Spacer, 10mm, M2.6 Hirosugi 2
Spacer, 10mm w/ screw, M2.6 Hirosugi 4
Spacer, 25mm, M2.6
Hirosugi
2
Screw, 6mm, M2.6 w/ washers Hirosugi 6
2. Overview
The TB-FMCH-HDMI4K is functionally divided into a source circuit and a sink circuit. Each side is
designed to be compatible with the HDMI 2.0 specification, with an individual TMDS channel
throughput of up to 6 Gbps thus enabling support of 4K resolution at 60fps. The source circuit is
based on the Texas Instruments SN65DP159 D++ to TMDS Retimer.
The TB-FMCH-HDMI4K has demonstrated operation up to 4096x2160p 60Hz.
For the latest support resolution, please refer to the following Xilinx HDMI IP web page.
http://www.xilinx.com/products/intellectual-property/hdmi.html
The TB-FMCH-HDMI4K utilizes HDMI Type-A receptacles and Samtec’s FMC HPC connector for
connection to a platform board having a High-Pin Count (HPC) connector.
Physically, this FMC is a single width air-cooled card that is compatible with the ANSI/VITA 57.1
FPGA Mezzanine Card (FMC) Standard.
The Display Data Channel (DDC) and Consumer Electronics Control (CEC) are supported. An I2C
controlled clock multiplier/generator is included to produce a reference frequency of up to 346MHz.
A second FMC HPC connector allows a second TB-FMCH-HDMI4K to be stacked to expand to two
source and two sink circuits.
Note: Only stack FMCs that are identical (i.e. same part number and same revision). Do not attempt to
stack different FMCs. Stacking FMCs of different types or revisions could cause damage.
Note: Due to I/O constraints on the FMC connector there are restrictions on the capabilities of the
stacked FMC:
a. The HDMI sink clock on the second extender FMC is not connected to the J3 FMC
main board connector. This practically limits the sink operation of the stacked FMC to
the same sink clock frequency as the primary FMC and generally the same traceable
source to avoid clock slipping.
b. Due to I/O limitations on the J3 Main Board FMC connector, the stacked FMC’s
Si5324A clock generator only provides EX_CLK_LVDS_P/N to the J8 connector. This

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may or may not limit functionality (IP core dependent).
Note: The TB-FMCH-HDMI4k does not support the HDMI Ethernet and Audio Return Channel
(HEAC) on either HDMI interface.
Note: VIO_B_M2C is directly connected to 3P3V. User is responsible for making sure that the carrier
card can accept a VIO_B_M2C of 3.3V nominal.

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3. Features
HDMI Source Device Texas Instruments SN65DP159RSB
FMC Main Connector Samtec ASP-134488-01
FMC Extender Connector Samtec ASP-134486-01
HDMI Connectors Samtec HDMR-19-01-S-SM
FPGA GPIO Signal Level 1.2V through 3.3V using voltage level translators or AC coupling
Clock Multiplier/Generator Silicon Labs Si5324C-C-GM
Figure 3-1 FMC HPC Connector Pin Layout as per VITA 57.1

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4. Block Diagram
Figure 4-1 shows the TB-FMCH-HDMI4K block diagram.
The FMC-HPC main connector is mounted on the component side of the board.
The FMC-HPC extender connector is mounted coincident with the main connector on the opposite side
of the board. Voltage level translators are not shown in the block diagram.
HDMI
Source
Note: All single-ended GPIO signals connected to the FMC are voltage level shifted to VADJ.
3.3V/100mA
1.10V/150mA
Tx_TMDS_DAT0_p/n
Tx_TMDS_DAT1_p/n
Tx_TMDS_DAT2_p/n
Tx_TMDS_CLK_p/n
Tx_I2C
Tx_HPD
Mux
(TS3USB221)
250ps delay
3.3V/1mA
Tx_Clk_LVDS_p/n
Tx_Ch3_MGT_p/n
Tx_Clk_p/n
Tx_Ch0_MGT_p/n
Tx_Ch1_MGT_p/n
Tx_Ch2_MGT_p/n
Tx_HPD
Tx_I2C_HDMI
CTL_I2C
Tx_Clk_Sel
MGT_RefClk_p/n
CLK_LVDS_p/n
3.3V/279mA
Tx_HDMI_En
Rx_TMDS_DAT0_p/n
Rx_TMDS_DAT1_p/n
Rx_TMDS_DAT2_p/n
Rx_TMDS_CLK_p/n
Rx_I2C
HPD_OUT
HDMI
Sink
All high-speed differential signals are AC coupled.
I2C Extender
(PCA9507)
A
B
Rx_HPD
5V/3mA
Rx_I2C_En
Sink’s EDID
EEPROM
(M24C64)
3.3V/5mA
Rx_I2C_HDMI
Rx_CLK_p/n
(HDMR-19-01-S-SM)
Rx_CEC
Tx_CEC
Tx_CEC
EEPROM
(M24C02)
3.3V/5mA
I2C Repeater
(PCA9509)
5V/3mA
I2C Translator
(PCA9517)
B: 3.3V/3mA
A: Vadj/3mA
B: 5V/1mA
A: Vadj/3mA
I2C
Future
EEPROM
(M24C64)
3.3V/5mA
EE_I2C
Ex_Tx_Ch0_MGT_p/n
Ex_Tx_Ch1_MGT_p/n
Ex_Tx_Ch2_MGT_p/n
Ex_Tx_Clk_LVDS_p/n
Ex_Tx_Ch3_MGT_p/n
Ex_Tx_Clk_Sel
Ex_Tx_I2C_HDMI
Ex_Tx_HPD_HDMI
Ex_Tx_HDMI_En
Ex_CTL_I2C
Ex_Tx_CEC
Ex_LVDS_Clk_p/n
Ex_EE_I2C
Ex_I2C
Ex_Rx_TMDS_DAT0_p/n
Ex_Rx_TMDS_DAT1_p/n
Ex_Rx_TMDS_DAT2_p/n
Ex_Rx_CEC
Ex_Rx_I2C_HDMI
Ex_Rx_I2C_En
Ex_Rx_HPD_FPGA
CLKIN_VALID, PLL_LOL
CLK_RST
CLKIN_LVDS_p/n
Source_DET
Ex_Source_DET
Ex_CLKIN_LVDS_p/n
Ex_CLKIN_VALID, Ex_PLL_LOL
Ex_CLK_RST BYPASS_CEC
Rx_CEC_FPGA
J4, J5
J6, J7
1
1
SN65DP159
TMDS Retimer
ESD
(
TPD1E05U06DPY
)
50Ω
(Termination)
Ref Clock
Clock Buffer
(DS90LV001)
3.3V/250mA
ESD
(
TPD1E05U06DPY
)
HPD_IN
J11
1
BYPASS_HPD
1
J13
HPD Control
BYPASS_HPD
(HDMR-19-01-S-SM)
J10
1
1
J12
CEC_SINK
TPD5S116
HDMI ESD
PROTECTION
TPD5S116
HDMI ESD
PROTECTION
FMC – HPC (Extender Card)
Samtec – ASP134486-01
VADJ: 1.2V to 3.3V
FMC – HPC (Mezzanine Board)
Samtec – ASP134488-01
VADJ: 1.2V to 3.3V
J1
J2
CEC_SOURCE
Si5324C
Figure 4-1 TB-FMCH-HDMI4K Block Diagram

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5. External View of the Board
HDMI Sink
Connector
HDMI
Source
Connector
HPC FMC Connector for Main Board
J11
J10
J4
J5
J12
J13
J9
J7
J6
SN65DP159
J1
J2
J3
Si5324
Figure 5-1 External View of TB-FMCH-HDMI4K (Component Side)
HPC FMC Connector for Second HDMI4K
J8
3.3V LED
Figure 5-2 External View of TB-FMCH-HDMI4K (Solder Side)

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6. Board Specification
The following shows the TB-FMCH-HDMI4K board physical specifications.
External Dimensions 76.50 mm long x 69.00 mm wide
Number of Layers 10 layers
Board Thickness 1.6 mm
Material Megtron 4
FMC Main Connector Samtec ASP-134488-01
FMC Extender Connector Samtec ASP-134486-01
HDMI Connectors Samtec HDMR-19-01-S-SM
Figure 6-1 TB-FMCH-HDMI4K Board Dimensions (mm)
69.00
3.00
3.00
10.90
38.50
3.30
76.50
11.00
2.20
16.04 40.55
61.00
C
L
C
L

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7. Supplying Power to the Board
Figure 7-1 shows the TB-FMCH-HDMI4K power supply structure. There is one LDO regulator to
generate 1.1 volts for the SN65DP159 and one switching regulator for 5.0 volts. Both use 3.3 volts from
the carrier card to generate the lower voltages. The carrier card 12 volts rail is not used. VADJ can be
from 1.2V to 3.3V and is used mainly for voltage translators and I2C repeaters. There is no onboard
power sequencing.
A green LED, located on the solder side, indicates the presence of the VCC_3V3 rail. Since this rail is
the main power source for the card it is protected with a 1.5 amp PTC resettable fuse (600mA is the
maximum expected current draw). If this fuse trips due to an overcurrent fault remove power to the card
and wait a few minutes for the PTC to cool. Remove the condition causing the excess current and apply
power. If the PTC trips again, remove power, wait for the fuse to cool, remove the card from the carrier,
and contact inrevium technical support.
Figure 7-1 TB-FMCH-HDMI4K Power Supply Structure
7.1. HDMI Five Volts Power
The HDMI source connector power is supplied from the TPS60151 boost switching regulator through a
Texas Instruments TPD5S116 HDMI companion device. This device provides transient and current
protection at the connector. The HDMI sink connector input five volts also goes to a TPD5S116 for
protection via a three-pin header (J9). J9 is used to internally supply five volts to the sink circuits if five
volts is not available at the sink connector, such as when the HDMI cable is disconnected. Figure 7-2
VCC_3V3 VCC_1V1
VCC_5V0
TPS74701
TPS60151
150mA max. to SN65DP159
140mA max.
HPC FMC Connector to Carrier Card
3V3_AUX
VADJ
1.2V to 3.3V for voltage
translators
For EEPROM and I2C
repeater
600mA max.
PTC Fuse
J3
U11
U33
1, 2
2
9, 10
3
D32
E39, F40,
G39, H40
C39, D36,
D38, D40

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shows the HDMI source and sink five volts connections.
Figure 7-2 HDMI Source and Sink 5 Volts Supplies
8. Connectors
There are four connectors on the FMC. One HPC FMC connector provides connectivity to the Main
Board (J3) and another HPC FMC connector (J8) is for a second (stacked) TB-FMCH-HDMI4K, enabling
additional HDMI source and sink ports. The other two connectors are the HDMI source and sink
connectors, located on the front edge of the card.
Note: Only stack FMCs that are identical (i.e. same part number and same revision). Do not attempt to
stack different FMCs. Stacking FMCs of different types or revisions could cause damage.
8.1. HPC FMC Connector to Main Board
The HPC FMC connector used to mate to the Main Board (carrier) is Samtec ASP-134488-01.
Table 8-1 shows the FMC connector pin assignment. In this table the C2M direction means
carrier-to-mezzanine, which is thus, an input to the FMC. The M2C direction means mezzanine-to-carrier,
which is thus, an output from the FMC. ‘BI-DIR’ means bi-directional, so the signal direction could be
either an input or an output. Pins not included in the table are unconnected, including all HA[0:23] and
HB[0:21] signals.
J9
J1
18 DDC_5V
J2
HDMI Source
HDMI Sink
1
2
3
D3
5V_CON5V_SYS
D1
TPD5S116
U49
no connection
VCC_5V0
TPS60151
Switching
Regulator
VCC_3V3 TP15
18 DDC_5V
TP10
D3
5V_CON5V_SYS
TPD5S116
U50
D1
VCC_5V0
For normal operation place shunt on J9 1-2.
If 5 volts is not available on J2-18 then place
shunt on J9 2-3.

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Table 8-1 HPC FMC Main Board Connector Pin Assignment
J3
Pin
Schematic Signal Name VITA 57.1 Name Direction Type Description
HDMI Source Signals
C2 TX_CH0_MGT_P DP0_C2M_P C2M CML SN65DP159
channel 0 input
C3 TX_CH0_MGT_N DP0_C2M_N
A22 TX_CH1_MGT_P DP1_C2M_P C2M CML SN65DP159
channel 1 input
A23 TX_CH1_MGT_N DP1_C2M_N
A26 TX_CH2_MGT_P DP2_C2M_P C2M CML SN65DP159
channel 2 input
A27 TX_CH2_MGT_N DP2_C2M_N
A30 CLK_TX_CH3_MGT_P DP3_C2M_P C2M CML SN65DP159 1 of
2 clock mux input
A31 CLK_TX_CH3_MGT_N DP3_C2M_N
C26 CLK_TX_LVDS_P LA27_P C2M LVDS SN65DP159 2 of
2 clock mux input
C27 CLK_TX_LVDS_N LA27_N
C22 TX_CLK_SEL_FPGA LA18_CC_P C2M LVTTL (VADJ) SN65DP159 input
clock mux select
C10 CLK_I2C_CTL_FPGA_SCL LA06_P C2M LVTTL OD (VADJ) I2C for Si5324,
EDID EEPROM,
and SN65DP159
C11 I2C_CTL_FPGA_SDA_OD LA06_N BI-DIR LVTTL OD (VADJ)
G33 TX_CEC LA31_P BI-DIR LVTTL (VADJ) Source CEC
G34 TX_HPD_HDMI LA31_N M2C LVTTL (VADJ) Source HPD
D26 TX_HDMI_EN_FPGA LA26_P C2M LVTTL (VADJ) SN65DP159 OE
G30 CLK_I2C_TX_FPGA_SCL LA29_P C2M LVTTL OD (VADJ) Source DDC I2C
G31 I2C_TX_FPGA_SDA_OD LA29_N BI-DIR LVTTL OD (VADJ)
HDMI Sink Signals
C6 RX_TMDS_DAT0_P DP0_M2C_P M2C TMDS Sink Channel 0
C7 RX_TMDS_DAT0_N DP0_M2C_N
A2 RX_TMDS_DAT1_P DP1_M2C_P M2C TMDS Sink Channel 1
A3 RX_TMDS_DAT1_N DP1_M2C_N
A6 RX_TMDS_DAT2_P DP2_M2C_P M2C TMDS Sink Channel 2
A7 RX_TMDS_DAT2_N DP2_M2C_N
D4 CLK_HDMI_RX_P GBTCLK0_M2C_P M2C LVDS Sink Clock
D5 CLK_HDMI_RX_N GBTCLK0_M2C_N
G18 CLK_I2C_RX_FPGA_SCL LA16_P M2C LVTTL OD (VADJ) Sink DDC I2C
G19 I2C_RX_FPGA_SDA_OD LA16_N BI-DIR LVTTL OD (VADJ)
G24 RX_I2C_EN_N_FPGA LA22_P C2M LVTTL (VADJ) Sink DDC enable
G21 RX_CEC LA20_P BI-DIR LVTTL (VADJ) Sink CEC
G22 RX_HPD_N LA20_N C2M LVTTL (VADJ) Sink HPD
G9 SOURCE_DET_N LA03_P M2C LVTTL (VADJ) Sink detect
Si5324 Clocks
B20 CLK_MGT_REFCLK_P GBTCLK1_M2C_P M2C LVDS Si5324 CKOUT1
B21 CLK_MGT_REFCLK_N GBTCLK1_M2C_N
H4 CLK_LVDS_P CLK0_M2C_P M2C LVDS Si5324 CKOUT2

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J3
Pin Schematic Signal Name VITA 57.1 Name Direction Type Description
H5 CLK_LVDS_N CLK0_M2C_N M2C LVDS Si5324 CKOUT2
G6 CLKIN_LVDS_P LA00_CC_P C2M LVDS Si5324 CKIN1
G7 CLKIN_LVDS_N LA00_CC_N
C14 REF_CLK_RST_FPGA_N LA10_P C2M LVTTL (VADJ) Si5324 reset
H7 CLKIN_VALID LA02_P M2C LVTTL (VADJ) Si5324 INT_C1B
H8 PLL_LOL LA02_N M2C LVTTL (VADJ) Si5324 LOL
Miscellaneous Signals
C30 CLK_SCL SCL C2M LVTTL OD FMC ID EEPROM
I2C
C31 SDA_OD SDA BI-DIR LVTTL OD
G27 CLK_I2C_EE_FPGA_SCL LA25_P C2M LVTTL OD (VADJ) I2C interface for
64kbit EEPROM
G28 I2C_EE_FPGA_SDA_OD LA25_N BI-DIR LVTTL OD (VADJ)
H1 Not connected VREF_A_M2C M2C
K1 Not connected VREF_B_M2C M2C
D1 Not connected PG_C2M C2M Not used
F1 10k to VCC_3V3 PG_M2C M2C
No voltage
conditions
monitored
H2 0 ohm to GND PRSNT_M2C_N M2C GND Indicates card
present
D29 Not connected TCK C2M
D30 0 ohm to TDO TDI C2M JTAG bypassed
D31 0 ohm to TDI TDO M2C JTAG bypassed
D33 Not connected TMS C2M
D34 Not connected TRST_N C2M
C34 GA0 GA0 C2M LVTTL ID EEPROM E1
D35 GA1 GA1 C2M LVTTL ID EEPROM E0
J39 Not connected VIO_B_M2C M2C Not used
K40 Not connected VIO_B_M2C M2C Not used
Extender HDMI Source Signals
A34 EX_TX_CH0_MGT_P DP4_C2M_P C2M CML SN65DP159
channel 0 input
A35 EX_TX_CH0_MGT_N DP4_C2M_N
A38 EX_TX_CH1_MGT_P DP5_C2M_P C2M CML SN65DP159
channel 1 input
A39 EX_TX_CH1_MGT_N DP5_C2M_N
B36 EX_TX_CH2_MGT_P DP6_C2M_P C2M CML SN65DP159
channel 2 input
B37 EX_TX_CH2_MGT_N DP6_C2M_N
B32 EX_CLK_TX_CH3_MGT_P DP7_C2M_P C2M CML SN65DP159 1 of
2 clock mux input
B33 EX_CLK_TX_CH3_MGT_N DP7_C2M_N
C18 EX_CLK_TX_LVDS_P LA14_P C2M LVDS SN65DP159 2 of
2 clock mux input
C19 EX_CLK_TX_LVDS_N LA14_N
D17 EX_TX_CLK_SEL LA13_P C2M LVTTL (VADJ) SN65DP159 input
clock mux select
H34 EX_TX_CEC LA30_P BI-DIR LVTTL (VADJ) Source CEC
H35 EX_TX_HPD_HDMI LA30_N M2C LVTTL (VADJ) Source HPD

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J3
Pin Schematic Signal Name VITA 57.1 Name Direction Type Description
H31 CLK_EX_I2C_TX_SCL LA28_P C2M LVTTL OD (VADJ) Source DDC I2C
H32 EX_I2C_TX_SDA_OD LA28_N BI-DIR LVTTL OD (VADJ)
D23 EX_TX_HDMI_EN LA23_P C2M LVTTL (VADJ) SN65DP159 OE
D8 CLK_EX_I2C_CTL_SCL LA01_CC_P C2M LVTTL OD (VADJ) I2C for Si5324,
EDID EEPROM,
and SN65DP159
D9 EX_I2C_CTL_SDA_OD LA01_CC_N BI-DIR LVTTL OD (VADJ)
Extender HDMI Sink Signals
A14 EX_RX_TMDS_DAT0_P DP4_M2C_P M2C TMDS Sink Channel 0
A15 EX_RX_TMDS_DAT0_N DP4_M2C_N
A18 EX_RX_TMDS_DAT1_P DP5_M2C_P M2C TMDS Sink Channel 1
A19 EX_RX_TMDS_DAT1_N DP5_M2C_N
B16 EX_RX_TMDS_DAT2_P DP6_M2C_P M2C TMDS Sink Channel 2
B17 EX_RX_TMDS_DAT2_N DP6_M2C_N
H19 CLK_EX_I2C_RX_SCL LA15_P M2C LVTTL OD (VADJ) Sink DDC I2C
H20 EX_I2C_RX_SDA_OD LA15_N BI-DIR LVTTL OD (VADJ)
H25 EX_RX_I2C_EN_N LA21_P C2M LVTTL (VADJ) Sink DDC enable
H22 EX_RX_CEC LA19_P BI-DIR LVTTL (VADJ) Sink CEC
H23 EX_RX_HPD_N LA19_N C2M LVTTL (VADJ) Sink HPD
H10 EX_SOURCE_DET_N LA04_P M2C LVTTL (VADJ) Source detect
Extender Si5324 Clocks
G2 EX_CLK_LVDS_P CLK1_M2C_P M2C LVDS Si5324 CKOUT2
G3 EX_CLK_LVDS_N CLK1_M2C_N
D20 EX_CLKIN_LVDS_P LA17_CC_P C2M LVDS Si5324 CKIN1
D21 EX_CLKIN_LVDS_N LA17_CC_N
D11 EX_REF_CLK_RST_N LA05_P C2M LVTTL (VADJ) Si5324 reset
G12 EX_CLKIN_VALID LA08_P M2C LVTTL (VADJ) Si5324 INT_C1B
G13 EX_PLL_LOL LA08_N M2C LVTTL (VADJ) Si5324 LOL
Extender Miscellaneous Signals
H13 EX_PRSNT LA07_P M2C LVTTL (VADJ) Extender FMC
present
D14 CLK_EX_I2C_SCL_VADJ LA09_P C2M LVTTL OD (VADJ) FMC ID EEPROM
I2C
D15 EX_I2C_SDA_VADJ_OD LA09_N BI-DIR LVTTL OD (VADJ)
H28 CLK_EX_I2C_EE_SCL LA24_P C2M LVTTL OD (VADJ) I2C interface for
64kbit EEPROM
H29 EX_I2C_EE_SDA_OD LA24_N BI-DIR LVTTL OD (VADJ)
Notes:
Direction M2C: FPGA Mezzanine Card to FPGA carrier board
Direction C2M: FPGA carrier board to FPGA Mezzanine Card
Direction BI-DIR: Bidirectional
Type OD: Open Drain

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Rev.2.04
8.2. HPC FMC Connector for the Extender TB-FMCH-HDMI4K Card
The HPC FMC connector used to mate to the extender (stacked) FMC uses Samtec ASP-134486-01.
Table 8-2 shows the FMC extender connector pin assignment.
Table 8-2 HPC FMC Extender Board Connector Pin Assignment
J8
Pin Schematic Signal Name VITA 57.1 Name Direction Type Description
HDMI Source Signals
C2 EX_TX_CH0_MGT_P DP0_C2M_P C2M CML SN65DP159
channel 0 input
C3 EX_TX_CH0_MGT_N DP0_C2M_N
A22 EX_TX_CH1_MGT_P DP1_C2M_P C2M CML SN65DP159
channel 1 input
A23 EX_TX_CH1_MGT_N DP1_C2M_N
A26 EX_TX_CH2_MGT_P DP2_C2M_P C2M CML SN65DP159
channel 2 input
A27 EX_TX_CH2_MGT_N DP2_C2M_N
A30 EX_CLK_TX_CH3_MGT_P DP3_C2M_P C2M CML SN65DP159 1 of
2 clock mux input
A31 EX_CLK_TX_CH3_MGT_N DP3_C2M_N
C26 EX_CLK_TX_LVDS_P LA27_P C2M LVDS SN65DP159 2 of
2 clock mux input
C27 EX_CLK_TX_LVDS_N LA27_N
C22 EX_TX_CLK_SEL_FPGA LA18_CC_P C2M LVTTL (VADJ) SN65DP159 input
clock mux select
C10 CLK_EX_I2C_CTL_SCL LA06_P C2M LVTTL OD (VADJ) I2C for Si5324A,
EDID EEPROM,
and SN65DP159
C11 EX_I2C_CTL_SDA_OD LA06_N BI-DIR LVTTL OD (VADJ)
G33 EX_TX_CEC LA31_P BI-DIR LVTTL (VADJ) Source CEC
G34 EX_TX_HPD_HDMI LA31_N M2C LVTTL (VADJ) Source HPD
D26 EX_TX_HDMI_EN LA26_P C2M LVTTL (VADJ) SN65DP159 OE
G30 CLK_EX_I2C_TX_SCL LA29_P C2M LVTTL OD (VADJ) Source DDC I2C
G31 EX_I2C_TX_SDA_OD LA29_N BI-DIR LVTTL OD (VADJ)
HDMI Sink Signals
C6 EX_RX_TMDS_DAT0_P DP0_M2C_P M2C TMDS Sink Channel 0
C7 EX_RX_TMDS_DAT0_N DP0_M2C_N
A2 EX_RX_TMDS_DAT1_P DP1_M2C_P M2C TMDS Sink Channel 1
A3 EX_RX_TMDS_DAT1_N DP1_M2C_N
A6 EX_RX_TMDS_DAT2_P DP2_M2C_P M2C TMDS Sink Channel 2
A7 EX_RX_TMDS_DAT2_N DP2_M2C_N
G18 CLK_EX_I2C_RX_SCL LA16_P M2C LVTTL OD (VADJ) Sink DDC I2C
G19 EX_I2C_RX_SDA_OD LA16_N BI-DIR LVTTL OD (VADJ)
G24 EX_RX_I2C_EN LA22_P C2M LVTTL (VADJ) Sink DDC enable
G21 EX_RX_CEC LA20_P BI-DIR LVTTL (VADJ) Sink CEC
G22 EX_RX_HPD_N LA20_N C2M LVTTL (VADJ) Sink HPD
G9 EX_SOURCE_DET_N LA03_P M2C LVTTL (VADJ) Source detect
Si5324 Clocks
H4 EX_CLK_LVDS_P CLK0_M2C_P M2C LVDS Si5324 CKOUT2

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Pin Schematic Signal Name VITA 57.1 Name Direction Type Description
H5 EX_CLK_LVDS_N CLK0_M2C_N
G6 EX_CLKIN_LVDS_P LA00_CC_P C2M LVDS Si5324 CKIN1
G7 EX_CLKIN_LVDS_N LA00_CC_N
C14 EX_REF_CLK_RST_N LA10_P C2M LVTTL (VADJ) Si5324 reset
H7 EX_CLKIN_VALID LA02_P M2C LVTTL (VADJ) Si5324 INT_C1B
H8 EX_PLL_LOL LA02_N M2C LVTTL (VADJ) Si5324 LOL
Miscellaneous Signals
C30 CLK_EX_I2C_SCL SCL C2M LVTTL OD FMC ID EEPROM
I2C
C31 EX_I2C_SDA_OD SDA BI-DIR LVTTL OD
G27 CLK_ EX_I2C_EE_SCL LA25_P C2M LVTTL OD (VADJ) I2C interface for
64kbit EEPROM
G28 EX_I2C_EE_SDA_OD LA25_N BI-DIR LVTTL OD (VADJ)
H1 Not connected VREF_A_M2C M2C
K1 Not connected VREF_B_M2C M2C
D1 Not connected PG_C2M C2M
F1 Not connected PG_M2C M2C
H2 EX_PRSNT PRSNT_M2C_N M2C VADJ Indicates card
present
D29 Not connected TCK C2M
D30 Not connected TDI C2M
D31 Not connected TDO M2C
D33 Not connected TMS C2M
D34 Not connected TRST_N C2M
C34 GA0 GA0 C2M LVTTL ID EEPROM E1
D35 GA1 GA1 C2M LVTTL ID EEPROM E0
J39 Not connected VIO_B_M2C M2C
K40 Not connected VIO_B_M2C M2C
Notes:
Direction M2C: FPGA Mezzanine Card to FPGA carrier board
Direction C2M: FPGA carrier board to FPGA Mezzanine Card
Direction BI-DIR: Bidirectional
Type OD: Open Drain