Intersil ISL71831SEH User manual

USER’S MANUAL
UG040
Rev.0.00
March 7, 2016
ISL71831SEHEV1Z
Evaluation Board User Guide
UG040 Rev.0.00 Page 1 of 9
March 7, 2016
Description
The ISL71831SEH is a radiation tolerant, 32-channel high ESD
protected multiplexer that is fabricated using Intersil’s
proprietary P6SOI (Silicon On Insulator) process technology to
provide excellent reliability. It operates with a single supply
voltage ranging from 3.0V to 5.5V. This evaluation board is
designed to provide easy access to the capabilities of the part.
The evaluation board has a DIP switch, which provides a
convenient way to address all 32 channels without the need
for extra supplies. There’s also a BNC input available that will
allow you to drive the address pins with a signal generator.
Specifications
This board has been configured and optimized for the following
operating conditions:
•V
+ = 3.0V to 5.5V
•V
REF = 3.0V to 5.5V
Key Features
• Jumper selectable input source for each input
• DIP switch to conveniently select 1 of 32 channels
• BNC input for dynamic addressing
• Multiple loading options with jumpers on VOUT
• Convenient power connection
• On-board enable switch
References
ISL71831SEH Datasheet
Ordering Information
PART NUMBER DESCRIPTION
ISL71831SEHEV1Z Evaluation board for the ISL71831SEH
FIGURE 1. ISL71831SEHEV1Z BLOCK DIAGRAM
IN01
IN02
IN32
ADDRESS
5
IN03
..
.
OUT ADC
ISL71831SEH
EN
EVALUATION
BOARD
BUS
WIRE
VREF
A1 A2 A3 A4
SIGNAL
GENERATOR
INPUT
A0

UG040 Rev.0.00 Page 2 of 9
March 7, 2016
ISL71831SEHEV1Z
Power Supplies
This board has power supply inputs for V+and VREF. There are no
requirements for sequencing on these supplies, but it is
recommended that the supplies come up relatively at the same
time. In-line resistors are provided to V+with decoupling
capacitors close to the part for V+and VREF. The in-line resistors
are 100Ωbut can be changed by the user for additional power
supply filtering or to limit the rise time of the supply voltages.
The voltage ranges for V+and VREF are +3V to +5.5V. The
ISL71831SEH is a rail-to-rail mux and should be able to
accommodate any input signal with a voltage level between or
equal to the supply voltages. VREF is used to set the decoder logic
levels.
PCB Layout Guidelines
The ISL71831SEHEV1Z PCB layout has been optimized for ease
of testing. When incorporating the ISL71831SEH into a system
there are a few guidelines that can ensure optimal electrical and
noise performance.
• Analog circuits can conduct noise through paths that connect
it to the “outside world”. These paths include the V+, VREF, the
input to any switch and the output. It is important to make sure
these paths are kept away from known noise sources.
• It is recommended to decouple the power supply pins (V+and
VREF) for power supply filtering. If the traces to the supply lines
are long, it is recommended to use a larger 1µF capacitor at
the point of entry for the supply and a smaller capacitor, like a
0.1µF, close to the part to reduce high frequency
perturbations.
ISL71831SEHEV1Z Evaluation Board
FIGURE 2. TOP SIDE FIGURE 3. BOTTOM SIDE

UG040 Rev.0.00 Page 3 of 9 March 7, 2016
ISL71831SEHEV1Z
ISL71831SEHEV1Z Circuit Schematic
DRAWN BY:
DRAWING TITLE
DATE:
12/02/2013
TIM KLEMANN
32CH ANALOG MULT
ISL71831SEH
A3
A4
A0 A2 A1
EN
A0
A1
A2
A2
A3
A3
A4
EN
EN
A4
A0
GND
A1
V+
V+
V1
V1
V2
V2
VOUT
VREF
VREF
VREF
D
D
D
D
D
D
D
D
D D D D
D
D
D
D
D
D
D
D
OUT OUT
OUT
OUT
IN
IN
IN
IN IN
TP3
J29
1 2 3
J6
1 2 3
10K
R7
TP1
TP13
J37
1 2 3
J14
1 2 3
J20
J25
SW3
13
J5
1 2 3
10K
R6
TP10
TP2
TP12
J36
1 2 3
J13
1 2 3
J24
1UF
C1
J4
1 2 3
10K
R5
TP9
J44
1 2 3
TP11
J35
1 2 3
J12
1 2 3
SW6
13
J23
J1
SW4
13
J3
1 2 3
10K
R4
8
7
4
2
3
5
6
1
J19
1
2
3
4
5
6
7
8
J43
1 2 3
J34
1 2 3
J11
1 2 3
J22
J2
1 2 3
J42
1 2 3
SP2
SW1
13
J33
1 2 3
J10
1 2 3
DNP
R3
1UF
C5
10
R1
SP1
J41
1 2 3
TP8
J32
1 2 3
J9
1 2 3
J21
J18
J17
1 2 3
SW5
13
1UF
C4
TP17
TP16
J40
1 2 3
TP7
SW2
13
J31
1 2 3
J8
1 2 3
10K
R9
49.9K R10
J16
1 2 3
J27
TP15
J39
1 2 3
TP4
IN11
IN10
IN9
IN8
IN7
IN6
IN5
IN4
IN3
IN2
IN1
VREF
A0 A1 A2 A3 A4
GND
IN17
IN18
IN19
IN20
IN21
IN22
IN23
IN24
IN25
IN26
OUT
IN15
IN12
EN_B
NC
NC
IN14
IN13
NC
IN16
NC
IN32
NC
IN31
IN30 IN29
IN27
IN28
V+
NC
U1
ISL71831SEHVF
1 2 3 4 5 6
7
8
9
10
11
12
13
14
15
16
17
18
19 20 21 22 23 24 25 26 27 28 29 30
31
32
33
34
35
36
37
38
39
40
41
42
43 44 45 46 47 48
J30
1 2 3
J7
1 2 3
10K
R8
SP3
J28
TP14
J38
1 2 3
J15
1 2 3
100PF
C6
1UF
C2
J26
FIGURE 4. ISL71831SEHEV1Z SCHEMATIC

UG040 Rev.0.00 Page 4 of 9
March 7, 2016
ISL71831SEHEV1Z
Bill of Materials
ITEM QTY
REFERENCE
DESIGNATOR VALUE
TOL
(%) RATING TYPE PCB FOOTPRINT MANUFACTURER
MANUFACTURER
PART NUMBER
1 1 C6 100pF 5 50V X7R 0805 PANASONIC ECU-V1H101JCG
2 4 C1, C2, C4,
C5
1µF 10 25V X7R 0805 AVX 08053C105KAT2A
3 1 R3 DNP 1 DNP 0805 GENERIC
41 R1 10Ω1 1/10W 0805 VENKEL CR0805-8W-10R0FT
5 6 R4, R5, R6,
R7, R8, R9
10kΩ1 1/10W 0805 VENKEL CR0805-8W-1002FT (Pb-free)
6 1 R10 49.9Ω1 1/10W 0805 ROHM MCR10EZHF49R9
7 3 SP1-SP3 CONN TEKTRONIX 131-4353-00
818 P1-P4,
P7-P18
THOLE KEYSTONE 1514-2
9 1 BNC1 CONN AMPHENOL 31-5329-51RFX
10 1 SW1-SW6 DIP GRAYHILL 78B06S
11 1 U1 28CDFP INTERSIL ISL71831SEH/PROTO
12 32 J2-J17,
J29-44
THOLE BERG/FCI 68000-236HLF
13 10 J1, J18,
J20-J27
BERG/FCI 69190-202HLF
14 4 Bottom four
corners
3M SJ-5003SPBL

UG040 Rev.0.00 Page 5 of 9
March 7, 2016
ISL71831SEHEV1Z
Board Layout - 4 Layers
FIGURE 5. SILKSCREEN TOP
FIGURE 6. TOP LAYER

UG040 Rev.0.00 Page 6 of 9
March 7, 2016
ISL71831SEHEV1Z
FIGURE 7. PCB – INNER LAYER 1 (TOP VIEW)
FIGURE 8. PCB – INNER LAYER 2 (TOP VIEW)
Board Layout - 4 Layers(Continued)

UG040 Rev.0.00 Page 7 of 9
March 7, 2016
ISL71831SEHEV1Z
FIGURE 9. PCB – BOTTOM LAYER (TOP VIEW)
FIGURE 10. SILKSCREEN BOTTOM
Board Layout - 4 Layers(Continued)

UG040 Rev.0.00 Page 8 of 9
March 7, 2016
ISL71831SEHEV1Z
Typical Performance Curves Unless otherwise noted: V+= +15V, V-= -15V, VREF = 5.0V, TA= +25°C
FIGURE 11. rDS(ON) vs COMMON MODE VOLTAGE (VS= 5V) FIGURE 12. rDS(ON) vs COMMON MODE VOLTAGE (VS= +3.3V)
FIGURE 13. ADDRESS PROPAGATION DELAY FIGURE 14. BREAK-BEFORE-MAKE DELAY
FIGURE 15. ENABLE/DISABLE PROPAGATION DELAY FIGURE 16. CHARGE INJECTION
0
10
20
30
40
50
60
70
80
90
0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
COMMON MODE VOLTAGE (V)
rDS(ON) (Ω)
-55°C
+25°C
+125°C
0
20
40
60
80
100
120
0 0.5 1.0 1.5 2.0 2.5 3.0
COMMON MODE VOLTAGE (V)
rDS(ON) (Ω)
-55°C
+25°C
+125°C
200ns/DIV
1V/DIV
2V/DIV
tADHL = 34.382ns
tADLH = 44.087ns
200ns/DIV
1V/DIV
2V/DIV
tBBM = 17.929ns
200ns/DIV
1V/DIV
2V/DIV
tENABLE = 22.670ns
tDISABLE = 41.720ns
0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
3.0 3.5 4.0 4.5 5.0 5.5
SUPPLY VOLTAGE (V)
CHARGE INJECTION (pC)
-55°C
+25°C
+125°C

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